From 1d5dd0ccde3ee65686afd928d31b37f45ddfd7c6 Mon Sep 17 00:00:00 2001 From: Unknown Date: Tue, 14 Aug 2018 13:43:53 +0200 Subject: [PATCH] Odevzdani puvodniho projektu --- .gitignore | 5 +- 3d/sot223.wings | Bin 0 -> 2918 bytes 3d/sot223.wrl | 797 ++++++ DOC/TOLoRa.ods | Bin 0 -> 15030 bytes DOC/TOLoRa.pdf | Bin 0 -> 28170 bytes DOC/TOLoRa_Bottom.pdf | Bin 0 -> 4171 bytes DOC/TOLoRa_Top.pdf | Bin 0 -> 20305 bytes DOC/pcielora.csv | 21 + DOC/pcielora.pdf | Bin 0 -> 91872 bytes DOC/pcielora.xml | 946 +++++++ TOLoRa/tolora.kicad_mod | 222 ++ _bom.txt | 2 + fp-lib-table | 3 + gerber/pcielora.TXT | 188 ++ gerber/pcielora.gbl | 2320 ++++++++++++++++ gerber/pcielora.gbo | 2971 ++++++++++++++++++++ gerber/pcielora.gbs | 57 + gerber/pcielora.gml | 52 + gerber/pcielora.gtl | 5516 ++++++++++++++++++++++++++++++++++++++ gerber/pcielora.gto | 5127 +++++++++++++++++++++++++++++++++++ gerber/pcielora.gts | 548 ++++ gerber/pcielora.zip | Bin 0 -> 93351 bytes minipcie.kicad_pcb | 1098 ++++++++ pcielora-cache.lib | 484 ++++ pcielora.kicad_pcb | 4562 +++++++++++++++++++++++++++++++ pcielora.pro | 76 + pcielora.sch | 1235 +++++++++ xPablo_A4_wide.kicad_wks | 297 ++ 28 files changed, 26523 insertions(+), 4 deletions(-) create mode 100644 3d/sot223.wings create mode 100644 3d/sot223.wrl create mode 100644 DOC/TOLoRa.ods create mode 100644 DOC/TOLoRa.pdf create mode 100644 DOC/TOLoRa_Bottom.pdf create mode 100644 DOC/TOLoRa_Top.pdf create mode 100644 DOC/pcielora.csv create mode 100644 DOC/pcielora.pdf create mode 100644 DOC/pcielora.xml create mode 100644 TOLoRa/tolora.kicad_mod create mode 100644 _bom.txt create mode 100644 fp-lib-table create mode 100644 gerber/pcielora.TXT create mode 100644 gerber/pcielora.gbl create mode 100644 gerber/pcielora.gbo create mode 100644 gerber/pcielora.gbs create mode 100644 gerber/pcielora.gml create mode 100644 gerber/pcielora.gtl create mode 100644 gerber/pcielora.gto create mode 100644 gerber/pcielora.gts create mode 100644 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number="3" value=""/> + <comment number="4" value=""/> + </title_block> + </sheet> + </design> + <components> + <comp ref="MOUNTING_HOLE1"> + <value>CONN_1</value> + <footprint>xPablo:PIN_ARRAY_1</footprint> + <libsource lib="xPablo_miniPCIe" part="CONN_1"/> + <sheetpath names="/" tstamps="/"/> + <tstamp>5878BD10</tstamp> + </comp> + <comp ref="MOUNTING_HOLE2"> + <value>CONN_1</value> + <footprint>xPablo:PIN_ARRAY_1</footprint> + <libsource lib="xPablo_miniPCIe" part="CONN_1"/> + <sheetpath names="/" tstamps="/"/> + <tstamp>5878BE0B</tstamp> + </comp> + <comp ref="U1"> + <value>ATSAMD21E</value> + <footprint>xPablo:QFN-32-1EP_5x5mm_Pitch0.5mm</footprint> + <libsource lib="xPablo_mcu" part="ATSAMD21E"/> + <sheetpath names="/" tstamps="/"/> + <tstamp>58790BA6</tstamp> + </comp> + <comp ref="J1"> + <value>PCIE-MINI</value> + <footprint>xPablo:miniPCIeConn</footprint> + <libsource lib="xPablo_miniPCIe" part="PCIE-MINI"/> + <sheetpath names="/" tstamps="/"/> + <tstamp>587B51C0</tstamp> + </comp> + <comp ref="L1"> + <value>BLM18PG471SN1</value> + <footprint>Resistors_SMD:R_0603_HandSoldering</footprint> + <libsource lib="device" part="L_Small"/> + <sheetpath names="/" tstamps="/"/> + <tstamp>587B8588</tstamp> + </comp> + <comp ref="C1"> + <value>1uF</value> + <footprint>Capacitors_SMD:C_0603_HandSoldering</footprint> + <libsource lib="device" part="C_Small"/> + <sheetpath names="/" tstamps="/"/> + <tstamp>587B87AE</tstamp> + </comp> + <comp ref="U2"> + <value>RFM69HW</value> + <footprint>xPablo:RFM69HW</footprint> + <libsource lib="xPablo_RFmodules" part="RFM69HW"/> + <sheetpath names="/" tstamps="/"/> + <tstamp>587B8B72</tstamp> + </comp> + <comp ref="U3"> + <value>RFM95HW</value> + <footprint>xPablo:RFM92_95_96_98</footprint> + <libsource lib="xPablo_RFmodules" part="RFM95HW"/> + <sheetpath names="/" tstamps="/"/> + <tstamp>587B8BC7</tstamp> + </comp> + <comp ref="C3"> + <value>1uF</value> + <footprint>Capacitors_SMD:C_0603_HandSoldering</footprint> + <libsource lib="device" part="C_Small"/> + <sheetpath names="/" tstamps="/"/> + <tstamp>587B8EC6</tstamp> + </comp> + <comp ref="C2"> + <value>1uF</value> + <footprint>Capacitors_SMD:C_0603_HandSoldering</footprint> + <libsource lib="device" part="C_Small"/> + <sheetpath names="/" tstamps="/"/> + <tstamp>587B90DD</tstamp> + </comp> + <comp ref="E1"> + <value>ANT</value> + <footprint>xPablo:coaxial_u.fl-r-smt-1</footprint> + <libsource lib="xPablo_RF" part="ANT"/> + <sheetpath names="/" tstamps="/"/> + <tstamp>587C6B2E</tstamp> + </comp> + <comp ref="R4"> + <value>10k</value> + <footprint>Resistors_SMD:R_0603_HandSoldering</footprint> + <libsource lib="device" part="R_Small"/> + <sheetpath names="/" tstamps="/"/> + <tstamp>587CC7B5</tstamp> + </comp> + <comp ref="R5"> + <value>10k</value> + <footprint>Resistors_SMD:R_0603_HandSoldering</footprint> + <libsource lib="device" part="R_Small"/> + <sheetpath names="/" tstamps="/"/> + <tstamp>587CC7FA</tstamp> + </comp> + <comp ref="C4"> + <value>100nF</value> + <footprint>Capacitors_SMD:C_0603_HandSoldering</footprint> + <libsource lib="device" part="C_Small"/> + <sheetpath names="/" tstamps="/"/> + <tstamp>587CE402</tstamp> + </comp> + <comp ref="C5"> + <value>47uF/6.3V</value> + <footprint>xPablo:CT-A</footprint> + <libsource lib="device" part="CP1_Small"/> + <sheetpath names="/" tstamps="/"/> + <tstamp>587CE441</tstamp> + </comp> + <comp ref="P1"> + <value>CONN_01X04</value> + <footprint>Pin_Headers:Pin_Header_Straight_1x04_Pitch2.54mm</footprint> + <libsource lib="conn" part="CONN_01X04"/> + <sheetpath names="/" tstamps="/"/> + <tstamp>587CE9F0</tstamp> + </comp> + <comp ref="C6"> + <value>1uF</value> + <footprint>Capacitors_SMD:C_0603_HandSoldering</footprint> + <libsource lib="device" part="C_Small"/> + <sheetpath names="/" tstamps="/"/> + <tstamp>587CD8DF</tstamp> + </comp> + <comp ref="C7"> + <value>1uF</value> + <footprint>Capacitors_SMD:C_0603_HandSoldering</footprint> + <libsource lib="device" part="C_Small"/> + <sheetpath names="/" tstamps="/"/> + <tstamp>587CD938</tstamp> + </comp> + <comp ref="U5"> + <value>HT7833_SOT89</value> + <footprint>TO_SOT_Packages_SMD:SOT89-3_Housing_Handsoldering</footprint> + <libsource lib="xPablo" part="HT7833_SOT89"/> + <sheetpath names="/" tstamps="/"/> + <tstamp>587DB049</tstamp> + </comp> + <comp ref="C8"> + <value>100nF</value> + <footprint>Capacitors_SMD:C_0603_HandSoldering</footprint> + <libsource lib="device" part="C_Small"/> + <sheetpath names="/" tstamps="/"/> + <tstamp>587DB72F</tstamp> + </comp> + <comp ref="C9"> + <value>47uF/6.3V</value> + <footprint>xPablo:CT-A</footprint> + <libsource lib="device" part="CP1_Small"/> + <sheetpath names="/" tstamps="/"/> + <tstamp>587DB735</tstamp> + </comp> + <comp ref="Y1"> + <value>32.768kHz</value> + <footprint>xPablo:XT_FC-135</footprint> + <libsource lib="device" part="Crystal_Small"/> + <sheetpath names="/" tstamps="/"/> + <tstamp>587DE1C7</tstamp> + </comp> + <comp ref="C12"> + <value>15pF</value> + <footprint>Capacitors_SMD:C_0603_HandSoldering</footprint> + <libsource lib="device" part="C_Small"/> + <sheetpath names="/" tstamps="/"/> + <tstamp>587DE285</tstamp> + </comp> + <comp ref="C11"> + <value>15pF</value> + <footprint>Capacitors_SMD:C_0603_HandSoldering</footprint> + <libsource lib="device" part="C_Small"/> + <sheetpath names="/" tstamps="/"/> + <tstamp>587DE30C</tstamp> + </comp> + <comp ref="F1"> + <value>F_Small</value> + <footprint>xPablo:MF-PSMF020X</footprint> + <libsource lib="pcielora-cache" part="F_Small"/> + <sheetpath names="/" tstamps="/"/> + <tstamp>587DEC13</tstamp> + </comp> + <comp ref="R1"> + <value>10k</value> + <footprint>Resistors_SMD:R_0603_HandSoldering</footprint> + <libsource lib="device" part="R_Small"/> + <sheetpath names="/" tstamps="/"/> + <tstamp>587DF32B</tstamp> + </comp> + <comp ref="R2"> + <value>1k5</value> + <footprint>Resistors_SMD:R_0603_HandSoldering</footprint> + <libsource lib="device" part="R_Small"/> + <sheetpath names="/" tstamps="/"/> + <tstamp>587DFFDC</tstamp> + </comp> + <comp ref="D1"> + <value>0603LED</value> + <footprint>LEDs:LED_0603</footprint> + <libsource lib="pcielora-cache" part="Led_Small"/> + <sheetpath names="/" tstamps="/"/> + <tstamp>587E007B</tstamp> + </comp> + <comp ref="C10"> + <value>47uF/6.3V</value> + <footprint>xPablo:CT-A</footprint> + <libsource lib="device" part="CP1_Small"/> + <sheetpath names="/" tstamps="/"/> + <tstamp>587E4528</tstamp> + </comp> + <comp ref="R6"> + <value>1k</value> + <footprint>Resistors_SMD:R_0603_HandSoldering</footprint> + <libsource lib="device" part="R_Small"/> + <sheetpath names="/" tstamps="/"/> + <tstamp>587E68EF</tstamp> + </comp> + <comp ref="PR1"> + <value>Prog_xPablo_6pin_X</value> + <footprint>xPablo:PROG_6pin</footprint> + <libsource lib="xPablo_Prog" part="Prog_xPablo_6pin_X"/> + <sheetpath names="/" tstamps="/"/> + <tstamp>587E0406</tstamp> + </comp> + </components> + <libparts> + <libpart lib="xPablo_RF" part="ANT"> + <footprints> + <fp>TRACE_ANTENNA_2.4GHZ_15.2MM</fp> + </footprints> + <fields> + <field name="Reference">E</field> + <field name="Value">ANT</field> + </fields> + <pins> + <pin num="1" name="~" type="input"/> + <pin num="2" name="~" type="input"/> + </pins> + </libpart> + <libpart lib="xPablo_mcu" part="ATSAMD21E"> + <footprints> + <fp>TQFP32</fp> + </footprints> + <fields> + <field name="Reference">U</field> + <field name="Value">ATSAMD21E</field> + </fields> + <pins> + <pin num="1" name="XIN32/PA00" type="BiDi"/> + <pin num="2" name="XOUT32/PA01" type="BiDi"/> + <pin num="3" name="AIN0/DAC/PA02" type="BiDi"/> + <pin num="4" name="AIN1/PA03" type="BiDi"/> + <pin num="5" name="TCC0_W0/AIN4/PA04" type="BiDi"/> + <pin num="6" name="TCC0_W1/AIN5/PA05" type="BiDi"/> + <pin num="7" name="TCC1_W0/AIN6/PA06" type="BiDi"/> + <pin num="8" name="TCC1_W1/AIN7/PA07" type="BiDi"/> + <pin num="9" name="VDDANA" type="power_in"/> + <pin num="10" name="GNDANA" type="power_in"/> + <pin num="11" name="SERCOM0:0/AIN16/PA08" type="BiDi"/> + <pin num="12" name="SERCOM0:1/AIN17/PA09" type="BiDi"/> + <pin num="13" name="SERCOM0:2/AIN18/PA10" type="BiDi"/> + <pin num="14" name="SERCOM0:3/AIN19/PA11" type="BiDi"/> + <pin num="15" name="SERCOM2:2/XIN/PA14" type="BiDi"/> + <pin num="16" name="SERCOM2:3/XOUT/PA15" type="BiDi"/> + <pin num="17" name="SERCOM1:0/PA16" type="BiDi"/> + <pin num="18" name="SERCOM1:1/PA17" type="BiDi"/> + <pin num="19" name="SERCOM1:2/PA18" type="BiDi"/> + <pin num="20" name="SERCOM1:3/PA19" type="BiDi"/> + <pin num="21" name="SERCOM3:0/PA22" type="BiDi"/> + <pin num="22" name="SERCOM3:1/PA23" type="BiDi"/> + <pin num="23" name="SERCOM3:2/USBDM/PA24" type="BiDi"/> + <pin num="24" name="SERCOM3:3/USBDP/PA25" type="BiDi"/> + <pin num="25" name="PA27" type="BiDi"/> + <pin num="26" name="RESET" type="power_in"/> + <pin num="27" name="PA28" type="BiDi"/> + <pin num="28" name="GND" type="power_in"/> + <pin num="29" name="VDDCORE" type="power_out"/> + <pin num="30" name="VDDIN" type="power_in"/> + <pin num="31" name="SWCLK/PA30" type="BiDi"/> + <pin num="32" name="SWDIO/PA31" type="BiDi"/> + </pins> + </libpart> + <libpart lib="conn" part="CONN_01X04"> + <description>Connector, single row, 01x04</description> + <footprints> + <fp>Pin_Header_Straight_1X04</fp> + <fp>Pin_Header_Angled_1X04</fp> + <fp>Socket_Strip_Straight_1X04</fp> + <fp>Socket_Strip_Angled_1X04</fp> + </footprints> + <fields> + <field name="Reference">P</field> + <field name="Value">CONN_01X04</field> + </fields> + <pins> + <pin num="1" name="P1" type="passive"/> + <pin num="2" name="P2" type="passive"/> + <pin num="3" name="P3" type="passive"/> + <pin num="4" name="P4" type="passive"/> + </pins> + </libpart> + <libpart lib="xPablo_miniPCIe" part="CONN_1"> + <fields> + <field name="Reference">P</field> + <field name="Value">CONN_1</field> + </fields> + <pins> + <pin num="1" name="1" type="passive"/> + </pins> + </libpart> + <libpart lib="device" part="CP1_Small"> + <description>Polarised capacitor</description> + <footprints> + <fp>CP*</fp> + <fp>C_Axial*</fp> + <fp>C_Radial*</fp> + <fp>TantalC*</fp> + <fp>C*elec</fp> + <fp>c_elec*</fp> + <fp>SMD*_Pol</fp> + </footprints> + <fields> + <field name="Reference">C</field> + <field name="Value">CP1_Small</field> + </fields> + <pins> + <pin num="1" name="~" type="passive"/> + <pin num="2" name="~" type="passive"/> + </pins> + </libpart> + <libpart lib="device" part="C_Small"> + <description>Unpolarized capacitor</description> + <footprints> + <fp>C?</fp> + <fp>C_????_*</fp> + <fp>C_????</fp> + <fp>SMD*_c</fp> + <fp>Capacitor*</fp> + </footprints> + <fields> + <field name="Reference">C</field> + <field name="Value">C_Small</field> + </fields> + <pins> + <pin num="1" name="~" type="passive"/> + <pin num="2" name="~" type="passive"/> + </pins> + </libpart> + <libpart lib="device" part="Crystal_Small"> + <description>Two pin crystal, small symbol</description> + <footprints> + <fp>Crystal*</fp> + </footprints> + <fields> + <field name="Reference">Y</field> + <field name="Value">Crystal_Small</field> + </fields> + <pins> + <pin num="1" name="1" type="passive"/> + <pin num="2" name="2" type="passive"/> + </pins> + </libpart> + <libpart lib="pcielora-cache" part="F_Small"> + <footprints> + <fp>CP*</fp> + <fp>SM*</fp> + </footprints> + <fields> + <field name="Reference">F</field> + <field name="Value">F_Small</field> + </fields> + <pins> + <pin num="1" name="~" type="passive"/> + <pin num="2" name="~" type="passive"/> + </pins> + </libpart> + <libpart lib="xPablo" part="HT7833_SOT89"> + <fields> + <field name="Reference">U</field> + <field name="Value">HT7833_SOT89</field> + <field name="Footprint">SOT89</field> + </fields> + <pins> + <pin num="1" name="GND" type="input"/> + <pin num="2" name="VIN" type="input"/> + <pin num="3" name="VOUT" type="power_out"/> + </pins> + </libpart> + <libpart lib="device" part="L_Small"> + <description>Inductor, small symbol</description> + <footprints> + <fp>Choke_*</fp> + <fp>*Coil*</fp> + </footprints> + <fields> + <field name="Reference">L</field> + <field name="Value">L_Small</field> + </fields> + <pins> + <pin num="1" name="~" type="passive"/> + <pin num="2" name="~" type="passive"/> + </pins> + </libpart> + <libpart lib="pcielora-cache" part="Led_Small"> + <footprints> + <fp>LED-*</fp> + <fp>LED_*</fp> + </footprints> + <fields> + <field name="Reference">D</field> + <field name="Value">Led_Small</field> + </fields> + <pins> + <pin num="1" name="K" type="passive"/> + <pin num="2" name="A" type="passive"/> + </pins> + </libpart> + <libpart lib="xPablo_miniPCIe" part="PCIE-MINI"> + <docs>Datasheets/pciexpress_mini.pdf</docs> + <fields> + <field name="Reference">J</field> + <field name="Value">PCIE-MINI</field> + <field name="Footprint">MODULE</field> + </fields> + <pins> + <pin num="1" name="PIN1" type="passive"/> + <pin num="2" name="3.3V" type="passive"/> + <pin num="3" name="RESERVED" type="passive"/> + <pin num="4" name="GND" type="passive"/> + <pin num="5" name="RESERVED" type="passive"/> + <pin num="6" name="1.5V" type="passive"/> + <pin num="7" name="CLKREQ#" type="passive"/> + <pin num="8" name="VCC" type="passive"/> + <pin num="9" name="GND" type="passive"/> + <pin num="10" name="I/O" type="passive"/> + <pin num="11" name="REFCLK-" type="passive"/> + <pin num="12" name="CLK" type="passive"/> + <pin num="13" name="REFCLK+" type="passive"/> + <pin num="14" name="RST" type="passive"/> + <pin num="15" name="GND" type="passive"/> + <pin num="16" name="VPP" type="passive"/> + <pin num="17" name="RESERVED" type="passive"/> + <pin num="18" name="GND" type="passive"/> + <pin num="19" name="RESERVED" type="passive"/> + <pin num="20" name="RESERVED" type="passive"/> + <pin num="21" name="GND" type="passive"/> + <pin num="22" name="PERST#" type="passive"/> + <pin num="23" name="PERn0" type="passive"/> + <pin num="24" name="3.3Vaux" type="passive"/> + <pin num="25" name="PERp0" type="passive"/> + <pin num="26" name="GND" type="passive"/> + <pin num="27" name="GND" type="passive"/> + <pin num="28" name="1.5V" type="passive"/> + <pin num="29" name="GND" type="passive"/> + <pin num="30" name="SMB_CLK" type="passive"/> + <pin num="31" name="PETn0" type="passive"/> + <pin num="32" name="SMB_DATA" type="passive"/> + <pin num="33" name="PETp0" type="passive"/> + <pin num="34" name="GND" type="passive"/> + <pin num="35" name="GND" type="passive"/> + <pin num="36" name="USB_D-" type="passive"/> + <pin num="37" name="RESERVED" type="passive"/> + <pin num="38" name="USB_D+" type="passive"/> + <pin num="39" name="RESERVED" type="passive"/> + <pin num="40" name="GND" type="passive"/> + <pin num="41" name="RESERVED" type="passive"/> + <pin num="42" name="LED_WWAN#" type="passive"/> + <pin num="43" name="RESERVED" type="passive"/> + <pin num="44" name="LED_WLAN#" type="passive"/> + <pin num="45" name="RESERVED" type="passive"/> + <pin num="46" name="LED_WPAN#" type="passive"/> + <pin num="47" name="RESERVED" type="passive"/> + <pin num="48" name="1.5V" type="passive"/> + <pin num="49" name="RESERVED" type="passive"/> + <pin num="50" name="GND" type="passive"/> + <pin num="51" name="RESERVED" type="passive"/> + <pin num="52" name="3.3V" type="passive"/> + </pins> + </libpart> + <libpart lib="xPablo_Prog" part="Prog_xPablo_6pin_X"> + <footprints> + <fp>PROG_6pin</fp> + </footprints> + <fields> + <field name="Reference">PR</field> + <field name="Value">Prog_xPablo_6pin_X</field> + <field name="Footprint">PROG_6pin</field> + </fields> + <pins> + <pin num="1" name="~" type="passive"/> + <pin num="2" name="~" type="passive"/> + <pin num="3" name="~" type="passive"/> + <pin num="4" name="~" type="passive"/> + <pin num="5" name="~" type="passive"/> + <pin num="6" name="~" type="passive"/> + </pins> + </libpart> + <libpart lib="xPablo_RFmodules" part="RFM69HW"> + <footprints> + <fp>RFM69*</fp> + </footprints> + <fields> + <field name="Reference">U</field> + <field name="Value">RFM69HW</field> + <field name="Footprint">xPablo:RFM69HW_SMD_ThroughHole_Handsoldering</field> + </fields> + <pins> + <pin num="1" name="RESET" type="BiDi"/> + <pin num="2" name="DIO0" type="BiDi"/> + <pin num="3" name="DIO1" type="BiDi"/> + <pin num="4" name="DIO2" type="BiDi"/> + <pin num="5" name="DIO3" type="BiDi"/> + <pin num="6" name="DIO4" type="BiDi"/> + <pin num="7" name="DIO5" type="BiDi"/> + <pin num="8" name="3.3V" type="power_in"/> + <pin num="9" name="GND" type="power_in"/> + <pin num="10" name="ANA" type="passive"/> + <pin num="11" name="GND" type="power_in"/> + <pin num="12" name="SCK" type="input"/> + <pin num="13" name="MISO" type="3state"/> + <pin num="14" name="MOSI" type="input"/> + <pin num="15" name="NSS" type="input"/> + <pin num="16" name="NC" type="passive"/> + </pins> + </libpart> + <libpart lib="xPablo_RFmodules" part="RFM95HW"> + <footprints> + <fp>RFM95*</fp> + </footprints> + <fields> + <field name="Reference">U</field> + <field name="Value">RFM95HW</field> + <field name="Footprint">xPablo:RFM69HW_SMD_ThroughHole_Handsoldering</field> + </fields> + <pins> + <pin num="1" name="GND" type="power_in"/> + <pin num="2" name="MISO" type="3state"/> + <pin num="3" name="MOSI" type="input"/> + <pin num="4" name="SCK" type="input"/> + <pin num="5" name="NSS" type="input"/> + <pin num="6" name="RESET" type="BiDi"/> + <pin num="7" name="DIO5" type="BiDi"/> + <pin num="8" name="GND" type="power_in"/> + <pin num="9" name="ANA" type="passive"/> + <pin num="10" name="GND" type="power_in"/> + <pin num="11" name="DIO3" type="BiDi"/> + <pin num="12" name="DIO4" type="BiDi"/> + <pin num="13" name="3.3V" type="power_in"/> + <pin num="14" name="DIO0" type="BiDi"/> + <pin num="15" name="DIO1" type="BiDi"/> + <pin num="16" name="DIO2" type="BiDi"/> + </pins> + </libpart> + <libpart lib="device" part="R_Small"> + <description>Resistor, small symbol</description> + <footprints> + <fp>Resistor_*</fp> + <fp>R_*</fp> + </footprints> + <fields> + <field name="Reference">R</field> + <field name="Value">R_Small</field> + </fields> + <pins> + <pin num="1" name="~" type="passive"/> + <pin num="2" name="~" type="passive"/> + </pins> + </libpart> + </libparts> + <libraries> + <library logical="device"> + <uri>/usr/share/kicad/library/device.lib</uri> + </library> + <library logical="conn"> + <uri>/usr/share/kicad/library/conn.lib</uri> + </library> + <library logical="xPablo"> + <uri>/home/pablo2048/Pracovni_pro_VM/MyProjects/Kicad/xPablo.lib</uri> + </library> + <library logical="xPablo_mcu"> + <uri>/home/pablo2048/Pracovni_pro_VM/MyProjects/Kicad/xPablo_mcu.lib</uri> + </library> + <library logical="xPablo_miniPCIe"> + <uri>/home/pablo2048/Pracovni_pro_VM/MyProjects/Kicad/xPablo_miniPCIe.lib</uri> + </library> + <library logical="xPablo_Prog"> + <uri>/home/pablo2048/Pracovni_pro_VM/MyProjects/Kicad/xPablo_Prog.lib</uri> + </library> + <library logical="xPablo_RFmodules"> + <uri>/home/pablo2048/Pracovni_pro_VM/MyProjects/Kicad/xPablo_RFmodules.lib</uri> + </library> + <library logical="xPablo_RF"> + <uri>/home/pablo2048/Pracovni_pro_VM/MyProjects/Kicad/xPablo_RF.lib</uri> + </library> + <library logical="pcielora-cache"> + <uri>/home/pablo2048/Pracovni_pro_VM/MyProjects/PB_Turris_PCIe_LoRa/Kicad/RevA/pcielora-cache.lib</uri> + </library> + </libraries> + <nets> + <net code="1" name="GND"> + <node ref="U1" pin="28"/> + <node ref="E1" pin="2"/> + <node ref="J1" pin="4"/> + <node ref="J1" pin="9"/> + <node ref="J1" pin="40"/> + <node ref="J1" pin="50"/> + <node ref="J1" pin="21"/> + <node ref="PR1" pin="5"/> + <node ref="MOUNTING_HOLE2" pin="1"/> + <node ref="C1" pin="2"/> + <node ref="C5" pin="2"/> + <node ref="C4" pin="2"/> + <node ref="C3" pin="2"/> + <node ref="C10" pin="2"/> + <node ref="C2" pin="1"/> + <node ref="J1" pin="15"/> + <node ref="J1" pin="34"/> + <node ref="J1" pin="18"/> + <node ref="J1" pin="27"/> + <node ref="J1" pin="35"/> + <node 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name="/MISO"> + <node ref="U1" pin="13"/> + <node ref="U3" pin="2"/> + <node ref="U2" pin="13"/> + </net> + <net code="8" name="/MOSI"> + <node ref="U1" pin="11"/> + <node ref="U3" pin="3"/> + <node ref="U2" pin="14"/> + </net> + <net code="9" name="/NSS"> + <node ref="U1" pin="14"/> + <node ref="U3" pin="5"/> + <node ref="U2" pin="15"/> + </net> + <net code="10" name="Net-(J1-Pad12)"> + <node ref="J1" pin="12"/> + </net> + <net code="11" name="Net-(J1-Pad10)"> + <node ref="J1" pin="10"/> + </net> + <net code="12" name="Net-(J1-Pad8)"> + <node ref="J1" pin="8"/> + </net> + <net code="13" name="Net-(J1-Pad6)"> + <node ref="J1" pin="6"/> + </net> + <net code="14" name="Net-(J1-Pad7)"> + <node ref="J1" pin="7"/> + </net> + <net code="15" name="Net-(J1-Pad5)"> + <node ref="J1" pin="5"/> + </net> + <net code="16" name="/SCK"> + <node ref="U2" pin="12"/> + <node ref="U1" pin="12"/> + <node ref="U3" pin="4"/> + </net> + <net code="17" name="Net-(J1-Pad1)"> + <node ref="J1" pin="1"/> + </net> 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<node ref="J1" pin="22"/> + </net> + <net code="58" name="Net-(C1-Pad1)"> + <node ref="U1" pin="9"/> + <node ref="L1" pin="2"/> + <node ref="C1" pin="1"/> + </net> + <net code="59" name="Net-(U1-Pad15)"> + <node ref="U1" pin="15"/> + </net> + <net code="60" name="Net-(U1-Pad4)"> + <node ref="U1" pin="4"/> + </net> + <net code="61" name="Net-(U1-Pad3)"> + <node ref="U1" pin="3"/> + </net> + <net code="62" name="Net-(J1-Pad11)"> + <node ref="J1" pin="11"/> + </net> + <net code="63" name="Net-(J1-Pad20)"> + <node ref="J1" pin="20"/> + </net> + <net code="64" name="Net-(C3-Pad1)"> + <node ref="C3" pin="1"/> + <node ref="U1" pin="29"/> + </net> + <net code="65" name="Net-(U1-Pad27)"> + <node ref="U1" pin="27"/> + </net> + <net code="66" name="Net-(U1-Pad17)"> + <node ref="U1" pin="17"/> + </net> + <net code="67" name="Net-(U1-Pad16)"> + <node ref="U1" pin="16"/> + </net> + <net code="68" name="Net-(U1-Pad25)"> + <node ref="U1" pin="25"/> + </net> + <net code="69" name="/ANT"> + <node ref="U3" pin="9"/> + <node ref="U2" pin="10"/> + <node ref="E1" pin="1"/> + </net> + <net code="70" name="/USB_P"> + <node ref="U1" pin="24"/> + <node ref="J1" pin="38"/> + <node ref="P1" pin="3"/> + </net> + <net code="71" name="/USB_N"> + <node ref="U1" pin="23"/> + <node ref="P1" pin="2"/> + <node ref="J1" pin="36"/> + </net> + <net code="72" name="Net-(U2-Pad5)"> + <node ref="U2" pin="5"/> + </net> + <net code="73" name="Net-(U2-Pad4)"> + <node ref="U2" pin="4"/> + </net> + <net code="74" name="Net-(U2-Pad3)"> + <node ref="U2" pin="3"/> + </net> + <net code="75" name="Net-(U2-Pad6)"> + <node ref="U2" pin="6"/> + </net> + <net code="76" name="Net-(U3-Pad12)"> + <node ref="U3" pin="12"/> + </net> + <net code="77" name="Net-(U3-Pad11)"> + <node ref="U3" pin="11"/> + </net> + <net code="78" name="Net-(U3-Pad7)"> + <node ref="U3" pin="7"/> + </net> + </nets> +</export> diff --git a/TOLoRa/tolora.kicad_mod b/TOLoRa/tolora.kicad_mod new file mode 100644 index 0000000..bd2acaf --- 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0.15) + (edge_width 0.1) + (via_size 0.6) + (via_drill 0.3048) + (via_min_size 0.6) + (via_min_drill 0.299974) + (uvia_size 0.508) + (uvia_drill 0.127) + (uvias_allowed no) + (uvia_min_size 0.508) + (uvia_min_drill 0.127) + (pcb_text_width 0.3) + (pcb_text_size 1.5 1.5) + (mod_edge_width 0.15) + (mod_text_size 1 1) + (mod_text_width 0.15) + (pad_size 0.9 1) + (pad_drill 0) + (pad_to_mask_clearance 0) + (aux_axis_origin 0 0) + (visible_elements 7FFFFF7F) + (pcbplotparams + (layerselection 0x00030_80000001) + (usegerberextensions true) + (excludeedgelayer true) + (linewidth 0.150000) + (plotframeref false) + (viasonmask false) + (mode 1) + (useauxorigin false) + (hpglpennumber 1) + (hpglpenspeed 20) + (hpglpendiameter 15) + (hpglpenoverlay 2) + (psnegative false) + (psa4output false) + (plotreference true) + (plotvalue true) + (plotinvisibletext false) + (padsonsilk false) + (subtractmaskfromsilk false) + (outputformat 1) + (mirror false) + (drillshape 0) + (scaleselection 1) + (outputdirectory gerber/)) + ) + + (net 0 "") + (net 1 /A0) + (net 2 /A1) + (net 3 /A2) + (net 4 /A3) + (net 5 /A4) + (net 6 /A5) + (net 7 /AREF) + (net 8 /D0/RXI) + (net 9 /D1/TXO) + (net 10 /D10) + (net 11 /D11) + (net 12 /D12) + (net 13 /D13) + (net 14 /D2/SDA) + (net 15 /D3/SCL) + (net 16 /D4) + (net 17 /D5) + (net 18 /D6) + (net 19 /D7) + (net 20 /D8) + (net 21 /D9) + (net 22 /RESET) + (net 23 /UVCC) + (net 24 GND) + (net 25 N-000002) + (net 26 N-000004) + (net 27 VCC) + + (net_class Default "This is the default net class." + (clearance 0.2) + (trace_width 0.254) + (via_dia 0.6) + (via_drill 0.3048) + (uvia_dia 0.508) + (uvia_drill 0.127) + (add_net /A0) + (add_net /A1) + (add_net /A2) + (add_net /A3) + (add_net /A4) + (add_net /A5) + (add_net /AREF) + (add_net /D0/RXI) + (add_net /D1/TXO) + (add_net /D10) + (add_net /D11) + (add_net /D12) + (add_net /D13) + (add_net /D2/SDA) + (add_net /D3/SCL) + (add_net /D4) + (add_net /D5) + (add_net /D6) + (add_net /D7) + (add_net /D8) + (add_net /D9) + (add_net /RESET) + (add_net N-000002) + (add_net N-000004) + ) + + (net_class PCI "" + (clearance 0.2) + (trace_width 0.3) + (via_dia 0.6) + (via_drill 0.3048) + (uvia_dia 0.508) + (uvia_drill 0.127) + (add_net GND) + ) + + (net_class Power "" + (clearance 0.2) + (trace_width 0.4) + (via_dia 0.6) + (via_drill 0.3048) + (uvia_dia 0.508) + (uvia_drill 0.127) + (add_net /UVCC) + (add_net VCC) + ) + + (module miniPCIeConn locked (layer F.Cu) (tedit 54A91326) (tstamp 54A9144B) + (at 50.45 111.15) + (path /53FF05BE) + (fp_text reference J1 (at 2.5654 -3.2512 90) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value PCIE-MINI (at 2.8194 5.9182 90) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (pad 1 smd rect (at 0 -7.95) (size 2.3 0.6) (layers F.Cu F.Paste F.Mask) + (solder_mask_margin 0.1) (clearance 0.1)) + (pad 3 smd rect (at 0 -7.15) (size 2.3 0.6) (layers F.Cu F.Paste F.Mask) + (solder_mask_margin 0.1) (clearance 0.1)) + (pad 5 smd rect (at 0 -6.35) (size 2.3 0.6) (layers F.Cu F.Paste F.Mask) + (solder_mask_margin 0.1) (clearance 0.1)) + (pad 7 smd rect (at 0 -5.55) (size 2.3 0.6) (layers F.Cu F.Paste F.Mask) + (solder_mask_margin 0.1) (clearance 0.1)) + (pad 9 smd rect (at 0 -4.75) (size 2.3 0.6) (layers F.Cu F.Paste F.Mask) + (net 24 GND) (solder_mask_margin 0.1) (clearance 0.1)) + (pad 11 smd rect (at 0 -3.95) (size 2.3 0.6) (layers F.Cu F.Paste F.Mask) + (solder_mask_margin 0.1) (clearance 0.1)) + (pad 13 smd rect (at 0 -3.15) (size 2.3 0.6) (layers F.Cu F.Paste F.Mask) + (solder_mask_margin 0.1) (clearance 0.1)) + (pad 15 smd rect (at 0 -2.35) (size 2.3 0.6) (layers F.Cu F.Paste F.Mask) + (net 24 GND) (solder_mask_margin 0.1) (clearance 0.1)) + (pad 2 smd rect (at 0 -7.55) (size 2.3 0.6) (layers B.Cu B.Paste B.Mask) + (net 23 /UVCC) (solder_mask_margin 0.1) (clearance 0.1)) + (pad 17 smd rect (at 0 1.65) (size 2.3 0.6) (layers F.Cu F.Paste F.Mask) + (solder_mask_margin 0.1) (clearance 0.1)) + (pad 4 smd rect (at 0 -6.75) (size 2.3 0.6) (layers B.Cu B.Paste B.Mask) + (net 24 GND) (solder_mask_margin 0.1) (clearance 0.1)) + (pad 6 smd rect (at 0 -5.95) (size 2.3 0.6) (layers B.Cu B.Paste B.Mask) + (solder_mask_margin 0.1) (clearance 0.1)) + (pad 8 smd rect (at 0 -5.15) (size 2.3 0.6) (layers B.Cu B.Paste B.Mask) + (solder_mask_margin 0.1) (clearance 0.1)) + (pad 10 smd rect (at 0 -4.35) (size 2.3 0.6) (layers B.Cu B.Paste B.Mask) + (solder_mask_margin 0.1) (clearance 0.1)) + (pad 12 smd rect (at 0 -3.55) (size 2.3 0.6) (layers B.Cu B.Paste B.Mask) + (solder_mask_margin 0.1) (clearance 0.1)) + (pad 14 smd rect (at 0 -2.75) (size 2.3 0.6) (layers B.Cu B.Paste B.Mask) + (solder_mask_margin 0.1) (clearance 0.1)) + (pad 16 smd rect (at 0 -1.95) (size 2.3 0.6) (layers B.Cu B.Paste B.Mask) + (solder_mask_margin 0.1) (clearance 0.1)) + (pad 19 smd rect (at 0 2.45) (size 2.3 0.6) (layers F.Cu F.Paste F.Mask) + (solder_mask_margin 0.1) (clearance 0.1)) + (pad 21 smd rect (at 0 3.25) (size 2.3 0.6) (layers F.Cu F.Paste F.Mask) + (net 24 GND) (solder_mask_margin 0.1) (clearance 0.1)) + (pad 23 smd rect (at 0 4.05) (size 2.3 0.6) (layers F.Cu F.Paste F.Mask) + (solder_mask_margin 0.1) (clearance 0.1)) + (pad 25 smd rect (at 0 4.85) (size 2.3 0.6) (layers F.Cu F.Paste F.Mask) + (solder_mask_margin 0.1) (clearance 0.1)) + (pad 27 smd rect (at 0 5.65) (size 2.3 0.6) (layers F.Cu F.Paste F.Mask) + (net 24 GND) (solder_mask_margin 0.1) (clearance 0.1)) + (pad 29 smd rect (at 0 6.45) (size 2.3 0.6) (layers F.Cu F.Paste F.Mask) + (net 24 GND) (solder_mask_margin 0.1) (clearance 0.1)) + (pad 31 smd rect (at 0 7.25) (size 2.3 0.6) (layers F.Cu F.Paste F.Mask) + (solder_mask_margin 0.1) (clearance 0.1)) + (pad 33 smd rect (at 0 8.05) (size 2.3 0.6) (layers F.Cu F.Paste F.Mask) + (solder_mask_margin 0.1) (clearance 0.1)) + (pad 35 smd rect (at 0 8.85) (size 2.3 0.6) (layers F.Cu F.Paste F.Mask) + (net 24 GND) (solder_mask_margin 0.1) (clearance 0.1)) + (pad 37 smd rect (at 0 9.65) (size 2.3 0.6) (layers F.Cu F.Paste F.Mask) + (solder_mask_margin 0.1) (clearance 0.1)) + (pad 39 smd rect (at 0 10.45) (size 2.3 0.6) (layers F.Cu F.Paste F.Mask) + (solder_mask_margin 0.1) (clearance 0.1)) + (pad 41 smd rect (at 0 11.25) (size 2.3 0.6) (layers F.Cu F.Paste F.Mask) + (solder_mask_margin 0.1) (clearance 0.1)) + (pad 43 smd rect (at 0 12.05) (size 2.3 0.6) (layers F.Cu F.Paste F.Mask) + (solder_mask_margin 0.1) (clearance 0.1)) + (pad 45 smd rect (at 0 12.85) (size 2.3 0.6) (layers F.Cu F.Paste F.Mask) + (solder_mask_margin 0.1) (clearance 0.1)) + (pad 47 smd rect (at 0 13.65) (size 2.3 0.6) (layers F.Cu F.Paste F.Mask) + (solder_mask_margin 0.1) (clearance 0.1)) + (pad 49 smd rect (at 0 14.45) (size 2.3 0.6) (layers F.Cu F.Paste F.Mask) + (solder_mask_margin 0.1) (clearance 0.1)) + (pad 51 smd rect (at 0 15.25) (size 2.3 0.6) (layers F.Cu F.Paste F.Mask) + (solder_mask_margin 0.1) (clearance 0.1)) + (pad 18 smd rect (at 0 2.05) (size 2.3 0.6) (layers B.Cu B.Paste B.Mask) + (net 24 GND) (solder_mask_margin 0.1) (clearance 0.1)) + (pad 20 smd rect (at 0 2.85) (size 2.3 0.6) (layers B.Cu B.Paste B.Mask) + (solder_mask_margin 0.1) (clearance 0.1)) + (pad 22 smd rect (at 0 3.65) (size 2.3 0.6) (layers B.Cu B.Paste B.Mask) + (solder_mask_margin 0.1) (clearance 0.1)) + (pad 24 smd rect (at 0 4.45) (size 2.3 0.6) (layers B.Cu B.Paste B.Mask) + (solder_mask_margin 0.1) (clearance 0.1)) + (pad 26 smd rect (at 0 5.25) (size 2.3 0.6) (layers B.Cu B.Paste B.Mask) + (net 24 GND) (solder_mask_margin 0.1) (clearance 0.1)) + (pad 28 smd rect (at 0 6.05) (size 2.3 0.6) (layers B.Cu B.Paste B.Mask) + (solder_mask_margin 0.1) (clearance 0.1)) + (pad 30 smd rect (at 0 6.85) (size 2.3 0.6) (layers B.Cu B.Paste B.Mask) + (solder_mask_margin 0.1) (clearance 0.1)) + (pad 32 smd rect (at 0 7.65) (size 2.3 0.6) (layers B.Cu B.Paste B.Mask) + (solder_mask_margin 0.1) (clearance 0.1)) + (pad 34 smd rect (at 0 8.45) (size 2.3 0.6) (layers B.Cu B.Paste B.Mask) + (net 24 GND) (solder_mask_margin 0.1) (clearance 0.1)) + (pad 36 smd rect (at 0 9.25) (size 2.3 0.6) (layers B.Cu B.Paste B.Mask) + (net 25 N-000002) (solder_mask_margin 0.1) (clearance 0.1)) + (pad 38 smd rect (at 0 10.05) (size 2.3 0.6) (layers B.Cu B.Paste B.Mask) + (net 26 N-000004) (solder_mask_margin 0.1) (clearance 0.1)) + (pad 40 smd rect (at 0 10.85) (size 2.3 0.6) (layers B.Cu B.Paste B.Mask) + (net 24 GND) (solder_mask_margin 0.1) (clearance 0.1)) + (pad 42 smd rect (at 0 11.65) (size 2.3 0.6) (layers B.Cu B.Paste B.Mask) + (solder_mask_margin 0.1) (clearance 0.1)) + (pad 44 smd rect (at 0 12.45) (size 2.3 0.6) (layers B.Cu B.Paste B.Mask) + (solder_mask_margin 0.1) (clearance 0.1)) + (pad 46 smd rect (at 0 13.25) (size 2.3 0.6) (layers B.Cu B.Paste B.Mask) + (solder_mask_margin 0.1) (clearance 0.1)) + (pad 48 smd rect (at 0 14.05) (size 2.3 0.6) (layers B.Cu B.Paste B.Mask) + (solder_mask_margin 0.1) (clearance 0.1)) + (pad 50 smd rect (at 0 14.85) (size 2.3 0.6) (layers B.Cu B.Paste B.Mask) + (net 24 GND) (solder_mask_margin 0.1) (clearance 0.1)) + (pad 52 smd rect (at 0 15.65) (size 2.3 0.6) (layers B.Cu B.Paste B.Mask) + (net 23 /UVCC) (solder_mask_margin 0.1) (clearance 0.1)) + ) + + (module PIN_ARRAY_1 locked (layer F.Cu) (tedit 54A913CF) (tstamp 54A7F2E0) + (at 97.1 127.1) + (descr "1 pin") + (tags "CONN DEV") + (path /54A7DBE8) + (fp_text reference MOUNTING_HOLE2 (at 0 -1.905) (layer F.SilkS) hide + (effects (font (size 0.762 0.762) (thickness 0.1524))) + ) + (fp_text value CONN_1 (at 0 -1.905) (layer F.SilkS) hide + (effects (font (size 0.762 0.762) (thickness 0.1524))) + ) + (fp_line (start 1.27 1.27) (end -1.27 1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start -1.27 -1.27) (end 1.27 -1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start -1.27 1.27) (end -1.27 -1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start 1.27 -1.27) (end 1.27 1.27) (layer F.SilkS) (width 0.1524)) + (pad 1 thru_hole rect (at 0 0) (size 5.8 5.8) (drill 2.6) (layers *.Cu *.Mask F.SilkS) + (net 24 GND) (solder_mask_margin 0.1524) (clearance 0.1524)) + ) + + (module PIN_ARRAY_1 locked (layer F.Cu) (tedit 54A913A9) (tstamp 54A91485) + (at 97.1 102.9) + (descr "1 pin") + (tags "CONN DEV") + (path /54A7DBF7) + (fp_text reference MOUNTING_HOLE1 (at 0 -1.905) (layer F.SilkS) hide + (effects (font (size 0.762 0.762) (thickness 0.1524))) + ) + (fp_text value CONN_1 (at 0 -1.905) (layer F.SilkS) hide + (effects (font (size 0.762 0.762) (thickness 0.1524))) + ) + (fp_line (start 1.27 1.27) (end -1.27 1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start -1.27 -1.27) (end 1.27 -1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start -1.27 1.27) (end -1.27 -1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start 1.27 -1.27) (end 1.27 1.27) (layer F.SilkS) (width 0.1524)) + (pad 1 thru_hole rect (at 0 0) (size 5.8 5.8) (drill 2.6) (layers *.Cu *.Mask F.SilkS) + (net 24 GND) (solder_mask_margin 0.1524) (clearance 0.1524)) + ) + + (module PIN_ARRAY_15x1 locked (layer F.Cu) (tedit 5544DD7D) (tstamp 54A91F1B) + (at 75 102.54 180) + (descr "Double rangee de contacts 2 x 5 pins") + (tags CONN) + (path /54A7E504) + (fp_text reference J3 (at 0 -2.54 180) (layer F.SilkS) hide + (effects (font (size 1.016 1.016) (thickness 0.2032))) + ) + (fp_text value DIGITAL (at 0 2.54 180) (layer F.SilkS) hide + (effects (font (size 1.016 1.016) (thickness 0.2032))) + ) + (fp_line (start -19.05 -1.27) (end 19.05 -1.27) (layer F.SilkS) (width 0.15)) + (fp_line (start 19.05 -1.27) (end 19.05 1.27) (layer F.SilkS) (width 0.15)) + (fp_line (start 19.05 1.27) (end -19.05 1.27) (layer F.SilkS) (width 0.15)) + (fp_line (start -19.05 1.27) (end -19.05 -1.27) (layer F.SilkS) (width 0.15)) + (pad 1 thru_hole rect (at -17.78 0 180) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 8 /D0/RXI)) + (pad 2 thru_hole circle (at -15.24 0 180) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 9 /D1/TXO)) + (pad 3 thru_hole circle (at -12.7 0 180) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 14 /D2/SDA)) + (pad 4 thru_hole circle (at -10.16 0 180) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 15 /D3/SCL)) + (pad 5 thru_hole circle (at -7.62 0 180) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 16 /D4)) + (pad 6 thru_hole circle (at -5.08 0 180) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 17 /D5)) + (pad 7 thru_hole circle (at -2.54 0 180) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 18 /D6)) + (pad 8 thru_hole circle (at 0 0 180) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 19 /D7)) + (pad 9 thru_hole circle (at 2.54 0 180) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 20 /D8)) + (pad 10 thru_hole circle (at 5.08 0 180) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 21 /D9)) + (pad 11 thru_hole circle (at 7.62 0 180) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 10 /D10)) + (pad 12 thru_hole circle (at 10.16 0 180) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 11 /D11)) + (pad 13 thru_hole circle (at 12.7 0 180) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 12 /D12)) + (pad 14 thru_hole circle (at 15.24 0 180) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 13 /D13)) + (pad 15 thru_hole circle (at 17.78 0 180) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 24 GND)) + ) + + (module PIN_ARRAY_13x1 locked (layer F.Cu) (tedit 5544DD70) (tstamp 54A93327) + (at 77.54 127.46 180) + (descr "Double rangee de contacts 2 x 5 pins") + (tags CONN) + (path /54A91C6A) + (fp_text reference J4 (at 0 -2.54 180) (layer F.SilkS) hide + (effects (font (size 1.016 1.016) (thickness 0.2032))) + ) + (fp_text value ANALOG_POWER (at 0 2.54 180) (layer F.SilkS) hide + (effects (font (size 1.016 1.016) (thickness 0.2032))) + ) + (fp_line (start -16.51 -1.27) (end 16.51 -1.27) (layer F.SilkS) (width 0.15)) + (fp_line (start 16.51 -1.27) (end 16.51 1.27) (layer F.SilkS) (width 0.15)) + (fp_line (start 16.51 1.27) (end -16.51 1.27) (layer F.SilkS) (width 0.15)) + (fp_line (start -16.51 1.27) (end -16.51 -1.27) (layer F.SilkS) (width 0.15)) + (pad 1 thru_hole rect (at -15.24 0 180) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 6 /A5)) + (pad 2 thru_hole circle (at -12.7 0 180) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 5 /A4)) + (pad 3 thru_hole circle (at -10.16 0 180) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 4 /A3)) + (pad 4 thru_hole circle (at -7.62 0 180) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 3 /A2)) + (pad 5 thru_hole circle (at -5.08 0 180) (size 1.524 1.524) (drill 1.016) (layers *.Cu *.Mask F.SilkS) + (net 2 /A1)) + (pad 6 thru_hole circle (at -2.54 0 180) (size 1.524 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"" 0 0 50 H V C CNN +DRAW +P 2 0 1 0 -30 50 0 100 N +P 2 0 1 0 0 0 0 100 N +P 2 0 1 0 0 100 30 50 N +X +5V 1 0 0 0 U 50 50 1 1 W N +ENDDRAW +ENDDEF +# +# ANT +# +DEF ANT E 0 40 Y Y 1 F N +F0 "E" 50 400 60 H V C CNN +F1 "ANT" 200 200 60 H V C CNN +F2 "" -50 0 60 H I C CNN +F3 "" -50 0 60 H I C CNN +$FPLIST + TRACE_ANTENNA_2.4GHZ_15.2MM +$ENDFPLIST +DRAW +C 50 150 50 0 1 0 N +P 2 0 1 0 50 250 50 50 N +P 3 0 1 0 0 150 -50 150 -50 50 N +P 4 0 1 0 50 250 150 350 -50 350 50 250 N +X ~ 1 50 -150 200 U 50 50 1 1 I +X ~ 2 -50 -150 200 U 50 50 1 1 I +ENDDRAW +ENDDEF +# +# ATSAMD21E +# +DEF ATSAMD21E U 0 40 Y Y 1 F N +F0 "U" 200 1500 60 H V C CNN +F1 "ATSAMD21E" 0 -200 60 V V C CNN +F2 "" -800 -1450 60 H V C CNN +F3 "" -800 -1450 60 H V C CNN +$FPLIST + TQFP32 +$ENDFPLIST +DRAW +S -550 1450 700 -1650 0 1 0 f +X XIN32/PA00 1 850 1350 150 L 40 30 1 1 B +X XOUT32/PA01 2 850 1250 150 L 40 30 1 1 B +X AIN0/DAC/PA02 3 850 1150 150 L 40 30 1 1 B +X AIN1/PA03 4 850 1050 150 L 40 30 1 1 B +X TCC0_W0/AIN4/PA04 5 850 950 150 L 40 30 1 1 B +X TCC0_W1/AIN5/PA05 6 850 850 150 L 40 30 1 1 B +X TCC1_W0/AIN6/PA06 7 850 750 150 L 40 30 1 1 B +X TCC1_W1/AIN7/PA07 8 850 650 150 L 40 30 1 1 B +X VDDANA 9 -200 1600 150 D 40 30 1 1 W +X GNDANA 10 -100 -1800 150 U 40 30 1 1 W +X SERCOM1:3/PA19 20 850 -550 150 L 40 30 1 1 B +X VDDIN 30 200 1600 150 D 40 30 1 1 W +X SERCOM0:0/AIN16/PA08 11 850 550 150 L 40 30 1 1 B +X SERCOM3:0/PA22 21 850 -850 150 L 40 30 1 1 B +X SWCLK/PA30 31 850 -1450 150 L 40 30 1 1 B +X SERCOM0:1/AIN17/PA09 12 850 450 150 L 40 30 1 1 B +X SERCOM3:1/PA23 22 850 -950 150 L 40 30 1 1 B +X SWDIO/PA31 32 850 -1550 150 L 40 30 1 1 B +X SERCOM0:2/AIN18/PA10 13 850 350 150 L 40 30 1 1 B +X SERCOM3:2/USBDM/PA24 23 850 -1050 150 L 40 30 1 1 B +X SERCOM0:3/AIN19/PA11 14 850 250 150 L 40 30 1 1 B +X SERCOM3:3/USBDP/PA25 24 850 -1150 150 L 40 30 1 1 B +X SERCOM2:2/XIN/PA14 15 850 -50 150 L 40 30 1 1 B +X PA27 25 850 -1250 150 L 40 30 1 1 B +X SERCOM2:3/XOUT/PA15 16 850 -150 150 L 40 30 1 1 B +X RESET 26 -250 -1800 150 U 40 30 1 1 W I +X SERCOM1:0/PA16 17 850 -250 150 L 40 30 1 1 B +X PA28 27 850 -1350 150 L 40 30 1 1 B +X SERCOM1:1/PA17 18 850 -350 150 L 40 30 1 1 B +X GND 28 0 -1800 150 U 40 30 1 1 W +X SERCOM1:2/PA18 19 850 -450 150 L 40 30 1 1 B +X VDDCORE 29 300 1600 150 D 40 30 1 1 w +ENDDRAW +ENDDEF +# +# CONN_01X04 +# +DEF CONN_01X04 P 0 40 Y N 1 F N +F0 "P" 0 250 50 H V C CNN +F1 "CONN_01X04" 100 0 50 V V C CNN +F2 "" 0 0 50 H V C CNN +F3 "" 0 0 50 H V C CNN +$FPLIST + Pin_Header_Straight_1X04 + Pin_Header_Angled_1X04 + Socket_Strip_Straight_1X04 + Socket_Strip_Angled_1X04 +$ENDFPLIST +DRAW +S -50 -145 10 -155 0 1 0 N +S -50 -45 10 -55 0 1 0 N +S -50 55 10 45 0 1 0 N +S -50 155 10 145 0 1 0 N +S -50 200 50 -200 0 1 0 N +X P1 1 -200 150 150 R 50 50 1 1 P +X P2 2 -200 50 150 R 50 50 1 1 P +X P3 3 -200 -50 150 R 50 50 1 1 P +X P4 4 -200 -150 150 R 50 50 1 1 P +ENDDRAW +ENDDEF +# +# CONN_1 +# +DEF ~CONN_1 P 0 30 N N 1 F N +F0 "P" 80 0 40 H V L CNN +F1 "CONN_1" 0 55 30 H I C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +C 0 0 31 0 1 0 N +P 2 0 1 0 -30 0 -50 0 N +X 1 1 -150 0 100 R 60 60 1 1 P +ENDDRAW +ENDDEF +# +# CP1_Small +# +DEF CP1_Small C 0 10 N N 1 F N +F0 "C" 10 70 50 H V L CNN +F1 "CP1_Small" 10 -80 50 H V L CNN +F2 "" 0 0 50 H V C CNN +F3 "" 0 0 50 H V C CNN +$FPLIST + CP* + C_Axial* + C_Radial* + TantalC* + C*elec + c_elec* + SMD*_Pol +$ENDFPLIST +DRAW +A 0 -140 125 1186 614 0 1 12 N -60 -30 60 -30 +P 2 0 1 12 -60 20 60 20 N +P 2 0 1 0 -50 60 -30 60 N +P 2 0 1 0 -40 50 -40 70 N +X ~ 1 0 100 80 D 50 50 1 1 P +X ~ 2 0 -100 80 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# C_Small +# +DEF C_Small C 0 10 N N 1 F N +F0 "C" 10 70 50 H V L CNN +F1 "C_Small" 10 -80 50 H V L CNN +F2 "" 0 0 50 H V C CNN +F3 "" 0 0 50 H V C CNN +$FPLIST + C? + C_????_* + C_???? + SMD*_c + Capacitor* +$ENDFPLIST +DRAW +P 2 0 1 13 -60 -20 60 -20 N +P 2 0 1 12 -60 20 60 20 N +X ~ 1 0 100 80 D 50 50 1 1 P +X ~ 2 0 -100 80 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# Crystal_Small +# +DEF Crystal_Small Y 0 40 N N 1 F N +F0 "Y" 0 100 50 H V C CNN +F1 "Crystal_Small" 0 -100 50 H V C CNN +F2 "" 0 0 50 H V C CNN +F3 "" 0 0 50 H V C CNN +$FPLIST + Crystal* +$ENDFPLIST +DRAW +S -30 -60 30 60 0 1 0 N +P 2 0 1 15 -50 -30 -50 30 N +P 2 0 1 15 50 -30 50 30 N +X 1 1 -100 0 50 R 50 50 1 1 P +X 2 2 100 0 50 L 50 50 1 1 P +ENDDRAW +ENDDEF +# +# F_Small +# +DEF F_Small F 0 10 N N 1 F N +F0 "F" -40 60 50 H V L CNN +F1 "F_Small" -120 -60 50 H V L CNN +F2 "" 0 0 50 H V C CNN +F3 "" 0 0 50 H V C CNN +$FPLIST + CP* + SM* +$ENDFPLIST +DRAW +S -50 20 50 -20 0 1 0 N +P 2 0 1 0 -50 0 50 0 N +X ~ 1 -100 0 50 R 40 40 1 1 P +X ~ 2 100 0 50 L 40 40 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 -250 50 H I C CNN +F1 "GND" 0 -150 50 H V C CNN +F2 "" 0 0 50 H V C CNN +F3 "" 0 0 50 H V C CNN +DRAW +P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N +X GND 1 0 0 0 D 50 50 1 1 W N +ENDDRAW +ENDDEF +# +# HT7833_SOT89 +# +DEF HT7833_SOT89 U 0 30 Y Y 1 F N +F0 "U" 0 300 50 H V C CNN +F1 "HT7833_SOT89" 0 225 50 H V C CNN +F2 "SOT89" 0 150 40 H V C CNN +F3 "" 0 -50 60 H V C CNN +DRAW +S -200 -150 200 75 0 1 0 f +X GND 1 0 -250 100 U 40 40 1 1 I +X VIN 2 -300 0 100 R 40 40 1 1 I +X VOUT 3 300 0 100 L 40 40 1 1 w +ENDDRAW +ENDDEF +# +# L_Small +# +DEF L_Small L 0 10 N N 1 F N +F0 "L" 30 40 50 H V L CNN +F1 "L_Small" 30 -40 50 H V L CNN +F2 "" 0 0 50 H V C CNN +F3 "" 0 0 50 H V C CNN +$FPLIST + Choke_* + *Coil* +$ENDFPLIST +DRAW +A 0 -60 20 -899 899 0 1 0 N 0 -80 0 -40 +A 0 -20 20 -899 899 0 1 0 N 0 -40 0 0 +A 0 20 20 -899 899 0 1 0 N 0 0 0 40 +A 0 60 20 -899 899 0 1 0 N 0 40 0 80 +X ~ 1 0 100 20 D 50 50 1 1 P +X ~ 2 0 -100 20 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# Led_Small +# +DEF Led_Small D 0 10 N N 1 F N +F0 "D" -50 125 50 H V L CNN +F1 "Led_Small" -175 -100 50 H V L CNN +F2 "" 0 0 50 V V C CNN +F3 "" 0 0 50 V V C CNN +$FPLIST + LED-* + LED_* +$ENDFPLIST +DRAW +P 2 0 1 0 -30 -40 -30 40 N +P 4 0 1 0 30 -40 -30 0 30 40 30 -40 F +P 5 0 1 0 0 30 -20 50 -10 50 -20 50 -20 40 N +P 5 0 1 0 20 50 0 70 10 70 0 70 0 60 N +X K 1 -100 0 70 R 40 40 1 1 P +X A 2 100 0 70 L 40 40 1 1 P +ENDDRAW +ENDDEF +# +# PCIE-MINI +# +DEF PCIE-MINI J 0 40 Y Y 1 F N +F0 "J" 0 -100 50 H V C CNN +F1 "PCIE-MINI" 0 100 50 H V C CNN +F2 "MODULE" 0 0 50 H I C CNN +F3 "" 0 -1400 50 H I C CNN +DRAW +S -600 -1450 600 1450 1 0 0 f +X PIN1 1 -900 1250 300 R 50 50 1 1 P +X 3.3V 2 900 1250 300 L 50 50 1 1 P +X RESERVED 3 -900 1150 300 R 50 50 1 1 P +X GND 4 900 1150 300 L 50 50 1 1 P +X RESERVED 5 -900 1050 300 R 50 50 1 1 P +X 1.5V 6 900 1050 300 L 50 50 1 1 P +X CLKREQ# 7 -900 950 300 R 50 50 1 1 P +X VCC 8 900 950 300 L 50 50 1 1 P +X GND 9 -900 850 300 R 50 50 1 1 P +X I/O 10 900 850 300 L 50 50 1 1 P +X RESERVED 20 900 350 300 L 50 50 1 1 P +X SMB_CLK 30 900 -150 300 L 50 50 1 1 P +X GND 40 900 -650 300 L 50 50 1 1 P +X GND 50 900 -1150 300 L 50 50 1 1 P +X REFCLK- 11 -900 750 300 R 50 50 1 1 P +X GND 21 -900 250 300 R 50 50 1 1 P +X PETn0 31 -900 -250 300 R 50 50 1 1 P +X RESERVED 41 -900 -750 300 R 50 50 1 1 P +X RESERVED 51 -900 -1250 300 R 50 50 1 1 P +X CLK 12 900 750 300 L 50 50 1 1 P +X PERST# 22 900 250 300 L 50 50 1 1 P +X SMB_DATA 32 900 -250 300 L 50 50 1 1 P +X LED_WWAN# 42 900 -750 300 L 50 50 1 1 P +X 3.3V 52 900 -1250 300 L 50 50 1 1 P +X REFCLK+ 13 -900 650 300 R 50 50 1 1 P +X PERn0 23 -900 150 300 R 50 50 1 1 P +X PETp0 33 -900 -350 300 R 50 50 1 1 P +X RESERVED 43 -900 -850 300 R 50 50 1 1 P +X RST 14 900 650 300 L 50 50 1 1 P +X 3.3Vaux 24 900 150 300 L 50 50 1 1 P +X GND 34 900 -350 300 L 50 50 1 1 P +X LED_WLAN# 44 900 -850 300 L 50 50 1 1 P +X GND 15 -900 550 300 R 50 50 1 1 P +X PERp0 25 -900 50 300 R 50 50 1 1 P +X GND 35 -900 -450 300 R 50 50 1 1 P +X RESERVED 45 -900 -950 300 R 50 50 1 1 P +X VPP 16 900 550 300 L 50 50 1 1 P +X GND 26 900 50 300 L 50 50 1 1 P +X USB_D- 36 900 -450 300 L 50 50 1 1 P +X LED_WPAN# 46 900 -950 300 L 50 50 1 1 P +X RESERVED 17 -900 450 300 R 50 50 1 1 P +X GND 27 -900 -50 300 R 50 50 1 1 P +X RESERVED 37 -900 -550 300 R 50 50 1 1 P +X RESERVED 47 -900 -1050 300 R 50 50 1 1 P +X GND 18 900 450 300 L 50 50 1 1 P +X 1.5V 28 900 -50 300 L 50 50 1 1 P +X USB_D+ 38 900 -550 300 L 50 50 1 1 P +X 1.5V 48 900 -1050 300 L 50 50 1 1 P +X RESERVED 19 -900 350 300 R 50 50 1 1 P +X GND 29 -900 -150 300 R 50 50 1 1 P +X RESERVED 39 -900 -650 300 R 50 50 1 1 P +X RESERVED 49 -900 -1150 300 R 50 50 1 1 P +ENDDRAW +ENDDEF +# +# Prog_xPablo_6pin_X +# +DEF Prog_xPablo_6pin_X PR 0 0 N Y 1 F N +F0 "PR" -200 300 40 H V L CNN +F1 "Prog_xPablo_6pin_X" -140 -295 40 H V C CNN +F2 "PROG_6pin" -145 -350 30 H V C CNN +F3 "" 0 0 60 H V C CNN +$FPLIST + PROG_6pin +$ENDFPLIST +DRAW +T 0 -175 100 30 0 0 0 1 Normal 0 C C +T 0 -125 100 30 0 0 0 2 Normal 0 C C +T 0 -175 0 30 0 0 0 3 Normal 0 C C +T 0 -125 0 30 0 0 0 4 Normal 0 C C +T 0 -175 -100 30 0 0 0 5 Normal 0 C C +T 0 -125 -100 30 0 0 0 6 Normal 0 C C +C -225 -200 35 0 1 0 N +C -225 -100 35 0 1 0 F +C -225 0 35 0 1 0 F +C -225 100 35 0 1 0 F +C -150 200 35 0 1 0 N +C -75 -200 35 0 1 0 N +C -75 -100 35 0 1 0 F +C -75 0 35 0 1 0 F +C -75 100 35 0 1 0 F +P 2 0 1 0 -300 -100 -225 -100 N +P 2 0 1 0 -300 0 -225 0 N +P 2 0 1 0 -300 100 -225 100 N +P 2 0 1 0 0 -100 -75 -100 N +P 2 0 1 0 0 0 -75 0 N +P 2 0 1 0 0 100 -75 100 N +P 7 0 1 0 -275 -250 -275 150 -200 250 -100 250 -25 150 -25 -250 -275 -250 f +X ~ 1 -350 100 50 R 40 35 1 1 P +X ~ 2 50 100 50 L 40 35 1 1 P +X ~ 3 -350 0 50 R 40 35 1 1 P +X ~ 4 50 0 50 L 40 35 1 1 P +X ~ 5 -350 -100 50 R 40 35 1 1 P +X ~ 6 50 -100 50 L 40 35 1 1 P +ENDDRAW +ENDDEF +# +# RFM69HW +# +DEF RFM69HW U 0 40 Y Y 1 F N +F0 "U" -350 250 40 H V C CNN +F1 "RFM69HW" 250 -750 40 H V C CNN +F2 "xPablo:RFM69HW_SMD_ThroughHole_Handsoldering" 0 0 30 H I C CIN +F3 "" 0 0 60 H V C CNN +$FPLIST + RFM69* +$ENDFPLIST +DRAW +S -400 200 400 -700 0 1 10 f +X RESET 1 -550 -550 150 R 40 40 1 1 B +X DIO0 2 550 0 150 L 40 40 1 1 B +X DIO1 3 550 -100 150 L 40 40 1 1 B +X DIO2 4 550 -200 150 L 40 40 1 1 B +X DIO3 5 550 -300 150 L 40 40 1 1 B +X DIO4 6 550 -400 150 L 40 40 1 1 B +X DIO5 7 550 -500 150 L 40 40 1 1 B +X 3.3V 8 0 350 150 D 40 40 1 1 W +X GND 9 -100 -850 150 U 40 40 1 1 W +X ANA 10 -550 150 150 R 40 40 1 1 P +X GND 11 100 -850 150 U 40 40 1 1 W +X SCK 12 -550 -350 150 R 40 40 1 1 I +X MISO 13 -550 -250 150 R 40 40 1 1 T +X MOSI 14 -550 -150 150 R 40 40 1 1 I +X NSS 15 -550 -50 150 R 40 40 1 1 I +X NC 16 -550 -650 150 R 40 40 1 1 P +ENDDRAW +ENDDEF +# +# RFM95HW +# +DEF RFM95HW U 0 40 Y Y 1 F N +F0 "U" -350 250 40 H V C CNN +F1 "RFM95HW" 250 -750 40 H V C CNN +F2 "xPablo:RFM69HW_SMD_ThroughHole_Handsoldering" 0 0 30 H I C CIN +F3 "" 0 0 60 H V C CNN +$FPLIST + RFM95* +$ENDFPLIST +DRAW +S -400 200 400 -700 0 1 10 f +X GND 1 -100 -850 150 U 40 40 1 1 W +X MISO 2 -550 -250 150 R 40 40 1 1 T +X MOSI 3 -550 -150 150 R 40 40 1 1 I +X SCK 4 -550 -350 150 R 40 40 1 1 I +X NSS 5 -550 -50 150 R 40 40 1 1 I +X RESET 6 -550 -550 150 R 40 40 1 1 B +X DIO5 7 550 -500 150 L 40 40 1 1 B +X GND 8 0 -850 150 U 40 40 1 1 W +X ANA 9 -550 150 150 R 40 40 1 1 P +X GND 10 100 -850 150 U 40 40 1 1 W +X DIO3 11 550 -300 150 L 40 40 1 1 B +X DIO4 12 550 -400 150 L 40 40 1 1 B +X 3.3V 13 0 350 150 D 40 40 1 1 W +X DIO0 14 550 0 150 L 40 40 1 1 B +X DIO1 15 550 -100 150 L 40 40 1 1 B +X DIO2 16 550 -200 150 L 40 40 1 1 B +ENDDRAW +ENDDEF +# +# R_Small +# +DEF R_Small R 0 10 N N 1 F N +F0 "R" 30 20 50 H V L CNN +F1 "R_Small" 30 -40 50 H V L CNN +F2 "" 0 0 50 H V C CNN +F3 "" 0 0 50 H V C CNN +$FPLIST + Resistor_* + R_* +$ENDFPLIST +DRAW +S -30 70 30 -70 0 1 8 N +X ~ 1 0 100 30 D 50 50 1 1 P +X ~ 2 0 -100 30 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +#End Library diff --git a/pcielora.kicad_pcb b/pcielora.kicad_pcb new file mode 100644 index 0000000..714bcd5 --- /dev/null +++ b/pcielora.kicad_pcb @@ -0,0 +1,4562 @@ +(kicad_pcb (version 4) (host pcbnew 4.0.4-stable) + + (general + (links 194) + (no_connects 0) + (area 113.533 64.5054 170.129719 98.678) + (thickness 1) + (drawings 17) + (tracks 515) + (zones 0) + (modules 128) + (nets 31) + ) + + (page A4) + (layers + (0 F.Cu signal) + (31 B.Cu signal) + (32 B.Adhes user) + (33 F.Adhes user) + (34 B.Paste user) + (35 F.Paste user) + (36 B.SilkS user) + (37 F.SilkS user) + (38 B.Mask user) + (39 F.Mask user) + (40 Dwgs.User user) + (41 Cmts.User user) + (42 Eco1.User user) + (43 Eco2.User user) + (44 Edge.Cuts user) + ) + + (setup + (last_trace_width 0.2032) + (user_trace_width 0.254) + (user_trace_width 0.3048) + (user_trace_width 0.4064) + (user_trace_width 0.508) + (user_trace_width 0.6096) + (user_trace_width 0.8128) + (user_trace_width 1.016) + (trace_clearance 0.15) + (zone_clearance 0.254) + (zone_45_only yes) + (trace_min 0.2) + (segment_width 0.15) + (edge_width 0.1) + (via_size 0.7112) + (via_drill 0.4064) + (via_min_size 0.4) + (via_min_drill 0.3) + (user_via 0.6096 0.3048) + (user_via 0.7112 0.4064) + (user_via 0.9144 0.6096) + (uvia_size 0.3) + (uvia_drill 0.1) + (uvias_allowed no) + (uvia_min_size 0.2) + (uvia_min_drill 0.1) + (pcb_text_width 0.3) + (pcb_text_size 1.5 1.5) + (mod_edge_width 0.15) + (mod_text_size 1 1) + (mod_text_width 0.15) + (pad_size 0.6 0.6) + (pad_drill 0.3) + (pad_to_mask_clearance 0) + (aux_axis_origin 0 0) + (visible_elements 7FFEFF7F) + (pcbplotparams + (layerselection 0x010f0_80000001) + (usegerberextensions true) + (excludeedgelayer true) + (linewidth 0.150000) + (plotframeref false) + (viasonmask false) + (mode 1) + (useauxorigin false) + (hpglpennumber 1) + (hpglpenspeed 20) + (hpglpendiameter 15) + (hpglpenoverlay 2) + (psnegative false) + (psa4output false) + (plotreference true) + (plotvalue true) + (plotinvisibletext false) + (padsonsilk false) + (subtractmaskfromsilk false) + (outputformat 1) + (mirror false) + (drillshape 0) + (scaleselection 1) + (outputdirectory gerber/)) + ) + + (net 0 "") + (net 1 GND) + (net 2 +3V3) + (net 3 "Net-(C1-Pad1)") + (net 4 "Net-(C3-Pad1)") + (net 5 /ANT) + (net 6 /USB_N) + (net 7 /USB_P) + (net 8 "Net-(J1-Pad44)") + (net 9 "Net-(J1-Pad46)") + (net 10 /SCK) + (net 11 /MISO) + (net 12 /MOSI) + (net 13 /NSS) + (net 14 +5V) + (net 15 /SWCLK) + (net 16 /SWDIO) + (net 17 /SCL) + (net 18 /SDA) + (net 19 /WLAN) + (net 20 /WPAN) + (net 21 /XTAL2) + (net 22 /XTAL1) + (net 23 "Net-(D1-Pad2)") + (net 24 "Net-(F1-Pad2)") + (net 25 "Net-(R2-Pad2)") + (net 26 /RFM_DIOC) + (net 27 /RFM_DIOB) + (net 28 /RFM_DIOA) + (net 29 /RES_RFM) + (net 30 /RESET) + + (net_class Default "This is the default net class." + (clearance 0.15) + (trace_width 0.2032) + (via_dia 0.7112) + (via_drill 0.4064) + (uvia_dia 0.3) + (uvia_drill 0.1) + (add_net +3V3) + (add_net +5V) + (add_net /ANT) + (add_net /MISO) + (add_net /MOSI) + (add_net /NSS) + (add_net /RESET) + (add_net /RES_RFM) + (add_net /RFM_DIOA) + (add_net /RFM_DIOB) + (add_net /RFM_DIOC) + (add_net /SCK) + (add_net /SCL) + (add_net /SDA) + (add_net /SWCLK) + (add_net /SWDIO) + (add_net /USB_N) + (add_net /USB_P) + (add_net /WLAN) + (add_net /WPAN) + (add_net /XTAL1) + (add_net /XTAL2) + (add_net GND) + (add_net "Net-(C1-Pad1)") + (add_net "Net-(C3-Pad1)") + (add_net "Net-(D1-Pad2)") + (add_net "Net-(F1-Pad2)") + (add_net "Net-(J1-Pad44)") + (add_net "Net-(J1-Pad46)") + (add_net "Net-(R2-Pad2)") + ) + + (module xPablo:VIA-0.6mm (layer F.Cu) (tedit 5882254C) (tstamp 58871FF3) + (at 125.2855 84.3815) + (fp_text reference REF** (at 0.0254 2.032) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value VIA-0.6mm (at 0.0254 -1.7526) (layer F.Fab) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (pad 1 thru_hole circle (at 0 0) (size 0.6 0.6) (drill 0.3) (layers *.Cu) + (net 1 GND) (zone_connect 2)) + ) + + (module xPablo:VIA-0.6mm (layer F.Cu) (tedit 5882254C) (tstamp 588369E6) + (at 129.667 95.621) + (fp_text reference REF** (at 0.0254 2.032) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value VIA-0.6mm (at 0.0254 -1.7526) (layer F.Fab) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (pad 1 thru_hole circle (at 0 0) (size 0.6 0.6) (drill 0.3) (layers *.Cu) + (net 1 GND) (zone_connect 2)) + ) + + (module xPablo:VIA-0.6mm (layer F.Cu) (tedit 5882254C) (tstamp 588369D6) + (at 119.38 95.621) + (fp_text reference REF** (at 0.0254 2.032) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value VIA-0.6mm (at 0.0254 -1.7526) (layer F.Fab) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (pad 1 thru_hole circle (at 0 0) (size 0.6 0.6) (drill 0.3) (layers *.Cu) + (net 1 GND) (zone_connect 2)) + ) + + (module xPablo:VIA-0.6mm (layer F.Cu) (tedit 5882254C) (tstamp 588369B3) + (at 159.246 95.621) + (fp_text reference REF** (at 0.0254 2.032) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value VIA-0.6mm (at 0.0254 -1.7526) (layer F.Fab) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (pad 1 thru_hole circle (at 0 0) (size 0.6 0.6) (drill 0.3) (layers *.Cu) + (net 1 GND) (zone_connect 2)) + ) + + (module xPablo:VIA-0.6mm (layer F.Cu) (tedit 5882254C) (tstamp 588369AF) + (at 158.146 95.621) + (fp_text reference REF** (at 0.0254 2.032) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value VIA-0.6mm (at 0.0254 -1.7526) (layer F.Fab) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (pad 1 thru_hole circle (at 0 0) (size 0.6 0.6) (drill 0.3) (layers *.Cu) + (net 1 GND) (zone_connect 2)) + ) + + (module xPablo:VIA-0.6mm (layer F.Cu) (tedit 5882254C) (tstamp 588369AB) + (at 157.046 95.621) + (fp_text reference REF** (at 0.0254 2.032) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value VIA-0.6mm (at 0.0254 -1.7526) (layer F.Fab) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (pad 1 thru_hole circle (at 0 0) (size 0.6 0.6) (drill 0.3) (layers *.Cu) + (net 1 GND) (zone_connect 2)) + ) + + (module xPablo:VIA-0.6mm (layer F.Cu) (tedit 5882254C) (tstamp 588369A7) + (at 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2)) + ) + + (module xPablo:VIA-0.6mm (layer F.Cu) (tedit 58822E2A) (tstamp 58827251) + (at 130.259 71.12) + (fp_text reference REF** (at 0.0254 2.032) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value VIA-0.6mm (at 0.0254 -1.7526) (layer F.Fab) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (pad 1 thru_hole circle (at 0 0) (size 0.6 0.6) (drill 0.3) (layers *.Cu) + (net 14 +5V) (zone_connect 2)) + ) + + (module xPablo:VIA-0.6mm (layer F.Cu) (tedit 5882254C) (tstamp 58827234) + (at 160.909 79.883) + (fp_text reference REF** (at 0.0254 2.032) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value VIA-0.6mm (at 0.0254 -1.7526) (layer F.Fab) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (pad 1 thru_hole circle (at 0 0) (size 0.6 0.6) (drill 0.3) (layers *.Cu) + (net 1 GND) (zone_connect 2)) + ) + + (module xPablo:VIA-0.6mm (layer F.Cu) (tedit 5882254C) (tstamp 5882722F) + (at 160.528 81.534) + (fp_text reference REF** (at 0.0254 2.032) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value VIA-0.6mm (at 0.0254 -1.7526) (layer F.Fab) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (pad 1 thru_hole circle (at 0 0) (size 0.6 0.6) (drill 0.3) (layers *.Cu) + (net 1 GND) (zone_connect 2)) + ) + + (module xPablo:VIA-0.6mm (layer F.Cu) (tedit 5882254C) (tstamp 5882722A) + (at 159.131 81.534) + (fp_text reference REF** (at 0.0254 2.032) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value VIA-0.6mm (at 0.0254 -1.7526) (layer F.Fab) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (pad 1 thru_hole circle (at 0 0) (size 0.6 0.6) (drill 0.3) (layers *.Cu) + (net 1 GND) (zone_connect 2)) + ) + + (module xPablo:VIA-0.6mm (layer F.Cu) (tedit 5882254C) (tstamp 58827225) + (at 159.639 79.883) + (fp_text reference REF** (at 0.0254 2.032) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value VIA-0.6mm (at 0.0254 -1.7526) (layer F.Fab) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (pad 1 thru_hole circle (at 0 0) (size 0.6 0.6) (drill 0.3) (layers *.Cu) + (net 1 GND) (zone_connect 2)) + ) + + (module xPablo:VIA-0.6mm (layer F.Cu) (tedit 5882254C) (tstamp 58827220) + (at 157.988 80.772) + (fp_text reference REF** (at 0.0254 2.032) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value VIA-0.6mm (at 0.0254 -1.7526) (layer F.Fab) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (pad 1 thru_hole circle (at 0 0) (size 0.6 0.6) (drill 0.3) (layers *.Cu) + (net 1 GND) (zone_connect 2)) + ) + + (module xPablo:VIA-0.6mm (layer F.Cu) (tedit 5882254C) (tstamp 5882721B) + (at 159.131 78.867) + (fp_text reference REF** (at 0.0254 2.032) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value VIA-0.6mm (at 0.0254 -1.7526) (layer F.Fab) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (pad 1 thru_hole circle (at 0 0) (size 0.6 0.6) (drill 0.3) (layers *.Cu) + (net 1 GND) (zone_connect 2)) + ) + + (module xPablo:VIA-0.6mm (layer F.Cu) (tedit 5882254C) (tstamp 58827216) + (at 157.353 78.867) + (fp_text reference REF** (at 0.0254 2.032) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value VIA-0.6mm (at 0.0254 -1.7526) (layer F.Fab) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (pad 1 thru_hole circle (at 0 0) (size 0.6 0.6) (drill 0.3) (layers *.Cu) + (net 1 GND) (zone_connect 2)) + ) + + (module xPablo:VIA-0.6mm (layer F.Cu) (tedit 5882254C) (tstamp 58827211) + (at 159.131 75.057) + (fp_text reference REF** (at 0.0254 2.032) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value VIA-0.6mm (at 0.0254 -1.7526) (layer F.Fab) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (pad 1 thru_hole circle (at 0 0) (size 0.6 0.6) (drill 0.3) (layers *.Cu) + (net 1 GND) (zone_connect 2)) + ) + + (module xPablo:VIA-0.6mm (layer F.Cu) (tedit 5882254C) (tstamp 5882720C) + (at 158.75 73.787) + (fp_text reference REF** (at 0.0254 2.032) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value VIA-0.6mm (at 0.0254 -1.7526) (layer F.Fab) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (pad 1 thru_hole circle (at 0 0) (size 0.6 0.6) (drill 0.3) (layers *.Cu) + (net 1 GND) (zone_connect 2)) + ) + + (module xPablo:VIA-0.6mm (layer F.Cu) (tedit 5882254C) (tstamp 58827207) + (at 157.353 74.803) + (fp_text reference REF** (at 0.0254 2.032) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value VIA-0.6mm (at 0.0254 -1.7526) (layer F.Fab) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (pad 1 thru_hole circle (at 0 0) (size 0.6 0.6) (drill 0.3) (layers *.Cu) + (net 1 GND) (zone_connect 2)) + ) + + (module xPablo:VIA-0.6mm (layer F.Cu) (tedit 5882254C) (tstamp 58827202) + (at 156.21 73.787) + (fp_text reference REF** (at 0.0254 2.032) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value VIA-0.6mm (at 0.0254 -1.7526) (layer F.Fab) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (pad 1 thru_hole circle (at 0 0) (size 0.6 0.6) (drill 0.3) (layers *.Cu) + (net 1 GND) (zone_connect 2)) + ) + + (module xPablo:VIA-0.6mm (layer F.Cu) (tedit 5882254C) (tstamp 588271FD) + (at 157.607 72.644) + (fp_text reference REF** (at 0.0254 2.032) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value VIA-0.6mm (at 0.0254 -1.7526) (layer F.Fab) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (pad 1 thru_hole circle (at 0 0) (size 0.6 0.6) (drill 0.3) (layers *.Cu) + (net 1 GND) (zone_connect 2)) + ) + + (module xPablo:VIA-0.6mm (layer F.Cu) (tedit 5882254C) (tstamp 588271F8) + (at 155.321 72.644) + (fp_text reference REF** (at 0.0254 2.032) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value VIA-0.6mm (at 0.0254 -1.7526) (layer F.Fab) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (pad 1 thru_hole circle (at 0 0) (size 0.6 0.6) (drill 0.3) (layers *.Cu) + (net 1 GND) (zone_connect 2)) + ) + + (module Resistors_SMD:R_0603_HandSoldering (layer F.Cu) (tedit 58822A6B) (tstamp 587B907E) + (at 140.716 80.899 225) + (descr "Resistor SMD 0603, hand soldering") + (tags "resistor 0603") + (path /587B8588) + (attr smd) + (fp_text reference L1 (at -0.089803 -1.347038 225) (layer F.SilkS) + (effects (font (size 0.8 0.8) (thickness 0.15))) + ) + (fp_text value BLM18PG471SN1 (at 0 1.9 225) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -2 -0.8) (end 2 -0.8) (layer F.CrtYd) (width 0.05)) + (fp_line (start -2 0.8) (end 2 0.8) (layer F.CrtYd) (width 0.05)) + (fp_line (start -2 -0.8) (end -2 0.8) (layer F.CrtYd) (width 0.05)) + (fp_line (start 2 -0.8) (end 2 0.8) (layer F.CrtYd) (width 0.05)) + (fp_line (start 0.5 0.675) (end -0.5 0.675) (layer F.SilkS) (width 0.15)) + (fp_line (start -0.5 -0.675) (end 0.5 -0.675) (layer F.SilkS) (width 0.15)) + (pad 1 smd rect (at -1.1 0 225) (size 1.2 0.9) (layers F.Cu F.Paste F.Mask) + (net 2 +3V3)) + (pad 2 smd rect (at 1.1 0 225) (size 1.2 0.9) (layers F.Cu F.Paste F.Mask) + (net 3 "Net-(C1-Pad1)")) + (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitors_SMD:C_0603_HandSoldering (layer F.Cu) (tedit 58822B9B) (tstamp 587CC2D0) + (at 160.655 88.011 90) + (descr "Capacitor SMD 0603, hand soldering") + (tags "capacitor 0603") + (path /587CE402) + (attr smd) + (fp_text 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F.Cu F.Paste F.Mask) + (net 2 +3V3)) + (pad 2 smd rect (at 0.95 0 90) (size 1.2 0.75) (layers F.Cu F.Paste F.Mask) + (net 1 GND)) + (model Capacitors_SMD.3dshapes/C_0603_HandSoldering.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module xPablo:CT-A (layer F.Cu) (tedit 58822B9D) (tstamp 587CC2D6) + (at 162.6235 87.884 270) + (path /587CE441) + (attr smd) + (fp_text reference C5 (at 0 -1.7145 270) (layer F.SilkS) + (effects (font (size 0.8 0.8) (thickness 0.15))) + ) + (fp_text value 47uF/6.3V (at 0 2.032 270) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 0.9525 -0.762) (end 0.9525 0.762) (layer F.SilkS) (width 0.15)) + (fp_line (start 1.0795 -0.762) (end 1.0795 0.762) (layer F.SilkS) (width 0.15)) + (fp_line (start 1.2065 -0.762) (end 1.2065 0.762) (layer F.SilkS) (width 0.15)) + (fp_line (start 1.3335 -0.762) (end 1.3335 0.762) (layer F.SilkS) (width 0.15)) + (fp_line (start 1.4605 -0.762) (end 1.4605 0.762) (layer F.SilkS) (width 0.15)) + (fp_line (start 1.5875 -0.762) (end 1.5875 0.762) (layer F.SilkS) (width 0.15)) + (fp_line (start -1.5875 -0.762) (end -1.5875 0.762) (layer F.SilkS) (width 0.15)) + (fp_line (start -1.5875 0.762) (end 1.5875 0.762) (layer F.SilkS) (width 0.15)) + (fp_line (start -1.5875 -0.762) (end 1.5875 -0.762) (layer F.SilkS) (width 0.15)) + (pad 1 smd rect (at 1.42748 0 90) (size 1.143 1.651) (layers F.Cu F.Paste F.Mask) + (net 2 +3V3)) + (pad 2 smd rect (at -1.42748 0 90) (size 1.143 1.651) (layers F.Cu F.Paste F.Mask) + (net 1 GND)) + (model ${KICADXPABLO}/xPablo.pretty/3D/c_tant_A.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistors_SMD:R_0603_HandSoldering (layer F.Cu) (tedit 58822973) (tstamp 587CC2DC) + (at 130.0734 81.5848 270) + (descr "Resistor SMD 0603, hand soldering") + (tags "resistor 0603") + (path /587DF32B) + (attr smd) + (fp_text reference R1 (at 0.4572 1.2954 270) (layer F.SilkS) + (effects (font (size 0.8 0.8) (thickness 0.15))) + ) + (fp_text value 10k (at 0 1.9 270) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -2 -0.8) (end 2 -0.8) (layer F.CrtYd) (width 0.05)) + (fp_line (start -2 0.8) (end 2 0.8) (layer F.CrtYd) (width 0.05)) + (fp_line (start -2 -0.8) (end -2 0.8) (layer F.CrtYd) (width 0.05)) + (fp_line (start 2 -0.8) (end 2 0.8) (layer F.CrtYd) (width 0.05)) + (fp_line (start 0.5 0.675) (end -0.5 0.675) (layer F.SilkS) (width 0.15)) + (fp_line (start -0.5 -0.675) (end 0.5 -0.675) (layer F.SilkS) (width 0.15)) + (pad 1 smd rect (at -1.1 0 270) (size 1.2 0.9) (layers F.Cu F.Paste F.Mask) + (net 2 +3V3)) + (pad 2 smd rect (at 1.1 0 270) (size 1.2 0.9) (layers F.Cu F.Paste F.Mask) + (net 30 /RESET)) + (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistors_SMD:R_0603_HandSoldering (layer F.Cu) (tedit 588604A3) (tstamp 587CC2E2) + (at 134.1755 72.7075 270) + (descr "Resistor SMD 0603, hand soldering") + (tags "resistor 0603") + (path /587DFFDC) + (attr smd) + (fp_text reference R2 (at 2.7305 -0.0635 270) (layer F.SilkS) + (effects (font (size 0.8 0.8) (thickness 0.15))) + ) + (fp_text value 1k5 (at 0 1.9 270) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -2 -0.8) (end 2 -0.8) (layer F.CrtYd) (width 0.05)) + (fp_line (start -2 0.8) (end 2 0.8) (layer F.CrtYd) (width 0.05)) + (fp_line (start -2 -0.8) (end -2 0.8) (layer F.CrtYd) (width 0.05)) + (fp_line (start 2 -0.8) (end 2 0.8) (layer F.CrtYd) (width 0.05)) + (fp_line (start 0.5 0.675) (end -0.5 0.675) (layer F.SilkS) (width 0.15)) + (fp_line (start -0.5 -0.675) (end 0.5 -0.675) (layer F.SilkS) (width 0.15)) + (pad 1 smd rect (at -1.1 0 270) (size 1.2 0.9) (layers F.Cu F.Paste F.Mask) + (net 23 "Net-(D1-Pad2)")) + (pad 2 smd rect (at 1.1 0 270) (size 1.2 0.9) (layers F.Cu F.Paste F.Mask) + (net 25 "Net-(R2-Pad2)")) + (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistors_SMD:R_0603_HandSoldering (layer F.Cu) (tedit 58822A08) (tstamp 587CC2EE) + (at 121.9835 81.28 270) + (descr "Resistor SMD 0603, hand soldering") + (tags "resistor 0603") + (path /587CC7B5) + (attr smd) + (fp_text reference R4 (at 0.0254 1.3208 270) (layer F.SilkS) + (effects (font (size 0.8 0.8) (thickness 0.15))) + ) + (fp_text value 10k (at 0 1.9 270) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -2 -0.8) (end 2 -0.8) (layer F.CrtYd) (width 0.05)) + (fp_line (start -2 0.8) (end 2 0.8) (layer F.CrtYd) (width 0.05)) + (fp_line (start -2 -0.8) (end -2 0.8) (layer F.CrtYd) (width 0.05)) + (fp_line (start 2 -0.8) (end 2 0.8) (layer F.CrtYd) (width 0.05)) + (fp_line (start 0.5 0.675) (end -0.5 0.675) (layer F.SilkS) (width 0.15)) + (fp_line (start -0.5 -0.675) (end 0.5 -0.675) (layer F.SilkS) (width 0.15)) + (pad 1 smd rect (at -1.1 0 270) (size 1.2 0.9) (layers F.Cu F.Paste F.Mask) + (net 19 /WLAN)) + (pad 2 smd rect (at 1.1 0 270) (size 1.2 0.9) (layers F.Cu F.Paste F.Mask) + (net 8 "Net-(J1-Pad44)")) + (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistors_SMD:R_0603_HandSoldering (layer F.Cu) (tedit 58860EF5) (tstamp 587CC2F4) + (at 123.6345 85.0265 270) + (descr "Resistor SMD 0603, hand soldering") + (tags "resistor 0603") + (path /587CC7FA) + (attr smd) + (fp_text reference R5 (at 1.397 1.27 270) (layer F.SilkS) + (effects (font (size 0.8 0.8) (thickness 0.15))) + ) + (fp_text value 10k (at 0 1.9 270) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -2 -0.8) (end 2 -0.8) (layer F.CrtYd) (width 0.05)) + (fp_line (start -2 0.8) (end 2 0.8) (layer F.CrtYd) (width 0.05)) + (fp_line (start -2 -0.8) (end -2 0.8) (layer F.CrtYd) (width 0.05)) + (fp_line (start 2 -0.8) (end 2 0.8) (layer F.CrtYd) (width 0.05)) + (fp_line (start 0.5 0.675) (end -0.5 0.675) (layer F.SilkS) (width 0.15)) + (fp_line (start -0.5 -0.675) (end 0.5 -0.675) (layer F.SilkS) (width 0.15)) + (pad 1 smd rect (at -1.1 0 270) (size 1.2 0.9) (layers F.Cu F.Paste F.Mask) + (net 20 /WPAN)) + (pad 2 smd rect (at 1.1 0 270) (size 1.2 0.9) (layers F.Cu F.Paste F.Mask) + (net 9 "Net-(J1-Pad46)")) + (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitors_SMD:C_0603_HandSoldering (layer F.Cu) (tedit 58822A66) (tstamp 587CDA98) + (at 139.6365 79.8195 225) + (descr "Capacitor SMD 0603, hand soldering") + (tags "capacitor 0603") + (path /587B87AE) + (attr smd) + (fp_text reference C1 (at -0.987828 1.257236 225) (layer F.SilkS) + (effects (font (size 0.8 0.8) (thickness 0.15))) + ) + (fp_text value 1uF (at 0 1.9 225) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -1.85 -0.75) (end 1.85 -0.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.85 0.75) (end 1.85 0.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.85 -0.75) (end -1.85 0.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.85 -0.75) (end 1.85 0.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start -0.35 -0.6) (end 0.35 -0.6) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.35 0.6) (end -0.35 0.6) (layer F.SilkS) (width 0.12)) + (pad 1 smd rect (at -0.95 0 225) (size 1.2 0.75) (layers F.Cu F.Paste F.Mask) + (net 3 "Net-(C1-Pad1)")) + (pad 2 smd rect (at 0.95 0 225) (size 1.2 0.75) (layers F.Cu F.Paste F.Mask) + (net 1 GND)) + (model Capacitors_SMD.3dshapes/C_0603_HandSoldering.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitors_SMD:C_0603_HandSoldering (layer F.Cu) (tedit 5882294A) (tstamp 587CDA9D) + (at 131.191 86.5124 315) + (descr "Capacitor SMD 0603, hand soldering") + (tags "capacitor 0603") + (path /587B90DD) + (attr smd) + (fp_text reference C2 (at -1.634407 1.239275 315) (layer F.SilkS) + (effects (font (size 0.8 0.8) (thickness 0.15))) + ) + (fp_text value 1uF (at 0 1.9 315) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -1.85 -0.75) (end 1.85 -0.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.85 0.75) (end 1.85 0.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.85 -0.75) (end -1.85 0.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.85 -0.75) (end 1.85 0.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start -0.35 -0.6) (end 0.35 -0.6) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.35 0.6) (end -0.35 0.6) (layer F.SilkS) (width 0.12)) + (pad 1 smd rect (at -0.95 0 315) (size 1.2 0.75) (layers F.Cu F.Paste F.Mask) + (net 1 GND)) + (pad 2 smd rect (at 0.95 0 315) (size 1.2 0.75) (layers F.Cu F.Paste F.Mask) + (net 2 +3V3)) + (model Capacitors_SMD.3dshapes/C_0603_HandSoldering.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitors_SMD:C_0603_HandSoldering (layer F.Cu) (tedit 58822A37) (tstamp 587CDAA2) + (at 131.572 84.8868 135) + (descr "Capacitor SMD 0603, hand soldering") + (tags "capacitor 0603") + (path /587B8EC6) + (attr smd) + (fp_text reference C3 (at -2.478551 -0.143684 135) (layer F.SilkS) + (effects (font (size 0.8 0.8) (thickness 0.15))) + ) + (fp_text value 1uF (at 0 1.9 135) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -1.85 -0.75) (end 1.85 -0.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.85 0.75) (end 1.85 0.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.85 -0.75) (end -1.85 0.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.85 -0.75) (end 1.85 0.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start -0.35 -0.6) (end 0.35 -0.6) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.35 0.6) (end -0.35 0.6) (layer F.SilkS) (width 0.12)) + (pad 1 smd rect (at -0.95 0 135) (size 1.2 0.75) (layers F.Cu F.Paste F.Mask) + (net 4 "Net-(C3-Pad1)")) + (pad 2 smd rect (at 0.95 0 135) (size 1.2 0.75) (layers F.Cu F.Paste F.Mask) + (net 1 GND)) + (model Capacitors_SMD.3dshapes/C_0603_HandSoldering.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitors_SMD:C_0603_HandSoldering (layer F.Cu) (tedit 588229CC) (tstamp 587CDAAC) + (at 128.7272 68.1736 180) + (descr "Capacitor SMD 0603, hand soldering") + (tags "capacitor 0603") + (path /587CD8DF) + (attr smd) + (fp_text reference C6 (at -2.5908 -0.0254 180) (layer F.SilkS) + (effects (font (size 0.8 0.8) (thickness 0.15))) + ) + (fp_text value 1uF (at 0 1.9 180) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -1.85 -0.75) (end 1.85 -0.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.85 0.75) (end 1.85 0.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.85 -0.75) (end -1.85 0.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.85 -0.75) (end 1.85 0.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start -0.35 -0.6) (end 0.35 -0.6) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.35 0.6) (end -0.35 0.6) (layer F.SilkS) (width 0.12)) + (pad 1 smd rect (at -0.95 0 180) (size 1.2 0.75) (layers F.Cu F.Paste F.Mask) + (net 14 +5V)) + (pad 2 smd rect (at 0.95 0 180) (size 1.2 0.75) (layers F.Cu F.Paste F.Mask) + (net 1 GND)) + (model Capacitors_SMD.3dshapes/C_0603_HandSoldering.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitors_SMD:C_0603_HandSoldering (layer F.Cu) (tedit 588229E5) (tstamp 587CDAB2) + (at 123.9266 71.7042 90) + (descr "Capacitor SMD 0603, hand soldering") + (tags "capacitor 0603") + (path /587CD938) + (attr smd) + (fp_text reference C7 (at -0.0508 -1.3716 90) (layer F.SilkS) + (effects (font (size 0.8 0.8) (thickness 0.15))) + ) + (fp_text value 1uF (at 0 1.9 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -1.85 -0.75) (end 1.85 -0.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.85 0.75) (end 1.85 0.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.85 -0.75) (end -1.85 0.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.85 -0.75) (end 1.85 0.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start -0.35 -0.6) (end 0.35 -0.6) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.35 0.6) (end -0.35 0.6) (layer F.SilkS) (width 0.12)) + (pad 1 smd rect (at -0.95 0 90) (size 1.2 0.75) (layers F.Cu F.Paste F.Mask) + (net 2 +3V3)) + (pad 2 smd rect (at 0.95 0 90) (size 1.2 0.75) (layers F.Cu F.Paste F.Mask) + (net 1 GND)) + (model Capacitors_SMD.3dshapes/C_0603_HandSoldering.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Pin_Headers:Pin_Header_Straight_1x04_Pitch2.54mm (layer F.Cu) (tedit 58822985) (tstamp 587CDBE7) + (at 126.619 78.74) + (descr "Through hole straight pin header, 1x04, 2.54mm pitch, single row") + (tags "Through hole pin header THT 1x04 2.54mm single row") + (path /587CE9F0) + (fp_text reference P1 (at 0 -2.39) (layer F.SilkS) + (effects (font (size 0.8 0.8) (thickness 0.15))) + ) + (fp_text value CONN_01X04 (at 0 10.01) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -1.27 -1.27) (end -1.27 8.89) (layer F.Fab) (width 0.1)) + (fp_line (start -1.27 8.89) (end 1.27 8.89) (layer F.Fab) (width 0.1)) + (fp_line (start 1.27 8.89) (end 1.27 -1.27) (layer F.Fab) (width 0.1)) + (fp_line (start 1.27 -1.27) (end -1.27 -1.27) (layer F.Fab) (width 0.1)) + (fp_line (start -1.39 1.27) (end -1.39 9.01) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.39 9.01) (end 1.39 9.01) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.39 9.01) (end 1.39 1.27) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.39 1.27) (end -1.39 1.27) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.39 0) (end -1.39 -1.39) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.39 -1.39) (end 0 -1.39) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.6 -1.6) (end -1.6 9.2) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.6 9.2) (end 1.6 9.2) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.6 9.2) (end 1.6 -1.6) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.6 -1.6) (end -1.6 -1.6) (layer F.CrtYd) (width 0.05)) + (pad 1 thru_hole rect (at 0 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 14 +5V)) + (pad 2 thru_hole oval (at 0 2.54) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 6 /USB_N)) + (pad 3 thru_hole oval (at 0 5.08) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 7 /USB_P)) + (pad 4 thru_hole oval (at 0 7.62) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 1 GND)) + (model Pin_Headers.3dshapes/Pin_Header_Straight_1x04_Pitch2.54mm.wrl + (at (xyz 0 -0.15 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 90)) + ) + ) + + (module TO_SOT_Packages_SMD:SOT89-3_Housing_Handsoldering (layer F.Cu) (tedit 588229DD) (tstamp 587DAF33) + (at 129.1336 71.755 270) + (descr "SOT89-3, Housing, Handsoldering,") + (tags "SOT89-3, Housing, Handsoldering,") + (path /587DB049) + (attr smd) + (fp_text reference U5 (at 1.905 -2.5654 360) (layer F.SilkS) + (effects (font (size 0.8 0.8) (thickness 0.15))) + ) + (fp_text value HT7833_SOT89 (at -0.14986 5.30098 270) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -1.89992 0.20066) (end -1.651 -0.09906) (layer F.SilkS) (width 0.15)) + (fp_line (start -1.651 -0.09906) (end -1.5494 -0.24892) (layer F.SilkS) (width 0.15)) + (fp_line (start -1.5494 -0.24892) (end -1.5494 0.59944) (layer F.SilkS) (width 0.15)) + (fp_line (start -2.25044 -1.30048) (end -2.25044 0.50038) (layer F.SilkS) (width 0.15)) + (fp_line (start -2.25044 -1.30048) (end -1.6002 -1.30048) (layer F.SilkS) (width 0.15)) + (fp_line (start 2.25044 -1.30048) (end 2.25044 0.50038) (layer F.SilkS) (width 0.15)) + (fp_line (start 2.25044 -1.30048) (end 1.6002 -1.30048) (layer F.SilkS) (width 0.15)) + (pad 1 smd rect (at -1.50114 2.35204 270) (size 1.00076 2.5019) (layers F.Cu F.Paste F.Mask) + (net 1 GND)) + (pad 2 smd rect (at 0 2.35204 270) (size 1.00076 2.5019) (layers F.Cu F.Paste F.Mask) + (net 14 +5V)) + (pad 3 smd rect (at 1.50114 2.35204 270) (size 1.00076 2.5019) (layers F.Cu F.Paste F.Mask) + (net 2 +3V3)) + (pad 2 smd rect (at 0 -1.6002 270) (size 1.99898 4.0005) (layers F.Cu F.Paste F.Mask) + (net 14 +5V)) + (pad 2 smd trapezoid (at 0 0.7493 90) (size 1.50114 0.7493) (rect_delta 0 0.50038 ) (layers F.Cu F.Paste F.Mask) + (net 14 +5V)) + (model TO_SOT_Packages_SMD.3dshapes/SOT89-3_Housing_Handsoldering.wrl + (at (xyz 0 0 0)) + (scale (xyz 0.3937 0.3937 0.3937)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitors_SMD:C_0603_HandSoldering (layer F.Cu) (tedit 58822ACB) (tstamp 587DAFBE) + (at 151.1935 74.803) + (descr "Capacitor SMD 0603, hand soldering") + (tags "capacitor 0603") + (path /587DB72F) + (attr smd) + (fp_text reference C8 (at -1.2065 -1.143) (layer F.SilkS) + (effects (font (size 0.8 0.8) (thickness 0.15))) + ) + (fp_text value 100nF (at 0 1.9) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -1.85 -0.75) (end 1.85 -0.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.85 0.75) (end 1.85 0.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.85 -0.75) (end -1.85 0.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.85 -0.75) (end 1.85 0.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start -0.35 -0.6) (end 0.35 -0.6) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.35 0.6) (end -0.35 0.6) (layer F.SilkS) (width 0.12)) + (pad 1 smd rect (at -0.95 0) (size 1.2 0.75) (layers F.Cu F.Paste F.Mask) + (net 2 +3V3)) + (pad 2 smd rect (at 0.95 0) (size 1.2 0.75) (layers F.Cu F.Paste F.Mask) + (net 1 GND)) + (model Capacitors_SMD.3dshapes/C_0603_HandSoldering.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module xPablo:CT-A (layer F.Cu) (tedit 588720B9) (tstamp 587DAFC4) + (at 143.891 73.7235) + (path /587DB735) + (attr smd) + (fp_text reference C9 (at 0.254 -1.4605) (layer F.SilkS) + (effects (font (size 0.8 0.8) (thickness 0.15))) + ) + (fp_text value 47uF/6.3V (at 0 2.032) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 0.9525 -0.762) (end 0.9525 0.762) (layer F.SilkS) (width 0.15)) + (fp_line (start 1.0795 -0.762) (end 1.0795 0.762) (layer F.SilkS) (width 0.15)) + (fp_line (start 1.2065 -0.762) (end 1.2065 0.762) (layer F.SilkS) (width 0.15)) + (fp_line (start 1.3335 -0.762) (end 1.3335 0.762) (layer F.SilkS) (width 0.15)) + (fp_line (start 1.4605 -0.762) (end 1.4605 0.762) (layer F.SilkS) (width 0.15)) + (fp_line (start 1.5875 -0.762) (end 1.5875 0.762) (layer F.SilkS) (width 0.15)) + (fp_line (start -1.5875 -0.762) (end -1.5875 0.762) (layer F.SilkS) (width 0.15)) + (fp_line (start -1.5875 0.762) (end 1.5875 0.762) (layer F.SilkS) (width 0.15)) + (fp_line (start -1.5875 -0.762) (end 1.5875 -0.762) (layer F.SilkS) (width 0.15)) + (pad 1 smd rect (at 1.42748 0 180) (size 1.143 1.651) (layers F.Cu F.Paste F.Mask) + (net 2 +3V3)) + (pad 2 smd rect (at -1.42748 0 180) (size 1.143 1.651) (layers F.Cu F.Paste F.Mask) + (net 1 GND)) + (model ${KICADXPABLO}/xPablo.pretty/3D/c_tant_A.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module xPablo:CT-A (layer F.Cu) (tedit 5882297D) (tstamp 587DF766) + (at 130.4036 75.7936 180) + (path /587E4528) + (attr smd) + (fp_text reference C10 (at -0.06096 -1.7399 180) (layer F.SilkS) + (effects (font (size 0.8 0.8) (thickness 0.15))) + ) + (fp_text value 47uF/6.3V (at 0 2.032 180) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 0.9525 -0.762) (end 0.9525 0.762) (layer F.SilkS) (width 0.15)) + (fp_line (start 1.0795 -0.762) (end 1.0795 0.762) (layer F.SilkS) (width 0.15)) + (fp_line (start 1.2065 -0.762) (end 1.2065 0.762) (layer F.SilkS) (width 0.15)) + (fp_line (start 1.3335 -0.762) (end 1.3335 0.762) (layer F.SilkS) (width 0.15)) + (fp_line (start 1.4605 -0.762) (end 1.4605 0.762) (layer F.SilkS) (width 0.15)) + (fp_line (start 1.5875 -0.762) (end 1.5875 0.762) (layer F.SilkS) (width 0.15)) + (fp_line (start -1.5875 -0.762) (end -1.5875 0.762) (layer F.SilkS) (width 0.15)) + (fp_line (start -1.5875 0.762) (end 1.5875 0.762) (layer F.SilkS) (width 0.15)) + (fp_line (start -1.5875 -0.762) (end 1.5875 -0.762) (layer F.SilkS) (width 0.15)) + (pad 1 smd rect (at 1.42748 0) (size 1.143 1.651) (layers F.Cu F.Paste F.Mask) + (net 2 +3V3)) + (pad 2 smd rect (at -1.42748 0) (size 1.143 1.651) (layers F.Cu F.Paste F.Mask) + (net 1 GND)) + (model ${KICADXPABLO}/xPablo.pretty/3D/c_tant_A.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitors_SMD:C_0603_HandSoldering (layer F.Cu) (tedit 58822908) (tstamp 587DF76C) + (at 141.2494 87.2236) + (descr "Capacitor SMD 0603, hand soldering") + (tags "capacitor 0603") + (path /587DE30C) + (attr smd) + (fp_text reference C11 (at -0.0254 -1.3716) (layer F.SilkS) + (effects (font (size 0.8 0.8) (thickness 0.15))) + ) + (fp_text value 15pF (at 0 1.9) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -1.85 -0.75) (end 1.85 -0.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.85 0.75) (end 1.85 0.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.85 -0.75) (end -1.85 0.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.85 -0.75) (end 1.85 0.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start -0.35 -0.6) (end 0.35 -0.6) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.35 0.6) (end -0.35 0.6) (layer F.SilkS) (width 0.12)) + (pad 1 smd rect (at -0.95 0) (size 1.2 0.75) (layers F.Cu F.Paste F.Mask) + (net 21 /XTAL2)) + (pad 2 smd rect (at 0.95 0) (size 1.2 0.75) (layers F.Cu F.Paste F.Mask) + (net 1 GND)) + (model Capacitors_SMD.3dshapes/C_0603_HandSoldering.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitors_SMD:C_0603_HandSoldering (layer F.Cu) (tedit 588228F4) (tstamp 587DF772) + (at 139.5984 89.2302) + (descr "Capacitor SMD 0603, hand soldering") + (tags "capacitor 0603") + (path /587DE285) + (attr smd) + (fp_text reference C12 (at 0.1016 1.4478) (layer F.SilkS) + (effects (font (size 0.8 0.8) (thickness 0.15))) + ) + (fp_text value 15pF (at 0 1.9) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -1.85 -0.75) (end 1.85 -0.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.85 0.75) (end 1.85 0.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.85 -0.75) (end -1.85 0.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.85 -0.75) (end 1.85 0.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start -0.35 -0.6) (end 0.35 -0.6) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.35 0.6) (end -0.35 0.6) (layer F.SilkS) (width 0.12)) + (pad 1 smd rect (at -0.95 0) (size 1.2 0.75) (layers F.Cu F.Paste F.Mask) + (net 22 /XTAL1)) + (pad 2 smd rect (at 0.95 0) (size 1.2 0.75) (layers F.Cu F.Paste F.Mask) + (net 1 GND)) + (model Capacitors_SMD.3dshapes/C_0603_HandSoldering.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module LEDs:LED_0603 (layer F.Cu) (tedit 588367F1) (tstamp 587DF778) + (at 134.1755 68.961 270) + (descr "LED 0603 smd package") + (tags "LED led 0603 SMD smd SMT smt smdled SMDLED smtled SMTLED") + (path /587E007B) + (attr smd) + (fp_text reference D1 (at -0.2286 1.2192 270) (layer F.SilkS) + (effects (font (size 0.8 0.8) (thickness 0.15))) + ) + (fp_text value 0603LED (at 0 1.35 270) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -1.3 -0.5) (end -1.3 0.5) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.2 -0.2) (end -0.2 0.2) (layer F.Fab) (width 0.1)) + (fp_line (start -0.15 0) (end 0.15 -0.2) (layer F.Fab) (width 0.1)) + (fp_line (start 0.15 0.2) (end -0.15 0) (layer F.Fab) (width 0.1)) + (fp_line (start 0.15 -0.2) (end 0.15 0.2) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -1.3 0.5) (end 0.8 0.5) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.3 -0.5) (end 0.8 -0.5) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.45 -0.65) (end 1.45 0.65) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.45 0.65) (end -1.45 0.65) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.45 0.65) (end -1.45 -0.65) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.45 -0.65) (end 1.45 -0.65) (layer F.CrtYd) (width 0.05)) + (pad 2 smd rect (at 0.8 0 90) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) + (net 23 "Net-(D1-Pad2)")) + (pad 1 smd rect (at -0.8 0 90) (size 0.8 0.8) (layers F.Cu F.Paste F.Mask) + (net 1 GND)) + (model LEDs.3dshapes/LED_0603.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 180)) + ) + ) + + (module xPablo:MF-PSMF020X (layer F.Cu) (tedit 588229EB) (tstamp 587DF77E) + (at 123.317 75.4888 180) + (path /587DEC13) + (fp_text reference F1 (at 0 -1.6002 180) (layer F.SilkS) + (effects (font (size 0.8 0.8) (thickness 0.15))) + ) + (fp_text value F_Small (at 0 1.778 180) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 1.85 -1) (end 1.85 1) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.85 1) (end -1.85 1) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.85 1) (end -1.85 -1) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.85 -1) (end 1.85 -1) (layer F.CrtYd) (width 0.05)) + (fp_line (start -0.4 0.675) (end 0.4 0.675) (layer F.SilkS) (width 0.15)) + (fp_line (start -0.4 -0.675) (end 0.4 -0.675) (layer F.SilkS) (width 0.15)) + (pad 1 smd rect (at -1.1 0 180) (size 1 1.5) (layers F.Cu F.Paste F.Mask) + (net 2 +3V3)) + (pad 2 smd rect (at 1.1 0 180) (size 1 1.5) (layers F.Cu F.Paste F.Mask) + (net 24 "Net-(F1-Pad2)")) + ) + + (module Resistors_SMD:R_0603_HandSoldering (layer F.Cu) (tedit 58822942) (tstamp 587DF784) + (at 130.6576 89.408) + (descr "Resistor SMD 0603, hand soldering") + (tags "resistor 0603") + (path /587E68EF) + (attr smd) + (fp_text reference R6 (at -0.6096 -1.397) (layer F.SilkS) + (effects (font (size 0.8 0.8) (thickness 0.15))) + ) + (fp_text value 1k (at 0 1.9) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -2 -0.8) (end 2 -0.8) (layer F.CrtYd) (width 0.05)) + (fp_line (start -2 0.8) (end 2 0.8) (layer F.CrtYd) (width 0.05)) + (fp_line (start -2 -0.8) (end -2 0.8) (layer F.CrtYd) (width 0.05)) + (fp_line (start 2 -0.8) (end 2 0.8) (layer F.CrtYd) (width 0.05)) + (fp_line (start 0.5 0.675) (end -0.5 0.675) (layer F.SilkS) (width 0.15)) + (fp_line (start -0.5 -0.675) (end 0.5 -0.675) (layer F.SilkS) (width 0.15)) + (pad 1 smd rect (at -1.1 0) (size 1.2 0.9) (layers F.Cu F.Paste F.Mask) + (net 2 +3V3)) + (pad 2 smd rect (at 1.1 0) (size 1.2 0.9) (layers F.Cu F.Paste F.Mask) + (net 15 /SWCLK)) + (model Resistors_SMD.3dshapes/R_0603_HandSoldering.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module xPablo:XT_FC-135 (layer F.Cu) (tedit 58872052) (tstamp 587DF78A) + (at 137.7188 86.7664 225) + (path /587DE1C7) + (attr smd) + (fp_text reference Y1 (at -2.765919 0.502894 225) (layer F.SilkS) + (effects (font (size 0.8 0.8) (thickness 0.15))) + ) + (fp_text value 32.768kHz (at 0 1.6 225) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.0508))) + ) + (fp_line (start 1.5 -0.5) (end 1.5 0.5) (layer F.SilkS) (width 0.15)) + (fp_line (start -1.5 -0.5) (end -1.5 0.5) (layer F.SilkS) (width 0.15)) + (fp_line (start -1.3 0.8) (end 1.3 0.8) (layer F.SilkS) (width 0.15)) + (fp_line (start -1.6 -0.5) (end -1.6 0.5) (layer F.SilkS) (width 0.15)) + (fp_line (start 1.3 -0.8) (end -1.3 -0.8) (layer F.SilkS) (width 0.15)) + (fp_line (start 1.6 -0.5) (end 1.6 0.5) (layer F.SilkS) (width 0.15)) + (fp_arc (start -1.6 -0.8) (end -1.3 -0.8) (angle 90) (layer F.SilkS) (width 0.15)) + (fp_arc (start -1.6 0.8) (end -1.6 0.5) (angle 90) (layer F.SilkS) (width 0.15)) + (fp_arc (start 1.6 0.8) (end 1.3 0.8) (angle 90) (layer F.SilkS) (width 0.15)) + (fp_arc (start 1.6 -0.8) (end 1.6 -0.5) (angle 90) (layer F.SilkS) (width 0.15)) + (pad 1 smd rect (at -1.26746 0 225) (size 1.016 1.778) (layers F.Cu F.Paste F.SilkS F.Mask) + (net 21 /XTAL2)) + (pad 2 smd rect (at 1.27 0 225) (size 1.016 1.778) (layers F.Cu F.Paste F.SilkS F.Mask) + (net 22 /XTAL1)) + (model ${KICADXPABLO}/xPablo.pretty/3D/ABS07L.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module xPablo:PROG_6pin (layer F.Cu) (tedit 58822924) (tstamp 587E02F4) + (at 133.5405 92.456) + (path /587E0406) + (fp_text reference PR1 (at 4.0005 2.667) (layer F.SilkS) + (effects (font (size 0.8 0.8) (thickness 0.15))) + ) + (fp_text value Prog_xPablo_6pin_X (at 0 3) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -6.6 0) (end -6.6 -3.2) (layer F.Fab) (width 0.05)) + (fp_line (start -6.6 -3.2) (end 6.6 -3.2) (layer F.Fab) (width 0.05)) + (fp_line (start 6.6 -3.2) (end 6.6 3.2) (layer F.Fab) (width 0.05)) + (fp_line (start 6.6 3.2) (end -6.6 3.2) (layer F.Fab) (width 0.05)) + (fp_line (start -6.6 3.2) (end -6.6 0) (layer F.Fab) (width 0.05)) + (fp_line (start 1.6035 -1.905) (end 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F.SilkS)) + (pad "" np_thru_hole circle (at 3.6 -1) (size 1 1) (drill 1) (layers *.Cu *.Mask F.SilkS)) + (pad "" np_thru_hole circle (at 3.6 1) (size 1 1) (drill 1) (layers *.Cu *.Mask F.SilkS)) + (pad 1 smd circle (at -2 1) (size 1.2 1.2) (layers F.Cu F.SilkS F.Mask) + (net 2 +3V3)) + (pad 3 smd circle (at 0 1) (size 1.2 1.2) (layers F.Cu F.SilkS F.Mask) + (net 30 /RESET)) + (pad 4 smd circle (at 0 -1) (size 1.2 1.2) (layers F.Cu F.SilkS F.Mask) + (net 15 /SWCLK)) + (pad 6 smd circle (at 2 -1) (size 1.2 1.2) (layers F.Cu F.SilkS F.Mask)) + (pad 5 smd circle (at 2 1) (size 1.2 1.2) (layers F.Cu F.SilkS F.Mask) + (net 1 GND)) + ) + + (module logo:PBLogo_Tiny (layer F.Cu) (tedit 5822BFBF) (tstamp 58806514) + (at 124.46 90.932) + (fp_text reference G*** (at -0.0635 -4.064) (layer F.SilkS) hide + (effects (font (thickness 0.3))) + ) + (fp_text value LOGO (at 0.1905 4.191) (layer F.SilkS) hide + (effects (font (thickness 0.3))) + ) + (fp_poly (pts (xy 1.9304 -2.802155) (xy 1.937676 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(size 2 1) (layers F.Cu F.Paste F.Mask) + (net 26 /RFM_DIOC)) + ) + + (module xPablo:RFM69HW (layer F.Cu) (tedit 58822912) (tstamp 587B9092) + (at 151.257 79.4385 90) + (path /587B8B72) + (fp_text reference U2 (at -11.2395 -8.89 90) (layer F.SilkS) + (effects (font (size 0.8 0.8) (thickness 0.15))) + ) + (fp_text value RFM69HW (at -0.2286 -8.89 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_circle (center -9.8298 -8.4074) (end -9.779 -8.3566) (layer F.SilkS) (width 0.4)) + (fp_line (start -9.85 -8) (end 9.85 -8) (layer F.SilkS) (width 0.15)) + (fp_line (start 9.85 -8) (end 9.85 8) (layer F.SilkS) (width 0.15)) + (fp_line (start 9.85 8) (end -9.85 8) (layer F.SilkS) (width 0.15)) + (fp_line (start -9.85 8) (end -9.85 -8) (layer F.SilkS) (width 0.15)) + (pad 1 smd rect (at -9.5 -7 90) (size 3.2 1.5) (layers F.Cu F.Paste F.Mask) + (net 29 /RES_RFM)) + (pad 2 smd rect (at -9.5 -5 90) (size 3.2 1.5) (layers F.Cu F.Paste F.Mask) + (net 28 /RFM_DIOA)) + (pad 3 smd rect (at -9.5 -3 90) (size 3.2 1.5) (layers F.Cu F.Paste F.Mask)) + (pad 4 smd rect (at -9.5 -1 90) (size 3.2 1.5) (layers F.Cu F.Paste F.Mask)) + (pad 5 smd rect (at -9.5 1 90) (size 3.2 1.5) (layers F.Cu F.Paste F.Mask)) + (pad 6 smd rect (at -9.5 3 90) (size 3.2 1.5) (layers F.Cu F.Paste F.Mask)) + (pad 7 smd rect (at -9.5 5 90) (size 3.2 1.5) (layers F.Cu F.Paste F.Mask) + (net 27 /RFM_DIOB)) + (pad 8 smd rect (at -9.5 7 90) (size 3.2 1.5) (layers F.Cu F.Paste F.Mask) + (net 2 +3V3)) + (pad 9 smd rect (at 9.5 7 270) (size 3.2 1.5) (layers F.Cu F.Paste F.Mask) + (net 1 GND)) + (pad 10 smd rect (at 9.5 5 270) (size 3.2 1.5) (layers F.Cu F.Paste F.Mask) + (net 5 /ANT)) + (pad 11 smd rect (at 9.5 3 270) (size 3.2 1.5) (layers F.Cu F.Paste F.Mask) + (net 1 GND)) + (pad 12 smd rect (at 9.5 1 270) (size 3.2 1.5) (layers F.Cu F.Paste F.Mask) + (net 10 /SCK)) + (pad 13 smd rect (at 9.5 -1 270) (size 3.2 1.5) (layers F.Cu F.Paste F.Mask) + (net 11 /MISO)) + (pad 14 smd rect (at 9.5 -3 270) (size 3.2 1.5) (layers F.Cu F.Paste F.Mask) + (net 12 /MOSI)) + (pad 15 smd rect (at 9.5 -5 270) (size 3.2 1.5) (layers F.Cu F.Paste F.Mask) + (net 13 /NSS)) + (pad 16 smd rect (at 9.5 -7 270) (size 3.2 1.5) (layers F.Cu F.Paste F.Mask)) + ) + + (module xPablo:coaxial_u.fl-r-smt-1 (layer F.Cu) (tedit 58822B7A) (tstamp 587C601F) + (at 163.7792 80.6958 270) + (descr "Ultra small surface mount coaxial connector, Hirose U.FL-R-SMT-1") + (path /587C6B2E) + (fp_text reference E1 (at -3.3528 0.0762 270) (layer F.SilkS) + (effects (font (size 0.8 0.8) (thickness 0.15))) + ) + (fp_text value ANT (at 0 2.7 270) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_circle (center 0 0) (end -0.1 0) (layer F.SilkS) (width 0.15)) + (fp_circle (center 0 0) (end -1 0) (layer F.SilkS) (width 0.15)) + (fp_line (start -1.3 1) (end -1.3 -1) (layer F.SilkS) (width 0.15)) + (fp_line (start 1 1.3) (end -1 1.3) (layer F.SilkS) (width 0.15)) + (fp_line (start 1.3 -1) (end 1.3 1) (layer F.SilkS) (width 0.15)) + (fp_line (start -1 -1.3) (end 1 -1.3) (layer F.SilkS) (width 0.15)) + (fp_arc (start -1 1) (end -1 1.3) (angle 90) (layer F.SilkS) (width 0.15)) + (fp_arc (start 1 1) (end 1.3 1) (angle 90) (layer F.SilkS) (width 0.15)) + (fp_arc (start 1 -1) (end 1 -1.3) (angle 90) (layer F.SilkS) (width 0.15)) + (fp_arc (start -1 -1) (end -1.3 -1) (angle 90) (layer F.SilkS) (width 0.15)) + (pad 2 smd rect (at -1.475 0 270) (size 1.05 2.2) (layers F.Cu F.Paste F.Mask) + (net 1 GND) (solder_mask_margin 0.07) (solder_paste_margin -0.05)) + (pad 2 smd rect (at 1.475 0 270) (size 1.05 2.2) (layers F.Cu F.Paste F.Mask) + (net 1 GND) (solder_mask_margin 0.07) (solder_paste_margin -0.05)) + (pad 1 smd rect (at 0 1.525 270) (size 1 1.05) (layers F.Cu F.Paste F.Mask) + (net 5 /ANT) (solder_mask_margin 0.07) (solder_paste_margin -0.05)) + (model ${KICADXPABLO}/xPablo.pretty/3D/coaxial_u.fl-r-smt-1.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module xPablo:PIN_ARRAY_1 locked (layer F.Cu) (tedit 58822BDB) (tstamp 58790D1D) + (at 163.394 69.372) + (descr "1 pin") + (tags "CONN DEV") + (path /5878BD10) + (fp_text reference MOUNTING_HOLE1 (at 0.0381 -3.76936) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value CONN_1 (at -0.02286 3.95224) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 1.27 1.27) (end -1.27 1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start -1.27 -1.27) (end 1.27 -1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start -1.27 1.27) (end -1.27 -1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start 1.27 -1.27) (end 1.27 1.27) (layer F.SilkS) (width 0.1524)) + (pad 1 thru_hole rect (at 0 0) (size 5.8 5.8) (drill 2.6) (layers *.Cu *.Mask F.SilkS) + (net 1 GND) (solder_mask_margin 0.1524) (clearance 0.1524)) + ) + + (module xPablo:PIN_ARRAY_1 locked (layer F.Cu) (tedit 58822BDB) (tstamp 58790D21) + (at 163.394 93.572) + (descr "1 pin") + (tags "CONN DEV") + (path /5878BE0B) + (fp_text reference MOUNTING_HOLE2 (at 0.0381 -3.76936) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value CONN_1 (at -0.02286 3.95224) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 1.27 1.27) (end -1.27 1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start -1.27 -1.27) (end 1.27 -1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start -1.27 1.27) (end -1.27 -1.27) (layer F.SilkS) (width 0.1524)) + (fp_line (start 1.27 -1.27) (end 1.27 1.27) (layer F.SilkS) (width 0.1524)) + (pad 1 thru_hole rect (at 0 0) (size 5.8 5.8) (drill 2.6) (layers *.Cu *.Mask F.SilkS) + (net 1 GND) (solder_mask_margin 0.1524) (clearance 0.1524)) + ) + + (module xPablo:VIA-0.6mm (layer F.Cu) (tedit 58822E2A) (tstamp 5882723D) + (at 129.159 71.12) + (fp_text reference REF** (at 0.0254 2.032) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value VIA-0.6mm (at 0.0254 -1.7526) (layer F.Fab) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (pad 1 thru_hole circle (at 0 0) (size 0.6 0.6) (drill 0.3) (layers *.Cu) + (net 14 +5V) (zone_connect 2)) + ) + + (module xPablo:miniPCIeConn locked (layer F.Cu) (tedit 58822F4C) (tstamp 54A9144B) + (at 116.744 77.622) + (path /587B51C0) + (fp_text reference J1 (at 2.509 -1.422 90) (layer F.SilkS) + (effects (font (size 0.8 0.8) (thickness 0.15))) + ) + (fp_text value PCIE-MINI (at -2.286 5.4102 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (pad 1 smd rect (at 0 -7.95) (size 2.3 0.6) (layers F.Cu F.Mask) + (solder_mask_margin 0.1) (clearance 0.1)) + (pad 3 smd rect (at 0 -7.15) (size 2.3 0.6) (layers F.Cu F.Mask) + (solder_mask_margin 0.1) (clearance 0.1)) + (pad 5 smd rect (at 0 -6.35) (size 2.3 0.6) (layers F.Cu F.Mask) + (solder_mask_margin 0.1) (clearance 0.1)) + (pad 7 smd rect (at 0 -5.55) (size 2.3 0.6) (layers F.Cu F.Mask) + (solder_mask_margin 0.1) (clearance 0.1)) + (pad 9 smd rect (at 0 -4.75) (size 2.3 0.6) (layers F.Cu F.Mask) + (net 1 GND) (solder_mask_margin 0.1) (clearance 0.1)) + (pad 11 smd rect (at 0 -3.95) (size 2.3 0.6) (layers F.Cu F.Mask) + (solder_mask_margin 0.1) (clearance 0.1)) + (pad 13 smd rect (at 0 -3.15) (size 2.3 0.6) (layers F.Cu F.Mask) + (solder_mask_margin 0.1) (clearance 0.1)) + (pad 15 smd rect (at 0 -2.35) (size 2.3 0.6) (layers F.Cu F.Mask) + (net 1 GND) (solder_mask_margin 0.1) (clearance 0.1)) + (pad 2 smd rect (at 0 -7.55) (size 2.3 0.6) (layers B.Cu B.Mask) + (net 24 "Net-(F1-Pad2)") (solder_mask_margin 0.1) (clearance 0.1)) + (pad 17 smd rect (at 0 1.65) (size 2.3 0.6) (layers F.Cu F.Mask) + (solder_mask_margin 0.1) (clearance 0.1)) + (pad 4 smd rect (at 0 -6.75) (size 2.3 0.6) (layers B.Cu B.Mask) + (net 1 GND) (solder_mask_margin 0.1) (clearance 0.1)) + (pad 6 smd rect (at 0 -5.95) (size 2.3 0.6) (layers B.Cu B.Mask) + (solder_mask_margin 0.1) (clearance 0.1)) + (pad 8 smd rect (at 0 -5.15) (size 2.3 0.6) (layers B.Cu B.Mask) + (solder_mask_margin 0.1) (clearance 0.1)) + (pad 10 smd rect (at 0 -4.35) (size 2.3 0.6) (layers B.Cu B.Mask) + (solder_mask_margin 0.1) (clearance 0.1)) + (pad 12 smd rect (at 0 -3.55) (size 2.3 0.6) (layers B.Cu B.Mask) + (solder_mask_margin 0.1) (clearance 0.1)) + (pad 14 smd rect (at 0 -2.75) (size 2.3 0.6) (layers B.Cu B.Mask) + (solder_mask_margin 0.1) (clearance 0.1)) + (pad 16 smd rect (at 0 -1.95) (size 2.3 0.6) (layers B.Cu B.Mask) + (solder_mask_margin 0.1) (clearance 0.1)) + (pad 19 smd rect (at 0 2.45) (size 2.3 0.6) (layers F.Cu F.Mask) + (solder_mask_margin 0.1) (clearance 0.1)) + (pad 21 smd rect (at 0 3.25) (size 2.3 0.6) (layers F.Cu F.Mask) + (net 1 GND) (solder_mask_margin 0.1) (clearance 0.1)) + (pad 23 smd rect (at 0 4.05) (size 2.3 0.6) (layers F.Cu F.Mask) + (solder_mask_margin 0.1) (clearance 0.1)) + (pad 25 smd rect (at 0 4.85) (size 2.3 0.6) (layers F.Cu F.Mask) + (solder_mask_margin 0.1) (clearance 0.1)) + (pad 27 smd rect (at 0 5.65) (size 2.3 0.6) (layers F.Cu F.Mask) + (net 1 GND) (solder_mask_margin 0.1) (clearance 0.1)) + (pad 29 smd rect (at 0 6.45) (size 2.3 0.6) (layers F.Cu F.Mask) + (net 1 GND) (solder_mask_margin 0.1) (clearance 0.1)) + (pad 31 smd rect (at 0 7.25) (size 2.3 0.6) (layers F.Cu F.Mask) + (solder_mask_margin 0.1) (clearance 0.1)) + (pad 33 smd rect (at 0 8.05) (size 2.3 0.6) (layers F.Cu F.Mask) + (solder_mask_margin 0.1) (clearance 0.1)) + (pad 35 smd rect (at 0 8.85) (size 2.3 0.6) (layers F.Cu F.Mask) + (net 1 GND) (solder_mask_margin 0.1) (clearance 0.1)) + (pad 37 smd rect (at 0 9.65) (size 2.3 0.6) (layers F.Cu F.Mask) + (solder_mask_margin 0.1) (clearance 0.1)) + (pad 39 smd rect (at 0 10.45) (size 2.3 0.6) (layers F.Cu F.Mask) + (solder_mask_margin 0.1) (clearance 0.1)) + (pad 41 smd rect (at 0 11.25) (size 2.3 0.6) (layers F.Cu F.Mask) + (solder_mask_margin 0.1) (clearance 0.1)) + (pad 43 smd rect (at 0 12.05) (size 2.3 0.6) (layers F.Cu F.Mask) + (solder_mask_margin 0.1) (clearance 0.1)) + (pad 45 smd rect (at 0 12.85) (size 2.3 0.6) (layers F.Cu F.Mask) + (solder_mask_margin 0.1) (clearance 0.1)) + (pad 47 smd rect (at 0 13.65) (size 2.3 0.6) (layers F.Cu F.Mask) + (solder_mask_margin 0.1) (clearance 0.1)) + (pad 49 smd rect (at 0 14.45) (size 2.3 0.6) (layers F.Cu F.Mask) + (solder_mask_margin 0.1) (clearance 0.1)) + (pad 51 smd rect (at 0 15.25) (size 2.3 0.6) (layers F.Cu F.Mask) + (solder_mask_margin 0.1) (clearance 0.1)) + (pad 18 smd rect (at 0 2.05) (size 2.3 0.6) (layers B.Cu B.Mask) + (net 1 GND) (solder_mask_margin 0.1) (clearance 0.1)) + (pad 20 smd rect (at 0 2.85) (size 2.3 0.6) (layers B.Cu B.Mask) + (solder_mask_margin 0.1) (clearance 0.1)) + (pad 22 smd rect (at 0 3.65) (size 2.3 0.6) (layers B.Cu B.Mask) + (solder_mask_margin 0.1) (clearance 0.1)) + (pad 24 smd rect (at 0 4.45) (size 2.3 0.6) (layers B.Cu B.Mask) + (solder_mask_margin 0.1) (clearance 0.1)) + (pad 26 smd rect (at 0 5.25) (size 2.3 0.6) (layers B.Cu B.Mask) + (net 1 GND) (solder_mask_margin 0.1) (clearance 0.1)) + (pad 28 smd rect (at 0 6.05) (size 2.3 0.6) (layers B.Cu B.Mask) + (solder_mask_margin 0.1) (clearance 0.1)) + (pad 30 smd rect (at 0 6.85) (size 2.3 0.6) (layers B.Cu B.Mask) + (net 17 /SCL) (solder_mask_margin 0.1) (clearance 0.1)) + (pad 32 smd rect (at 0 7.65) (size 2.3 0.6) (layers B.Cu B.Mask) + (net 18 /SDA) (solder_mask_margin 0.1) (clearance 0.1)) + (pad 34 smd rect (at 0 8.45) (size 2.3 0.6) (layers B.Cu B.Mask) + (net 1 GND) (solder_mask_margin 0.1) (clearance 0.1)) + (pad 36 smd rect (at 0 9.25) (size 2.3 0.6) (layers B.Cu B.Mask) + (net 6 /USB_N) (solder_mask_margin 0.1) (clearance 0.1)) + (pad 38 smd rect (at 0 10.05) (size 2.3 0.6) (layers B.Cu B.Mask) + (net 7 /USB_P) (solder_mask_margin 0.1) (clearance 0.1)) + (pad 40 smd rect (at 0 10.85) (size 2.3 0.6) (layers B.Cu B.Mask) + (net 1 GND) (solder_mask_margin 0.1) (clearance 0.1)) + (pad 42 smd rect (at 0 11.65) (size 2.3 0.6) (layers B.Cu B.Mask) + (solder_mask_margin 0.1) (clearance 0.1)) + (pad 44 smd rect (at 0 12.45) (size 2.3 0.6) (layers B.Cu B.Mask) + (net 8 "Net-(J1-Pad44)") (solder_mask_margin 0.1) (clearance 0.1)) + (pad 46 smd rect (at 0 13.25) (size 2.3 0.6) (layers B.Cu B.Mask) + (net 9 "Net-(J1-Pad46)") (solder_mask_margin 0.1) (clearance 0.1)) + (pad 48 smd rect (at 0 14.05) (size 2.3 0.6) (layers B.Cu B.Mask) + (solder_mask_margin 0.1) (clearance 0.1)) + (pad 50 smd rect (at 0 14.85) (size 2.3 0.6) (layers B.Cu B.Mask) + (net 1 GND) (solder_mask_margin 0.1) (clearance 0.1)) + (pad 52 smd rect (at 0 15.65) (size 2.3 0.6) (layers B.Cu B.Mask) + (net 24 "Net-(F1-Pad2)") (solder_mask_margin 0.1) (clearance 0.1)) + ) + + (module xPablo:QFN-32-1EP_5x5mm_Pitch0.5mm (layer F.Cu) (tedit 5887206A) (tstamp 58828B06) + (at 135.1026 82.5754 135) + (descr "UH Package; 32-Lead Plastic QFN (5mm x 5mm); (see Linear Technology QFN_32_05-08-1693.pdf)") + (tags "QFN 0.5") + (path /58790BA6) + (attr smd) + (fp_text reference U1 (at -3.277793 -3.51128 225) (layer F.SilkS) + (effects (font (size 0.8 0.8) (thickness 0.15))) + ) + (fp_text value ATSAMD21E (at 0 3.75 135) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_circle (center -2.7686 -2.7178) (end -2.667 -2.7178) (layer F.SilkS) (width 0.2)) + (fp_line (start -1.5 -2.5) (end 2.5 -2.5) (layer F.Fab) (width 0.15)) + (fp_line (start 2.5 -2.5) (end 2.5 2.5) (layer F.Fab) (width 0.15)) + (fp_line (start 2.5 2.5) (end -2.5 2.5) (layer F.Fab) (width 0.15)) + (fp_line (start -2.5 2.5) (end -2.5 -1.5) (layer F.Fab) (width 0.15)) + (fp_line (start -2.5 -1.5) (end -1.5 -2.5) (layer F.Fab) (width 0.15)) + (fp_line (start -3 -3) (end -3 3) (layer F.CrtYd) (width 0.05)) + (fp_line (start 3 -3) (end 3 3) (layer F.CrtYd) (width 0.05)) + (fp_line (start -3 -3) (end 3 -3) (layer F.CrtYd) (width 0.05)) + (fp_line (start -3 3) (end 3 3) (layer F.CrtYd) (width 0.05)) + (fp_line (start 2.625 -2.625) (end 2.625 -2.1) (layer F.SilkS) (width 0.15)) + (fp_line (start -2.625 2.625) (end -2.625 2.1) (layer F.SilkS) (width 0.15)) + (fp_line (start 2.625 2.625) (end 2.625 2.1) (layer F.SilkS) (width 0.15)) + (fp_line (start -2.625 2.625) (end -2.1 2.625) (layer F.SilkS) (width 0.15)) + (fp_line (start 2.625 2.625) (end 2.1 2.625) (layer F.SilkS) (width 0.15)) + (fp_line (start 2.625 -2.625) (end 2.1 -2.625) (layer F.SilkS) (width 0.15)) + (pad 1 smd rect (at -2.4 -1.75 135) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask) + (net 22 /XTAL1)) + (pad 2 smd rect (at -2.4 -1.25 135) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask) + (net 21 /XTAL2)) + (pad 3 smd rect (at -2.4 -0.75 135) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)) + (pad 4 smd rect (at -2.4 -0.25 135) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)) + (pad 5 smd rect (at -2.4 0.25 135) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask) + (net 26 /RFM_DIOC)) + (pad 6 smd rect (at -2.4 0.75 135) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask) + (net 27 /RFM_DIOB)) + (pad 7 smd rect (at -2.4 1.25 135) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask) + (net 28 /RFM_DIOA)) + (pad 8 smd rect (at -2.4 1.75 135) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask) + (net 29 /RES_RFM)) + (pad 9 smd rect (at -1.75 2.4 225) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask) + (net 3 "Net-(C1-Pad1)")) + (pad 10 smd rect (at -1.25 2.4 225) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask) + (net 1 GND)) + (pad 11 smd rect (at -0.75 2.4 225) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask) + (net 12 /MOSI)) + (pad 12 smd rect (at -0.25 2.4 225) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask) + (net 10 /SCK)) + (pad 13 smd rect (at 0.25 2.4 225) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask) + (net 11 /MISO)) + (pad 14 smd rect (at 0.75 2.4 225) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask) + (net 13 /NSS)) + (pad 15 smd rect (at 1.25 2.4 225) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)) + (pad 16 smd rect (at 1.75 2.4 225) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)) + (pad 17 smd rect (at 2.4 1.75 135) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)) + (pad 18 smd rect (at 2.4 1.25 135) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask) + (net 25 "Net-(R2-Pad2)")) + (pad 19 smd rect (at 2.4 0.75 135) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask) + (net 19 /WLAN)) + (pad 20 smd rect (at 2.4 0.25 135) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask) + (net 20 /WPAN)) + (pad 21 smd rect (at 2.4 -0.25 135) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask) + (net 18 /SDA)) + (pad 22 smd rect (at 2.4 -0.75 135) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask) + (net 17 /SCL)) + (pad 23 smd rect (at 2.4 -1.25 135) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask) + (net 6 /USB_N)) + (pad 24 smd rect (at 2.4 -1.75 135) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask) + (net 7 /USB_P)) + (pad 25 smd rect (at 1.75 -2.4 225) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)) + (pad 26 smd rect (at 1.25 -2.4 225) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask) + (net 30 /RESET)) + (pad 27 smd rect (at 0.75 -2.4 225) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)) + (pad 28 smd rect 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"" H 5900 1250 50 0000 C CNN +F 3 "" H 5900 1250 50 0000 C CNN + 1 5900 1250 + 0 1 1 0 +$EndComp +Wire Wire Line + 6100 1250 6200 1250 +Connection ~ 6200 1250 +Wire Wire Line + 6600 800 6600 1250 +Wire Wire Line + 7250 3900 8100 3900 +Wire Wire Line + 7250 4000 8100 4000 +Text Label 7550 3900 2 60 ~ 0 +USB_N +Text Label 7550 4000 2 60 ~ 0 +USB_P +$Comp +L RFM69HW U2 +U 1 1 587B8B72 +P 3250 5200 +F 0 "U2" H 2900 5450 40 0000 C CNN +F 1 "RFM69HW" H 3500 4450 40 0000 C CNN +F 2 "xPablo:RFM69HW" H 3250 5200 30 0001 C CIN +F 3 "" H 3250 5200 60 0000 C CNN + 1 3250 5200 + 1 0 0 -1 +$EndComp +$Comp +L RFM95HW U3 +U 1 1 587B8BC7 +P 3250 6650 +F 0 "U3" H 2900 6900 40 0000 C CNN +F 1 "RFM95HW" H 3500 5900 40 0000 C CNN +F 2 "xPablo:RFM92_95_96_98" H 3250 6650 30 0001 C CIN +F 3 "" H 3250 6650 60 0000 C CNN + 1 3250 6650 + 1 0 0 -1 +$EndComp +$Comp +L C_Small C3 +U 1 1 587B8EC6 +P 6850 1150 +F 0 "C3" V 7000 1150 50 0000 L CNN +F 1 "1uF" V 6750 1100 50 0000 L CNN +F 2 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C CNN +F 1 "+3.3V" H 5350 2440 50 0000 C CNN +F 2 "" H 5350 2300 50 0000 C CNN +F 3 "" H 5350 2300 50 0000 C CNN + 1 5350 2300 + 1 0 0 -1 +$EndComp +Text Notes 9400 1150 2 60 ~ 0 +CL 12.5pF, Max ESR 313k +$Comp +L R_Small R6 +U 1 1 587E68EF +P 9250 5100 +F 0 "R6" H 9280 5120 50 0000 L CNN +F 1 "1k" H 9280 5060 50 0000 L CNN +F 2 "Resistors_SMD:R_0603_HandSoldering" H 9250 5100 50 0001 C CNN +F 3 "" H 9250 5100 50 0000 C CNN + 1 9250 5100 + 1 0 0 -1 +$EndComp +$Comp +L +3.3V #PWR047 +U 1 1 587E6A01 +P 9250 5000 +F 0 "#PWR047" H 9250 4850 50 0001 C CNN +F 1 "+3.3V" H 9250 5140 50 0000 C CNN +F 2 "" H 9250 5000 50 0000 C CNN +F 3 "" H 9250 5000 50 0000 C CNN + 1 9250 5000 + 1 0 0 -1 +$EndComp +Wire Wire Line + 7750 3300 7250 3300 +Wire Wire Line + 7750 3400 7250 3400 +Text Label 7750 3300 2 60 ~ 0 +WLAN +Text Label 7750 3400 2 60 ~ 0 +WPAN +$Comp +L Prog_xPablo_6pin_X PR1 +U 1 1 587E0406 +P 8700 5250 +F 0 "PR1" H 8500 5550 40 0000 L CNN +F 1 "Prog_xPablo_6pin_X" H 8560 4955 40 0000 C CNN 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