xPablo.cz/arduino-esp32-custom-lwip-ppp-enabled
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

Prvni ulozeni z chegewara githubu

Browse Source
This commit is contained in:
Pavel Brychta
2023-02-25 16:13:53 +01:00
commit 01eb80dfe2
3279 changed files with 638407 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

13
tools/sdk/esp32/include/esp_rom/esp32/esp_rom_caps.h Normal file
View File

@ -0,0 +1,13 @@
/*
* SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
#define ESP_ROM_HAS_CRC_LE (1) // ROM CRC library supports Little Endian
#define ESP_ROM_HAS_CRC_BE (1) // ROM CRC library supports Big Endian
#define ESP_ROM_HAS_JPEG_DECODE (1) // ROM has JPEG decode library
#define ESP_ROM_SUPPORT_MULTIPLE_UART (1) // ROM has multiple UARTs available for logging
#define ESP_ROM_NEEDS_SWSETUP_WORKAROUND (1) // ROM uses 32-bit time_t. A workaround is required to prevent printf functions from crashing

57
tools/sdk/esp32/include/esp_rom/include/esp32/rom/aes.h Normal file
View File

@ -0,0 +1,57 @@
/*
ROM functions for hardware AES support.
It is not recommended to use these functions directly,
use the wrapper functions in esp32/aes.h instead.
*/
// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#ifndef _ROM_AES_H_
#define _ROM_AES_H_
#include <stdint.h>
#include <stdbool.h>
#ifdef __cplusplus
extern "C" {
#endif
//TODO, add comment for aes apis
enum AES_BITS {
AES128,
AES192,
AES256
};
void ets_aes_enable(void);
void ets_aes_disable(void);
void ets_aes_set_endian(bool key_word_swap, bool key_byte_swap,
bool in_word_swap, bool in_byte_swap,
bool out_word_swap, bool out_byte_swap);
bool ets_aes_setkey_enc(const uint8_t *key, enum AES_BITS bits);
bool ets_aes_setkey_dec(const uint8_t *key, enum AES_BITS bits);
void ets_aes_crypt(const uint8_t input[16], uint8_t output[16]);
#ifdef __cplusplus
}
#endif
#endif /* _ROM_AES_H_ */

62
tools/sdk/esp32/include/esp_rom/include/esp32/rom/bigint.h Normal file
View File

@ -0,0 +1,62 @@
/*
ROM functions for hardware bigint support.
It is not recommended to use these functions directly,
use the wrapper functions in hwcrypto/mpi.h instead.
*/
// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#ifndef _ROM_BIGINT_H_
#define _ROM_BIGINT_H_
#include <stdint.h>
#include <stdbool.h>
#ifdef __cplusplus
extern "C" {
#endif
//TODO: add comment here
void ets_bigint_enable(void);
void ets_bigint_disable(void);
void ets_bigint_wait_finish(void);
bool ets_bigint_mod_power_prepare(uint32_t *x, uint32_t *y, uint32_t *m,
uint32_t m_dash, uint32_t *rb, uint32_t len, bool again);
bool ets_bigint_mod_power_getz(uint32_t *z, uint32_t len);
bool ets_bigint_mult_prepare(uint32_t *x, uint32_t *y, uint32_t len);
bool ets_bigint_mult_getz(uint32_t *z, uint32_t len);
bool ets_bigint_montgomery_mult_prepare(uint32_t *x, uint32_t *y, uint32_t *m,
uint32_t m_dash, uint32_t len, bool again);
bool ets_bigint_montgomery_mult_getz(uint32_t *z, uint32_t len);
bool ets_bigint_mod_mult_prepare(uint32_t *x, uint32_t *y, uint32_t *m,
uint32_t m_dash, uint32_t *rb, uint32_t len, bool again);
bool ets_bigint_mod_mult_getz(uint32_t *m, uint32_t *z, uint32_t len);
#ifdef __cplusplus
}
#endif
#endif /* _ROM_BIGINT_H_ */

186
tools/sdk/esp32/include/esp_rom/include/esp32/rom/cache.h Normal file
View File

@ -0,0 +1,186 @@
// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#ifndef _ROM_CACHE_H_
#define _ROM_CACHE_H_
#include "soc/dport_access.h"
#ifdef __cplusplus
extern "C" {
#endif
/** \defgroup uart_apis, uart configuration and communication related apis
* @brief uart apis
*/
/** @addtogroup uart_apis
* @{
*/
/**
* @brief Initialise cache mmu, mark all entries as invalid.
* Please do not call this function in your SDK application.
*
* @param int cpu_no : 0 for PRO cpu, 1 for APP cpu.
*
* @return None
*/
void mmu_init(int cpu_no);
/**
* @brief Set Flash-Cache mmu mapping.
* Please do not call this function in your SDK application.
*
* @param int cpu_no : CPU number, 0 for PRO cpu, 1 for APP cpu.
*
* @param int pod : process identifier. Range 0~7.
*
* @param unsigned int vaddr : virtual address in CPU address space.
* Can be IRam0, IRam1, IRom0 and DRom0 memory address.
* Should be aligned by psize.
*
* @param unsigned int paddr : physical address in Flash.
* Should be aligned by psize.
*
* @param int psize : page size of flash, in kilobytes. Should be 64 here.
*
* @param int num : pages to be set.
*
* @return unsigned int: error status
* 0 : mmu set success
* 1 : vaddr or paddr is not aligned
* 2 : pid error
* 3 : psize error
* 4 : mmu table to be written is out of range
* 5 : vaddr is out of range
*/
static inline unsigned int IRAM_ATTR cache_flash_mmu_set(int cpu_no, int pid, unsigned int vaddr, unsigned int paddr, int psize, int num)
{
extern unsigned int cache_flash_mmu_set_rom(int cpu_no, int pid, unsigned int vaddr, unsigned int paddr, int psize, int num);
unsigned int ret;
DPORT_STALL_OTHER_CPU_START();
ret = cache_flash_mmu_set_rom(cpu_no, pid, vaddr, paddr, psize, num);
DPORT_STALL_OTHER_CPU_END();
return ret;
}
/**
* @brief Set Ext-SRAM-Cache mmu mapping.
* Please do not call this function in your SDK application.
*
* Note that this code lives in IRAM and has a bugfix in respect to the ROM version
* of this function (which erroneously refused a vaddr > 2MiB
*
* @param int cpu_no : CPU number, 0 for PRO cpu, 1 for APP cpu.
*
* @param int pod : process identifier. Range 0~7.
*
* @param unsigned int vaddr : virtual address in CPU address space.
* Can be IRam0, IRam1, IRom0 and DRom0 memory address.
* Should be aligned by psize.
*
* @param unsigned int paddr : physical address in Ext-SRAM.
* Should be aligned by psize.
*
* @param int psize : page size of flash, in kilobytes. Should be 32 here.
*
* @param int num : pages to be set.
*
* @return unsigned int: error status
* 0 : mmu set success
* 1 : vaddr or paddr is not aligned
* 2 : pid error
* 3 : psize error
* 4 : mmu table to be written is out of range
* 5 : vaddr is out of range
*/
unsigned int IRAM_ATTR cache_sram_mmu_set(int cpu_no, int pid, unsigned int vaddr, unsigned int paddr, int psize, int num);
/**
* @brief Initialise cache access for the cpu.
* Please do not call this function in your SDK application.
*
* @param int cpu_no : 0 for PRO cpu, 1 for APP cpu.
*
* @return None
*/
static inline void IRAM_ATTR Cache_Read_Init(int cpu_no)
{
extern void Cache_Read_Init_rom(int cpu_no);
DPORT_STALL_OTHER_CPU_START();
Cache_Read_Init_rom(cpu_no);
DPORT_STALL_OTHER_CPU_END();
}
/**
* @brief Flush the cache value for the cpu.
* Please do not call this function in your SDK application.
*
* @param int cpu_no : 0 for PRO cpu, 1 for APP cpu.
*
* @return None
*/
static inline void IRAM_ATTR Cache_Flush(int cpu_no)
{
extern void Cache_Flush_rom(int cpu_no);
DPORT_STALL_OTHER_CPU_START();
Cache_Flush_rom(cpu_no);
DPORT_STALL_OTHER_CPU_END();
}
/**
* @brief Disable Cache access for the cpu.
* Please do not call this function in your SDK application.
*
* @param int cpu_no : 0 for PRO cpu, 1 for APP cpu.
*
* @return None
*/
static inline void IRAM_ATTR Cache_Read_Disable(int cpu_no)
{
extern void Cache_Read_Disable_rom(int cpu_no);
DPORT_STALL_OTHER_CPU_START();
Cache_Read_Disable_rom(cpu_no);
DPORT_STALL_OTHER_CPU_END();
}
/**
* @brief Enable Cache access for the cpu.
* Please do not call this function in your SDK application.
*
* @param int cpu_no : 0 for PRO cpu, 1 for APP cpu.
*
* @return None
*/
static inline void IRAM_ATTR Cache_Read_Enable(int cpu_no)
{
extern void Cache_Read_Enable_rom(int cpu_no);
DPORT_STALL_OTHER_CPU_START();
Cache_Read_Enable_rom(cpu_no);
DPORT_STALL_OTHER_CPU_END();
}
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* _ROM_CACHE_H_ */

160
tools/sdk/esp32/include/esp_rom/include/esp32/rom/crc.h Normal file
View File

@ -0,0 +1,160 @@
// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#ifndef ROM_CRC_H
#define ROM_CRC_H
#include <stdint.h>
#ifdef __cplusplus
extern "C" {
#endif
/** \defgroup uart_apis, uart configuration and communication related apis
* @brief uart apis
*/
/** @addtogroup uart_apis
* @{
*/
/* Notes about CRC APIs usage
* The ESP32 ROM include some CRC tables and CRC APIs to speed up CRC calculation.
* The CRC APIs include CRC8, CRC16, CRC32 algorithms for both little endian and big endian modes.
* Here are the polynomials for the algorithms:
* CRC-8 x8+x2+x1+1 0x07
* CRC16-CCITT x16+x12+x5+1 0x1021
* CRC32 x32+x26+x23+x22+x16+x12+x11+x10+x8+x7+x5+x4+x2+x1+1 0x04c11db7
*
* These group of CRC APIs are designed to calculate the data in buffers either continuous or not.
* To make it easy, we had added a `~` at the beginning and the end of the functions.
* To calculate non-continuous buffers, we can write the code like this:
* init = ~init;
* crc = crc32_le(init, buf0, length0);
* crc = crc32_le(crc, buf1, length1);
* crc = ~crc;
*
* However, it is not easy to select which API to use and give the correct parameters.
* A specific CRC algorithm will include this parameters: width, polynomials, init, refin, refout, xorout
* refin and refout show the endian of the algorithm:
* if both of them are true, please use the little endian API.
* if both of them are false, please use the big endian API.
* xorout is the value which you need to be xored to the raw result.
* However, these group of APIs need one '~' before and after the APIs.
*
* Here are some examples for CRC16:
* CRC-16/CCITT, poly = 0x1021, init = 0x0000, refin = true, refout = true, xorout = 0x0000
* crc = ~crc16_le((uint16_t)~0x0000, buf, length);
*
* CRC-16/CCITT-FALSE, poly = 0x1021, init = 0xffff, refin = false, refout = false, xorout = 0x0000
* crc = ~crc16_be((uint16_t)~0xffff, buf, length);
*
* CRC-16/X25, poly = 0x1021, init = 0xffff, refin = true, refout = true, xorout = 0xffff
* crc = (~crc16_le((uint16_t)~(0xffff), buf, length))^0xffff;
*
* CRC-16/XMODEM, poly= 0x1021, init = 0x0000, refin = false, refout = false, xorout = 0x0000
* crc = ~crc16_be((uint16_t)~0x0000, buf, length);
*
*
*/
/**
* @brief CRC32 value that is in little endian.
*
* @param uint32_t crc : init crc value, use 0 at the first use.
*
* @param uint8_t const *buf : buffer to start calculate crc.
*
* @param uint32_t len : buffer length in byte.
*
* @return None
*/
uint32_t crc32_le(uint32_t crc, uint8_t const *buf, uint32_t len);
/**
* @brief CRC32 value that is in big endian.
*
* @param uint32_t crc : init crc value, use 0 at the first use.
*
* @param uint8_t const *buf : buffer to start calculate crc.
*
* @param uint32_t len : buffer length in byte.
*
* @return None
*/
uint32_t crc32_be(uint32_t crc, uint8_t const *buf, uint32_t len);
/**
* @brief CRC16 value that is in little endian.
*
* @param uint16_t crc : init crc value, use 0 at the first use.
*
* @param uint8_t const *buf : buffer to start calculate crc.
*
* @param uint32_t len : buffer length in byte.
*
* @return None
*/
uint16_t crc16_le(uint16_t crc, uint8_t const *buf, uint32_t len);
/**
* @brief CRC16 value that is in big endian.
*
* @param uint16_t crc : init crc value, use 0 at the first use.
*
* @param uint8_t const *buf : buffer to start calculate crc.
*
* @param uint32_t len : buffer length in byte.
*
* @return None
*/
uint16_t crc16_be(uint16_t crc, uint8_t const *buf, uint32_t len);
/**
* @brief CRC8 value that is in little endian.
*
* @param uint8_t crc : init crc value, use 0 at the first use.
*
* @param uint8_t const *buf : buffer to start calculate crc.
*
* @param uint32_t len : buffer length in byte.
*
* @return None
*/
uint8_t crc8_le(uint8_t crc, uint8_t const *buf, uint32_t len);
/**
* @brief CRC8 value that is in big endian.
*
* @param uint32_t crc : init crc value, use 0 at the first use.
*
* @param uint8_t const *buf : buffer to start calculate crc.
*
* @param uint32_t len : buffer length in byte.
*
* @return None
*/
uint8_t crc8_be(uint8_t crc, uint8_t const *buf, uint32_t len);
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif

117
tools/sdk/esp32/include/esp_rom/include/esp32/rom/efuse.h Normal file
View File

@ -0,0 +1,117 @@
// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#ifndef _ROM_EFUSE_H_
#define _ROM_EFUSE_H_
#include <stdint.h>
#ifdef __cplusplus
extern "C" {
#endif
/** \defgroup efuse_APIs efuse APIs
* @brief ESP32 efuse read/write APIs
* @attention
*
*/
/** @addtogroup efuse_APIs
* @{
*/
/**
* @brief Do a efuse read operation, to update the efuse value to efuse read registers.
*
* @param null
*
* @return null
*/
void ets_efuse_read_op(void);
/**
* @brief Do a efuse write operation, to update efuse write registers to efuse, then you need call ets_efuse_read_op again.
*
* @param null
*
* @return null
*/
void ets_efuse_program_op(void);
/**
* @brief Read 8M Analog Clock value(8 bit) in efuse, the analog clock will not change with temperature.
* It can be used to test the external xtal frequency, do not touch this efuse field.
*
* @param null
*
* @return u32: 1 for 100KHZ, range is 0 to 255.
*/
uint32_t ets_efuse_get_8M_clock(void);
/**
* @brief Read spi flash pin configuration from Efuse
*
* @return
* - 0 for default SPI pins.
* - 1 for default HSPI pins.
* - Other values define a custom pin configuration mask. Pins are encoded as per the EFUSE_SPICONFIG_RET_SPICLK,
* EFUSE_SPICONFIG_RET_SPIQ, EFUSE_SPICONFIG_RET_SPID, EFUSE_SPICONFIG_RET_SPICS0, EFUSE_SPICONFIG_RET_SPIHD macros.
* WP pin (for quad I/O modes) is not saved in efuse and not returned by this function.
*/
uint32_t ets_efuse_get_spiconfig(void);
#define EFUSE_SPICONFIG_SPI_DEFAULTS 0
#define EFUSE_SPICONFIG_HSPI_DEFAULTS 1
#define EFUSE_SPICONFIG_RET_SPICLK_MASK 0x3f
#define EFUSE_SPICONFIG_RET_SPICLK_SHIFT 0
#define EFUSE_SPICONFIG_RET_SPICLK(ret) (((ret) >> EFUSE_SPICONFIG_RET_SPICLK_SHIFT) & EFUSE_SPICONFIG_RET_SPICLK_MASK)
#define EFUSE_SPICONFIG_RET_SPIQ_MASK 0x3f
#define EFUSE_SPICONFIG_RET_SPIQ_SHIFT 6
#define EFUSE_SPICONFIG_RET_SPIQ(ret) (((ret) >> EFUSE_SPICONFIG_RET_SPIQ_SHIFT) & EFUSE_SPICONFIG_RET_SPIQ_MASK)
#define EFUSE_SPICONFIG_RET_SPID_MASK 0x3f
#define EFUSE_SPICONFIG_RET_SPID_SHIFT 12
#define EFUSE_SPICONFIG_RET_SPID(ret) (((ret) >> EFUSE_SPICONFIG_RET_SPID_SHIFT) & EFUSE_SPICONFIG_RET_SPID_MASK)
#define EFUSE_SPICONFIG_RET_SPICS0_MASK 0x3f
#define EFUSE_SPICONFIG_RET_SPICS0_SHIFT 18
#define EFUSE_SPICONFIG_RET_SPICS0(ret) (((ret) >> EFUSE_SPICONFIG_RET_SPICS0_SHIFT) & EFUSE_SPICONFIG_RET_SPICS0_MASK)
#define EFUSE_SPICONFIG_RET_SPIHD_MASK 0x3f
#define EFUSE_SPICONFIG_RET_SPIHD_SHIFT 24
#define EFUSE_SPICONFIG_RET_SPIHD(ret) (((ret) >> EFUSE_SPICONFIG_RET_SPIHD_SHIFT) & EFUSE_SPICONFIG_RET_SPIHD_MASK)
/**
* @brief A crc8 algorithm used in efuse check.
*
* @param unsigned char const *p : Pointer to original data.
*
* @param unsigned int len : Data length in byte.
*
* @return unsigned char: Crc value.
*/
unsigned char esp_crc8(unsigned char const *p, unsigned int len);
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* _ROM_EFUSE_H_ */

654
tools/sdk/esp32/include/esp_rom/include/esp32/rom/ets_sys.h Normal file
View File

@ -0,0 +1,654 @@
// Copyright 2010-2016 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#ifndef _ROM_ETS_SYS_H_
#define _ROM_ETS_SYS_H_
#include <stdint.h>
#include <stdbool.h>
#include <stdlib.h>
#include "sdkconfig.h"
#ifdef CONFIG_LEGACY_INCLUDE_COMMON_HEADERS
#include "soc/soc.h"
#endif
#ifndef CONFIG_IDF_TARGET_ESP32
#error "This header should only be included when building for ESP32"
#endif
#ifdef __cplusplus
extern "C" {
#endif
/** \defgroup ets_sys_apis, ets system related apis
* @brief ets system apis
*/
/** @addtogroup ets_sys_apis
* @{
*/
/************************************************************************
* NOTE
* Many functions in this header files can't be run in FreeRTOS.
* Please see the comment of the Functions.
* There are also some functions that doesn't work on FreeRTOS
* without listed in the header, such as:
* xtos functions start with "_xtos_" in ld file.
*
***********************************************************************
*/
/** \defgroup ets_apis, Espressif Task Scheduler related apis
* @brief ets apis
*/
/** @addtogroup ets_apis
* @{
*/
typedef enum {
ETS_OK = 0, /**< return successful in ets*/
ETS_FAILED = 1 /**< return failed in ets*/
} ETS_STATUS;
typedef uint32_t ETSSignal;
typedef uint32_t ETSParam;
typedef struct ETSEventTag ETSEvent; /**< Event transmit/receive in ets*/
struct ETSEventTag {
ETSSignal sig; /**< Event signal, in same task, different Event with different signal*/
ETSParam par; /**< Event parameter, sometimes without usage, then will be set as 0*/
};
typedef void (*ETSTask)(ETSEvent *e); /**< Type of the Task processer*/
typedef void (* ets_idle_cb_t)(void *arg); /**< Type of the system idle callback*/
/**
* @brief Start the Espressif Task Scheduler, which is an infinit loop. Please do not add code after it.
*
* @param none
*
* @return none
*/
void ets_run(void);
/**
* @brief Set the Idle callback, when Tasks are processed, will call the callback before CPU goto sleep.
*
* @param ets_idle_cb_t func : The callback function.
*
* @param void *arg : Argument of the callback.
*
* @return None
*/
void ets_set_idle_cb(ets_idle_cb_t func, void *arg);
/**
* @brief Init a task with processer, priority, queue to receive Event, queue length.
*
* @param ETSTask task : The task processer.
*
* @param uint8_t prio : Task priority, 0-31, bigger num with high priority, one priority with one task.
*
* @param ETSEvent *queue : Queue belongs to the task, task always receives Events, Queue is circular used.
*
* @param uint8_t qlen : Queue length.
*
* @return None
*/
void ets_task(ETSTask task, uint8_t prio, ETSEvent *queue, uint8_t qlen);
/**
* @brief Post an event to an Task.
*
* @param uint8_t prio : Priority of the Task.
*
* @param ETSSignal sig : Event signal.
*
* @param ETSParam par : Event parameter
*
* @return ETS_OK : post successful
* @return ETS_FAILED : post failed
*/
ETS_STATUS ets_post(uint8_t prio, ETSSignal sig, ETSParam par);
/**
* @}
*/
/** \defgroup ets_boot_apis, Boot routing related apis
* @brief ets boot apis
*/
/** @addtogroup ets_apis
* @{
*/
extern const char *const exc_cause_table[40]; ///**< excption cause that defined by the core.*/
/**
* @brief Set Pro cpu Entry code, code can be called in PRO CPU when booting is not completed.
* When Pro CPU booting is completed, Pro CPU will call the Entry code if not NULL.
*
* @param uint32_t start : the PRO Entry code address value in uint32_t
*
* @return None
*/
void ets_set_user_start(uint32_t start);
/**
* @brief Set Pro cpu Startup code, code can be called when booting is not completed, or in Entry code.
* When Entry code completed, CPU will call the Startup code if not NULL, else call ets_run.
*
* @param uint32_t callback : the Startup code address value in uint32_t
*
* @return None : post successful
*/
void ets_set_startup_callback(uint32_t callback);
/**
* @brief Set App cpu Entry code, code can be called in PRO CPU.
* When APP booting is completed, APP CPU will call the Entry code if not NULL.
*
* @param uint32_t start : the APP Entry code address value in uint32_t, stored in register APPCPU_CTRL_REG_D.
*
* @return None
*/
void ets_set_appcpu_boot_addr(uint32_t start);
/**
* @brief unpack the image in flash to iram and dram, no using cache.
*
* @param uint32_t pos : Flash physical address.
*
* @param uint32_t *entry_addr: the pointer of an variable that can store Entry code address.
*
* @param bool jump : Jump into the code in the function or not.
*
* @param bool config : Config the flash when unpacking the image, config should be done only once.
*
* @return ETS_OK : unpack successful
* @return ETS_FAILED : unpack failed
*/
ETS_STATUS ets_unpack_flash_code_legacy(uint32_t pos, uint32_t *entry_addr, bool jump, bool config);
/**
* @brief unpack the image in flash to iram and dram, using cache, maybe decrypting.
*
* @param uint32_t pos : Flash physical address.
*
* @param uint32_t *entry_addr: the pointer of an variable that can store Entry code address.
*
* @param bool jump : Jump into the code in the function or not.
*
* @param bool sb_need_check : Do security boot check or not.
*
* @param bool config : Config the flash when unpacking the image, config should be done only once.
*
* @return ETS_OK : unpack successful
* @return ETS_FAILED : unpack failed
*/
ETS_STATUS ets_unpack_flash_code(uint32_t pos, uint32_t *entry_addr, bool jump, bool sb_need_check, bool config);
/**
* @}
*/
/** \defgroup ets_printf_apis, ets_printf related apis used in ets
* @brief ets printf apis
*/
/** @addtogroup ets_printf_apis
* @{
*/
/**
* @brief Printf the strings to uart or other devices, similar with printf, simple than printf.
* Can not print float point data format, or longlong data format.
* So we maybe only use this in ROM.
*
* @param const char *fmt : See printf.
*
* @param ... : See printf.
*
* @return int : the length printed to the output device.
*/
int ets_printf(const char *fmt, ...);
/**
* @brief Output a char to uart, which uart to output(which is in uart module in ROM) is not in scope of the function.
* Can not print float point data format, or longlong data format
*
* @param char c : char to output.
*
* @return None
*/
void ets_write_char_uart(char c);
/**
* @brief Ets_printf have two output functions： putc1 and putc2, both of which will be called if need ouput.
* To install putc1, which is defaulted installed as ets_write_char_uart in none silent boot mode, as NULL in silent mode.
*
* @param void (*)(char) p: Output function to install.
*
* @return None
*/
void ets_install_putc1(void (*p)(char c));
/**
* @brief Ets_printf have two output functions： putc1 and putc2, both of which will be called if need ouput.
* To install putc2, which is defaulted installed as NULL.
*
* @param void (*)(char) p: Output function to install.
*
* @return None
*/
void ets_install_putc2(void (*p)(char c));
/**
* @brief Install putc1 as ets_write_char_uart.
* In silent boot mode(to void interfere the UART attached MCU), we can call this function, after booting ok.
*
* @param None
*
* @return None
*/
void ets_install_uart_printf(void);
#define ETS_PRINTF(...) ets_printf(...)
#define ETS_ASSERT(v) do { \
if (!(v)) { \
ets_printf("%s %u \n", __FILE__, __LINE__); \
while (1) {}; \
} \
} while (0)
/**
* @}
*/
/** \defgroup ets_timer_apis, ets_timer related apis used in ets
* @brief ets timer apis
*/
/** @addtogroup ets_timer_apis
* @{
*/
typedef void ETSTimerFunc(void *timer_arg);/**< timer handler*/
typedef struct _ETSTIMER_ {
struct _ETSTIMER_ *timer_next; /**< timer linker*/
uint32_t timer_expire; /**< abstruct time when timer expire*/
uint32_t timer_period; /**< timer period, 0 means timer is not periodic repeated*/
ETSTimerFunc *timer_func; /**< timer handler*/
void *timer_arg; /**< timer handler argument*/
} ETSTimer;
/**
* @brief Init ets timer, this timer range is 640 us to 429496 ms
* In FreeRTOS, please call FreeRTOS apis, never call this api.
*
* @param None
*
* @return None
*/
void ets_timer_init(void);
/**
* @brief In FreeRTOS, please call FreeRTOS apis, never call this api.
*
* @param None
*
* @return None
*/
void ets_timer_deinit(void);
/**
* @brief Arm an ets timer, this timer range is 640 us to 429496 ms.
* In FreeRTOS, please call FreeRTOS apis, never call this api.
*
* @param ETSTimer *timer : Timer struct pointer.
*
* @param uint32_t tmout : Timer value in ms, range is 1 to 429496.
*
* @param bool repeat : Timer is periodic repeated.
*
* @return None
*/
void ets_timer_arm(ETSTimer *timer, uint32_t tmout, bool repeat);
/**
* @brief Arm an ets timer, this timer range is 640 us to 429496 ms.
* In FreeRTOS, please call FreeRTOS apis, never call this api.
*
* @param ETSTimer *timer : Timer struct pointer.
*
* @param uint32_t tmout : Timer value in us, range is 1 to 429496729.
*
* @param bool repeat : Timer is periodic repeated.
*
* @return None
*/
void ets_timer_arm_us(ETSTimer *ptimer, uint32_t us, bool repeat);
/**
* @brief Disarm an ets timer.
* In FreeRTOS, please call FreeRTOS apis, never call this api.
*
* @param ETSTimer *timer : Timer struct pointer.
*
* @return None
*/
void ets_timer_disarm(ETSTimer *timer);
/**
* @brief Set timer callback and argument.
* In FreeRTOS, please call FreeRTOS apis, never call this api.
*
* @param ETSTimer *timer : Timer struct pointer.
*
* @param ETSTimerFunc *pfunction : Timer callback.
*
* @param void *parg : Timer callback argument.
*
* @return None
*/
void ets_timer_setfn(ETSTimer *ptimer, ETSTimerFunc *pfunction, void *parg);
/**
* @brief Unset timer callback and argument to NULL.
* In FreeRTOS, please call FreeRTOS apis, never call this api.
*
* @param ETSTimer *timer : Timer struct pointer.
*
* @return None
*/
void ets_timer_done(ETSTimer *ptimer);
/**
* @brief CPU do while loop for some time.
* In FreeRTOS task, please call FreeRTOS apis.
*
* @param uint32_t us : Delay time in us.
*
* @return None
*/
void ets_delay_us(uint32_t us);
/**
* @brief Set the real CPU ticks per us to the ets, so that ets_delay_us will be accurate.
* Call this function when CPU frequency is changed.
*
* @param uint32_t ticks_per_us : CPU ticks per us.
*
* @return None
*/
void ets_update_cpu_frequency(uint32_t ticks_per_us);
/**
* @brief Set the real CPU ticks per us to the ets, so that ets_delay_us will be accurate.
*
* @note This function only sets the tick rate for the current CPU. It is located in ROM,
* so the deep sleep stub can use it even if IRAM is not initialized yet.
*
* @param uint32_t ticks_per_us : CPU ticks per us.
*
* @return None
*/
void ets_update_cpu_frequency_rom(uint32_t ticks_per_us);
/**
* @brief Get the real CPU ticks per us to the ets.
* This function do not return real CPU ticks per us, just the record in ets. It can be used to check with the real CPU frequency.
*
* @param None
*
* @return uint32_t : CPU ticks per us record in ets.
*/
uint32_t ets_get_cpu_frequency(void);
/**
* @brief Get xtal_freq/analog_8M*256 value calibrated in rtc module.
*
* @param None
*
* @return uint32_t : xtal_freq/analog_8M*256.
*/
uint32_t ets_get_xtal_scale(void);
/**
* @brief Get xtal_freq value, If value not stored in RTC_STORE5, than store.
*
* @param None
*
* @return uint32_t : if rtc store the value (RTC_STORE5 high 16 bits and low 16 bits with same value), read from rtc register.
* clock = (REG_READ(RTC_STORE5) & 0xffff) << 12;
* else if analog_8M in efuse
* clock = ets_get_xtal_scale() * 15625 * ets_efuse_get_8M_clock() / 40;
* else clock = 26M.
*/
uint32_t ets_get_detected_xtal_freq(void);
/**
* @}
*/
/** \defgroup ets_intr_apis, ets interrupt configure related apis
* @brief ets intr apis
*/
/** @addtogroup ets_intr_apis
* @{
*/
typedef void (* ets_isr_t)(void *);/**< interrupt handler type*/
/**
* @brief Attach a interrupt handler to a CPU interrupt number.
* This function equals to _xtos_set_interrupt_handler_arg(i, func, arg).
* In FreeRTOS, please call FreeRTOS apis, never call this api.
*
* @param int i : CPU interrupt number.
*
* @param ets_isr_t func : Interrupt handler.
*
* @param void *arg : argument of the handler.
*
* @return None
*/
void ets_isr_attach(int i, ets_isr_t func, void *arg);
/**
* @brief Mask the interrupts which show in mask bits.
* This function equals to _xtos_ints_off(mask).
* In FreeRTOS, please call FreeRTOS apis, never call this api.
*
* @param uint32_t mask : BIT(i) means mask CPU interrupt number i.
*
* @return None
*/
void ets_isr_mask(uint32_t mask);
/**
* @brief Unmask the interrupts which show in mask bits.
* This function equals to _xtos_ints_on(mask).
* In FreeRTOS, please call FreeRTOS apis, never call this api.
*
* @param uint32_t mask : BIT(i) means mask CPU interrupt number i.
*
* @return None
*/
void ets_isr_unmask(uint32_t unmask);
/**
* @brief Lock the interrupt to level 2.
* This function direct set the CPU registers.
* In FreeRTOS, please call FreeRTOS apis, never call this api.
*
* @param None
*
* @return None
*/
void ets_intr_lock(void);
/**
* @brief Unlock the interrupt to level 0.
* This function direct set the CPU registers.
* In FreeRTOS, please call FreeRTOS apis, never call this api.
*
* @param None
*
* @return None
*/
void ets_intr_unlock(void);
/**
* @brief Unlock the interrupt to level 0, and CPU will go into power save mode(wait interrupt).
* This function direct set the CPU registers.
* In FreeRTOS, please call FreeRTOS apis, never call this api.
*
* @param None
*
* @return None
*/
void ets_waiti0(void);
/**
* @brief Attach an CPU interrupt to a hardware source.
* We have 4 steps to use an interrupt:
* 1.Attach hardware interrupt source to CPU. intr_matrix_set(0, ETS_WIFI_MAC_INTR_SOURCE, ETS_WMAC_INUM);
* 2.Set interrupt handler. xt_set_interrupt_handler(ETS_WMAC_INUM, func, NULL);
* 3.Enable interrupt for CPU. xt_ints_on(1 << ETS_WMAC_INUM);
* 4.Enable interrupt in the module.
*
* @param int cpu_no : The CPU which the interrupt number belongs.
*
* @param uint32_t model_num : The interrupt hardware source number, please see the interrupt hardware source table.
*
* @param uint32_t intr_num : The interrupt number CPU, please see the interrupt cpu using table.
*
* @return None
*/
void intr_matrix_set(int cpu_no, uint32_t model_num, uint32_t intr_num);
#define _ETSTR(v) # v
#define _ETS_SET_INTLEVEL(intlevel) ({ unsigned __tmp; \
__asm__ __volatile__( "rsil %0, " _ETSTR(intlevel) "\n" \
: "=a" (__tmp) : : "memory" ); \
})
#ifdef CONFIG_NONE_OS
#define ETS_INTR_LOCK() \
ets_intr_lock()
#define ETS_INTR_UNLOCK() \
ets_intr_unlock()
#define ETS_ISR_ATTACH \
ets_isr_attach
#define ETS_INTR_ENABLE(inum) \
ets_isr_unmask((1<<inum))
#define ETS_INTR_DISABLE(inum) \
ets_isr_mask((1<<inum))
#define ETS_WMAC_INTR_ATTACH(func, arg) \
ETS_ISR_ATTACH(ETS_WMAC_INUM, (func), (void *)(arg))
#define ETS_TG0_T0_INTR_ATTACH(func, arg) \
ETS_ISR_ATTACH(ETS_TG0_T0_INUM, (func), (void *)(arg))
#define ETS_GPIO_INTR_ATTACH(func, arg) \
ETS_ISR_ATTACH(ETS_GPIO_INUM, (func), (void *)(arg))
#define ETS_UART0_INTR_ATTACH(func, arg) \
ETS_ISR_ATTACH(ETS_UART0_INUM, (func), (void *)(arg))
#define ETS_WDT_INTR_ATTACH(func, arg) \
ETS_ISR_ATTACH(ETS_WDT_INUM, (func), (void *)(arg))
#define ETS_SLC_INTR_ATTACH(func, arg) \
ETS_ISR_ATTACH(ETS_SLC_INUM, (func), (void *)(arg))
#define ETS_BB_INTR_ENABLE() \
ETS_INTR_ENABLE(ETS_BB_INUM)
#define ETS_BB_INTR_DISABLE() \
ETS_INTR_DISABLE(ETS_BB_INUM)
#define ETS_UART0_INTR_ENABLE() \
ETS_INTR_ENABLE(ETS_UART0_INUM)
#define ETS_UART0_INTR_DISABLE() \
ETS_INTR_DISABLE(ETS_UART0_INUM)
#define ETS_GPIO_INTR_ENABLE() \
ETS_INTR_ENABLE(ETS_GPIO_INUM)
#define ETS_GPIO_INTR_DISABLE() \
ETS_INTR_DISABLE(ETS_GPIO_INUM)
#define ETS_WDT_INTR_ENABLE() \
ETS_INTR_ENABLE(ETS_WDT_INUM)
#define ETS_WDT_INTR_DISABLE() \
ETS_INTR_DISABLE(ETS_WDT_INUM)
#define ETS_TG0_T0_INTR_ENABLE() \
ETS_INTR_ENABLE(ETS_TG0_T0_INUM)
#define ETS_TG0_T0_INTR_DISABLE() \
ETS_INTR_DISABLE(ETS_TG0_T0_INUM)
#define ETS_SLC_INTR_ENABLE() \
ETS_INTR_ENABLE(ETS_SLC_INUM)
#define ETS_SLC_INTR_DISABLE() \
ETS_INTR_DISABLE(ETS_SLC_INUM)
#endif
/**
* @}
*/
#ifndef MAC2STR
#define MAC2STR(a) (a)[0], (a)[1], (a)[2], (a)[3], (a)[4], (a)[5]
#define MACSTR "%02x:%02x:%02x:%02x:%02x:%02x"
#endif
#define ETS_MEM_BAR() asm volatile ( "" : : : "memory" )
typedef enum {
OK = 0,
FAIL,
PENDING,
BUSY,
CANCEL,
} STATUS;
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* _ROM_ETS_SYS_H_ */

308
tools/sdk/esp32/include/esp_rom/include/esp32/rom/gpio.h Normal file
View File

@ -0,0 +1,308 @@
// Copyright 2010-2016 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#ifndef _ROM_GPIO_H_
#define _ROM_GPIO_H_
#include <stdint.h>
#include <stdbool.h>
#include "esp_attr.h"
#include "sdkconfig.h"
#ifdef CONFIG_LEGACY_INCLUDE_COMMON_HEADERS
#include "soc/gpio_reg.h"
#include "soc/soc_caps.h"
#endif
#ifdef __cplusplus
extern "C" {
#endif
/** \defgroup gpio_apis, uart configuration and communication related apis
* @brief gpio apis
*/
/** @addtogroup gpio_apis
* @{
*/
#define GPIO_REG_READ(reg) READ_PERI_REG(reg)
#define GPIO_REG_WRITE(reg, val) WRITE_PERI_REG(reg, val)
#define GPIO_ID_PIN0 0
#define GPIO_ID_PIN(n) (GPIO_ID_PIN0+(n))
#define GPIO_PIN_ADDR(i) (GPIO_PIN0_REG + i*4)
#define GPIO_FUNC_IN_HIGH 0x38
#define GPIO_FUNC_IN_LOW 0x30
#define GPIO_ID_IS_PIN_REGISTER(reg_id) \
((reg_id >= GPIO_ID_PIN0) && (reg_id <= GPIO_ID_PIN(GPIO_PIN_COUNT-1)))
#define GPIO_REGID_TO_PINIDX(reg_id) ((reg_id) - GPIO_ID_PIN0)
typedef enum {
GPIO_PIN_INTR_DISABLE = 0,
GPIO_PIN_INTR_POSEDGE = 1,
GPIO_PIN_INTR_NEGEDGE = 2,
GPIO_PIN_INTR_ANYEDGE = 3,
GPIO_PIN_INTR_LOLEVEL = 4,
GPIO_PIN_INTR_HILEVEL = 5
} GPIO_INT_TYPE;
#define GPIO_OUTPUT_SET(gpio_no, bit_value) \
((gpio_no < 32) ? gpio_output_set(bit_value<<gpio_no, (bit_value ? 0 : 1)<<gpio_no, 1<<gpio_no,0) : \
gpio_output_set_high(bit_value<<(gpio_no - 32), (bit_value ? 0 : 1)<<(gpio_no - 32), 1<<(gpio_no -32),0))
#define GPIO_DIS_OUTPUT(gpio_no) ((gpio_no < 32) ? gpio_output_set(0,0,0, 1<<gpio_no) : gpio_output_set_high(0,0,0, 1<<(gpio_no - 32)))
#define GPIO_INPUT_GET(gpio_no) ((gpio_no < 32) ? ((gpio_input_get()>>gpio_no)&BIT0) : ((gpio_input_get_high()>>(gpio_no - 32))&BIT0))
/* GPIO interrupt handler, registered through gpio_intr_handler_register */
typedef void (* gpio_intr_handler_fn_t)(uint32_t intr_mask, bool high, void *arg);
/**
* @brief Initialize GPIO. This includes reading the GPIO Configuration DataSet
* to initialize "output enables" and pin configurations for each gpio pin.
* Please do not call this function in SDK.
*
* @param None
*
* @return None
*/
void gpio_init(void);
/**
* @brief Change GPIO(0-31) pin output by setting, clearing, or disabling pins, GPIO0<->BIT(0).
* There is no particular ordering guaranteed; so if the order of writes is significant,
* calling code should divide a single call into multiple calls.
*
* @param uint32_t set_mask : the gpios that need high level.
*
* @param uint32_t clear_mask : the gpios that need low level.
*
* @param uint32_t enable_mask : the gpios that need be changed.
*
* @param uint32_t disable_mask : the gpios that need diable output.
*
* @return None
*/
void gpio_output_set(uint32_t set_mask, uint32_t clear_mask, uint32_t enable_mask, uint32_t disable_mask);
/**
* @brief Change GPIO(32-39) pin output by setting, clearing, or disabling pins, GPIO32<->BIT(0).
* There is no particular ordering guaranteed; so if the order of writes is significant,
* calling code should divide a single call into multiple calls.
*
* @param uint32_t set_mask : the gpios that need high level.
*
* @param uint32_t clear_mask : the gpios that need low level.
*
* @param uint32_t enable_mask : the gpios that need be changed.
*
* @param uint32_t disable_mask : the gpios that need diable output.
*
* @return None
*/
void gpio_output_set_high(uint32_t set_mask, uint32_t clear_mask, uint32_t enable_mask, uint32_t disable_mask);
/**
* @brief Sample the value of GPIO input pins(0-31) and returns a bitmask.
*
* @param None
*
* @return uint32_t : bitmask for GPIO input pins, BIT(0) for GPIO0.
*/
uint32_t gpio_input_get(void);
/**
* @brief Sample the value of GPIO input pins(32-39) and returns a bitmask.
*
* @param None
*
* @return uint32_t : bitmask for GPIO input pins, BIT(0) for GPIO32.
*/
uint32_t gpio_input_get_high(void);
/**
* @brief Register an application-specific interrupt handler for GPIO pin interrupts.
* Once the interrupt handler is called, it will not be called again until after a call to gpio_intr_ack.
* Please do not call this function in SDK.
*
* @param gpio_intr_handler_fn_t fn : gpio application-specific interrupt handler
*
* @param void *arg : gpio application-specific interrupt handler argument.
*
* @return None
*/
void gpio_intr_handler_register(gpio_intr_handler_fn_t fn, void *arg);
/**
* @brief Get gpio interrupts which happens but not processed.
* Please do not call this function in SDK.
*
* @param None
*
* @return uint32_t : bitmask for GPIO pending interrupts, BIT(0) for GPIO0.
*/
uint32_t gpio_intr_pending(void);
/**
* @brief Get gpio interrupts which happens but not processed.
* Please do not call this function in SDK.
*
* @param None
*
* @return uint32_t : bitmask for GPIO pending interrupts, BIT(0) for GPIO32.
*/
uint32_t gpio_intr_pending_high(void);
/**
* @brief Ack gpio interrupts to process pending interrupts.
* Please do not call this function in SDK.
*
* @param uint32_t ack_mask: bitmask for GPIO ack interrupts, BIT(0) for GPIO0.
*
* @return None
*/
void gpio_intr_ack(uint32_t ack_mask);
/**
* @brief Ack gpio interrupts to process pending interrupts.
* Please do not call this function in SDK.
*
* @param uint32_t ack_mask: bitmask for GPIO ack interrupts, BIT(0) for GPIO32.
*
* @return None
*/
void gpio_intr_ack_high(uint32_t ack_mask);
/**
* @brief Set GPIO to wakeup the ESP32.
* Please do not call this function in SDK.
*
* @param uint32_t i: gpio number.
*
* @param GPIO_INT_TYPE intr_state : only GPIO_PIN_INTR_LOLEVEL\GPIO_PIN_INTR_HILEVEL can be used
*
* @return None
*/
void gpio_pin_wakeup_enable(uint32_t i, GPIO_INT_TYPE intr_state);
/**
* @brief disable GPIOs to wakeup the ESP32.
* Please do not call this function in SDK.
*
* @param None
*
* @return None
*/
void gpio_pin_wakeup_disable(void);
/**
* @brief set gpio input to a signal, one gpio can input to several signals.
*
* @param uint32_t gpio : gpio number, 0~0x27
* gpio == 0x30, input 0 to signal
* gpio == 0x34, ???
* gpio == 0x38, input 1 to signal
*
* @param uint32_t signal_idx : signal index.
*
* @param bool inv : the signal is inv or not
*
* @return None
*/
void gpio_matrix_in(uint32_t gpio, uint32_t signal_idx, bool inv);
/**
* @brief set signal output to gpio, one signal can output to several gpios.
*
* @param uint32_t gpio : gpio number, 0~0x27
*
* @param uint32_t signal_idx : signal index.
* signal_idx == 0x100, cancel output put to the gpio
*
* @param bool out_inv : the signal output is inv or not
*
* @param bool oen_inv : the signal output enable is inv or not
*
* @return None
*/
void gpio_matrix_out(uint32_t gpio, uint32_t signal_idx, bool out_inv, bool oen_inv);
/**
* @brief Select pad as a gpio function from IOMUX.
*
* @param uint32_t gpio_num : gpio number, 0~0x27
*
* @return None
*/
void gpio_pad_select_gpio(uint8_t gpio_num);
/**
* @brief Set pad driver capability.
*
* @param uint32_t gpio_num : gpio number, 0~0x27
*
* @param uint8_t drv : 0-3
*
* @return None
*/
void gpio_pad_set_drv(uint8_t gpio_num, uint8_t drv);
/**
* @brief Pull up the pad from gpio number.
*
* @param uint32_t gpio_num : gpio number, 0~0x27
*
* @return None
*/
void gpio_pad_pullup(uint8_t gpio_num);
/**
* @brief Pull down the pad from gpio number.
*
* @param uint32_t gpio_num : gpio number, 0~0x27
*
* @return None
*/
void gpio_pad_pulldown(uint8_t gpio_num);
/**
* @brief Unhold the pad from gpio number.
*
* @param uint32_t gpio_num : gpio number, 0~0x27
*
* @return None
*/
void gpio_pad_unhold(uint8_t gpio_num);
/**
* @brief Hold the pad from gpio number.
*
* @param uint32_t gpio_num : gpio number, 0~0x27
*
* @return None
*/
void gpio_pad_hold(uint8_t gpio_num);
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* _ROM_GPIO_H_ */

89
tools/sdk/esp32/include/esp_rom/include/esp32/rom/libc_stubs.h Normal file
View File

@ -0,0 +1,89 @@
// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#ifndef _ROM_LIBC_STUBS_H_
#define _ROM_LIBC_STUBS_H_
#include <stddef.h>
#include <stdint.h>
#include <stdio.h>
#include <stdarg.h>
#include <reent.h>
#include <errno.h>
#ifdef __cplusplus
extern "C" {
#endif
/*
ESP32 ROM code contains implementations of some of C library functions.
Whenever a function in ROM needs to use a syscall, it calls a pointer to the corresponding syscall
implementation defined in the following struct.
The table itself, by default, is not allocated in RAM. There are two pointers, `syscall_table_ptr_pro` and
`syscall_table_ptr_app`, which can be set to point to the locations of syscall tables of CPU 0 (aka PRO CPU)
and CPU 1 (aka APP CPU). Location of these pointers in .bss segment of ROM code is defined in linker script.
So, before using any of the C library functions (except for pure functions and memcpy/memset functions),
application must allocate syscall table structure for each CPU being used, and populate it with pointers
to actual implementations of corresponding syscalls.
*/
struct syscall_stub_table
{
struct _reent* (*__getreent)(void);
void* (*_malloc_r)(struct _reent *r, size_t);
void (*_free_r)(struct _reent *r, void*);
void* (*_realloc_r)(struct _reent *r, void*, size_t);
void* (*_calloc_r)(struct _reent *r, size_t, size_t);
void (*_abort)(void);
int (*_system_r)(struct _reent *r, const char*);
int (*_rename_r)(struct _reent *r, const char*, const char*);
clock_t (*_times_r)(struct _reent *r, struct tms *);
int (*_gettimeofday_r) (struct _reent *r, struct timeval *, void *);
void (*_raise_r)(struct _reent *r); /* function signature is incorrect in ROM */
int (*_unlink_r)(struct _reent *r, const char*);
int (*_link_r)(struct _reent *r, const char*, const char*);
int (*_stat_r)(struct _reent *r, const char*, struct stat *);
int (*_fstat_r)(struct _reent *r, int, struct stat *);
void* (*_sbrk_r)(struct _reent *r, ptrdiff_t);
int (*_getpid_r)(struct _reent *r);
int (*_kill_r)(struct _reent *r, int, int);
void (*_exit_r)(struct _reent *r, int);
int (*_close_r)(struct _reent *r, int);
int (*_open_r)(struct _reent *r, const char *, int, int);
int (*_write_r)(struct _reent *r, int, const void *, int);
int (*_lseek_r)(struct _reent *r, int, int, int);
int (*_read_r)(struct _reent *r, int, void *, int);
void (*_lock_init)(_lock_t *lock);
void (*_lock_init_recursive)(_lock_t *lock);
void (*_lock_close)(_lock_t *lock);
void (*_lock_close_recursive)(_lock_t *lock);
void (*_lock_acquire)(_lock_t *lock);
void (*_lock_acquire_recursive)(_lock_t *lock);
int (*_lock_try_acquire)(_lock_t *lock);
int (*_lock_try_acquire_recursive)(_lock_t *lock);
void (*_lock_release)(_lock_t *lock);
void (*_lock_release_recursive)(_lock_t *lock);
int (*_printf_float)(struct _reent *data, void *pdata, FILE * fp, int (*pfunc) (struct _reent *, FILE *, const char *, size_t len), va_list * ap);
int (*_scanf_float) (struct _reent *rptr, void *pdata, FILE *fp, va_list *ap);
};
extern struct syscall_stub_table* syscall_table_ptr_pro;
extern struct syscall_stub_table* syscall_table_ptr_app;
#ifdef __cplusplus
} // extern "C"
#endif
#endif /* _ROM_LIBC_STUBS_H_ */

176
tools/sdk/esp32/include/esp_rom/include/esp32/rom/lldesc.h Normal file
View File

@ -0,0 +1,176 @@
// Copyright 2010-2016 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#ifndef _ROM_LLDESC_H_
#define _ROM_LLDESC_H_
#include <stdint.h>
#include "sys/queue.h"
#ifdef __cplusplus
extern "C" {
#endif
#define LLDESC_TX_MBLK_SIZE 268 /* */
#define LLDESC_RX_SMBLK_SIZE 64 /* small block size, for small mgmt frame */
#define LLDESC_RX_MBLK_SIZE 524 /* rx is large sinec we want to contain mgmt frame in one block*/
#define LLDESC_RX_AMPDU_ENTRY_MBLK_SIZE 64 /* it is a small buffer which is a cycle link*/
#define LLDESC_RX_AMPDU_LEN_MBLK_SIZE 256 /*for ampdu entry*/
#ifdef ESP_MAC_5
#define LLDESC_TX_MBLK_NUM 116 /* 64K / 256 */
#define LLDESC_RX_MBLK_NUM 82 /* 64K / 512 MAX 172*/
#define LLDESC_RX_AMPDU_ENTRY_MBLK_NUM 4
#define LLDESC_RX_AMPDU_LEN_MLBK_NUM 12
#else
#ifdef SBUF_RXTX
#define LLDESC_TX_MBLK_NUM_MAX (2 * 48) /* 23K / 260 - 8 */
#define LLDESC_RX_MBLK_NUM_MAX (2 * 48) /* 23K / 524 */
#define LLDESC_TX_MBLK_NUM_MIN (2 * 16) /* 23K / 260 - 8 */
#define LLDESC_RX_MBLK_NUM_MIN (2 * 16) /* 23K / 524 */
#endif
#define LLDESC_TX_MBLK_NUM 10 //(2 * 32) /* 23K / 260 - 8 */
#ifdef IEEE80211_RX_AMPDU
#define LLDESC_RX_MBLK_NUM 30
#else
#define LLDESC_RX_MBLK_NUM 10
#endif /*IEEE80211_RX_AMPDU*/
#define LLDESC_RX_AMPDU_ENTRY_MBLK_NUM 4
#define LLDESC_RX_AMPDU_LEN_MLBK_NUM 8
#endif /* !ESP_MAC_5 */
/*
* SLC2 DMA Desc struct, aka lldesc_t
*
* --------------------------------------------------------------
* | own | EoF | sub_sof | 5'b0 | length [11:0] | size [11:0] |
* --------------------------------------------------------------
* | buf_ptr [31:0] |
* --------------------------------------------------------------
* | next_desc_ptr [31:0] |
* --------------------------------------------------------------
*/
/* this bitfield is start from the LSB!!! */
typedef struct lldesc_s {
volatile uint32_t size :12,
length:12,
offset: 5, /* h/w reserved 5bit, s/w use it as offset in buffer */
sosf : 1, /* start of sub-frame */
eof : 1, /* end of frame */
owner : 1; /* hw or sw */
volatile uint8_t *buf; /* point to buffer data */
union{
volatile uint32_t empty;
STAILQ_ENTRY(lldesc_s) qe; /* pointing to the next desc */
};
} lldesc_t;
typedef struct tx_ampdu_entry_s{
uint32_t sub_len :12,
dili_num : 7,
: 1,
null_byte: 2,
data : 1,
enc : 1,
seq : 8;
} tx_ampdu_entry_t;
typedef struct lldesc_chain_s {
lldesc_t *head;
lldesc_t *tail;
} lldesc_chain_t;
#ifdef SBUF_RXTX
enum sbuf_mask_s {
SBUF_MOVE_NO = 0,
SBUF_MOVE_TX2RX,
SBUF_MOVE_RX2TX,
} ;
#define SBUF_MOVE_STEP 8
#endif
#define LLDESC_SIZE sizeof(struct lldesc_s)
/* SLC Descriptor */
#define LLDESC_OWNER_MASK 0x80000000
#define LLDESC_OWNER_SHIFT 31
#define LLDESC_SW_OWNED 0
#define LLDESC_HW_OWNED 1
#define LLDESC_EOF_MASK 0x40000000
#define LLDESC_EOF_SHIFT 30
#define LLDESC_SOSF_MASK 0x20000000
#define LLDESC_SOSF_SHIFT 29
#define LLDESC_LENGTH_MASK 0x00fff000
#define LLDESC_LENGTH_SHIFT 12
#define LLDESC_SIZE_MASK 0x00000fff
#define LLDESC_SIZE_SHIFT 0
#define LLDESC_ADDR_MASK 0x000fffff
void lldesc_build_chain(uint8_t *descptr, uint32_t desclen, uint8_t * mblkptr, uint32_t buflen, uint32_t blksz, uint8_t owner,
lldesc_t **head,
#ifdef TO_HOST_RESTART
lldesc_t ** one_before_tail,
#endif
lldesc_t **tail);
lldesc_t *lldesc_num2link(lldesc_t * head, uint16_t nblks);
lldesc_t *lldesc_set_owner(lldesc_t * head, uint16_t nblks, uint8_t owner);
static inline uint32_t lldesc_get_chain_length(lldesc_t *head)
{
lldesc_t *ds = head;
uint32_t len = 0;
while (ds) {
len += ds->length;
ds = STAILQ_NEXT(ds, qe);
}
return len;
}
static inline void lldesc_config(lldesc_t *ds, uint8_t owner, uint8_t eof, uint8_t sosf, uint16_t len)
{
ds->owner = owner;
ds->eof = eof;
ds->sosf = sosf;
ds->length = len;
}
#define LLDESC_CONFIG(_desc, _owner, _eof, _sosf, _len) do { \
(_desc)->owner = (_owner); \
(_desc)->eof = (_eof); \
(_desc)->sosf = (_sosf); \
(_desc)->length = (_len); \
} while(0)
#define LLDESC_FROM_HOST_CLEANUP(ds) LLDESC_CONFIG((ds), LLDESC_HW_OWNED, 0, 0, 0)
#define LLDESC_MAC_RX_CLEANUP(ds) LLDESC_CONFIG((ds), LLDESC_HW_OWNED, 0, 0, (ds)->size)
#define LLDESC_TO_HOST_CLEANUP(ds) LLDESC_CONFIG((ds), LLDESC_HW_OWNED, 0, 0, 0)
#ifdef __cplusplus
}
#endif
#endif /* _ROM_LLDESC_H_ */

38
tools/sdk/esp32/include/esp_rom/include/esp32/rom/md5_hash.h Normal file
View File

@ -0,0 +1,38 @@
/*
* MD5 internal definitions
* Copyright (c) 2003-2005, Jouni Malinen <j@w1.fi>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* Alternatively, this software may be distributed under the terms of BSD
* license.
*
* See README and COPYING for more details.
*/
#ifndef _ROM_MD5_HASH_H_
#define _ROM_MD5_HASH_H_
#include <stdint.h>
#ifdef __cplusplus
extern "C" {
#endif
struct MD5Context {
uint32_t buf[4];
uint32_t bits[2];
uint8_t in[64];
};
void MD5Init(struct MD5Context *context);
void MD5Update(struct MD5Context *context, unsigned char const *buf, unsigned len);
void MD5Final(unsigned char digest[16], struct MD5Context *context);
#ifdef __cplusplus
}
#endif
#endif /* _ROM_MD5_HASH_H_ */

791
tools/sdk/esp32/include/esp_rom/include/esp32/rom/miniz.h Normal file
View File

@ -0,0 +1,791 @@
#ifndef MINIZ_HEADER_INCLUDED
#define MINIZ_HEADER_INCLUDED
#include <stdlib.h>
// Defines to completely disable specific portions of miniz.c:
// If all macros here are defined the only functionality remaining will be CRC-32, adler-32, tinfl, and tdefl.
// Define MINIZ_NO_STDIO to disable all usage and any functions which rely on stdio for file I/O.
#define MINIZ_NO_STDIO
// If MINIZ_NO_TIME is specified then the ZIP archive functions will not be able to get the current time, or
// get/set file times, and the C run-time funcs that get/set times won't be called.
// The current downside is the times written to your archives will be from 1979.
#define MINIZ_NO_TIME
// Define MINIZ_NO_ARCHIVE_APIS to disable all ZIP archive API's.
#define MINIZ_NO_ARCHIVE_APIS
// Define MINIZ_NO_ARCHIVE_APIS to disable all writing related ZIP archive API's.
#define MINIZ_NO_ARCHIVE_WRITING_APIS
// Define MINIZ_NO_ZLIB_APIS to remove all ZLIB-style compression/decompression API's.
#define MINIZ_NO_ZLIB_APIS
// Define MINIZ_NO_ZLIB_COMPATIBLE_NAME to disable zlib names, to prevent conflicts against stock zlib.
#define MINIZ_NO_ZLIB_COMPATIBLE_NAMES
// Define MINIZ_NO_MALLOC to disable all calls to malloc, free, and realloc.
// Note if MINIZ_NO_MALLOC is defined then the user must always provide custom user alloc/free/realloc
// callbacks to the zlib and archive API's, and a few stand-alone helper API's which don't provide custom user
// functions (such as tdefl_compress_mem_to_heap() and tinfl_decompress_mem_to_heap()) won't work.
#define MINIZ_NO_MALLOC
#if defined(__TINYC__) && (defined(__linux) || defined(__linux__))
// TODO: Work around "error: include file 'sys\utime.h' when compiling with tcc on Linux
#define MINIZ_NO_TIME
#endif
#if !defined(MINIZ_NO_TIME) && !defined(MINIZ_NO_ARCHIVE_APIS)
#include <time.h>
#endif
//Hardcoded options for Xtensa - JD
#define MINIZ_X86_OR_X64_CPU 0
#define MINIZ_LITTLE_ENDIAN 1
#define MINIZ_USE_UNALIGNED_LOADS_AND_STORES 0
#define MINIZ_HAS_64BIT_REGISTERS 0
#define TINFL_USE_64BIT_BITBUF 0
#if defined(_M_IX86) || defined(_M_X64) || defined(__i386__) || defined(__i386) || defined(__i486__) || defined(__i486) || defined(i386) || defined(__ia64__) || defined(__x86_64__)
// MINIZ_X86_OR_X64_CPU is only used to help set the below macros.
#define MINIZ_X86_OR_X64_CPU 1
#endif
#if (__BYTE_ORDER__==__ORDER_LITTLE_ENDIAN__) || MINIZ_X86_OR_X64_CPU
// Set MINIZ_LITTLE_ENDIAN to 1 if the processor is little endian.
#define MINIZ_LITTLE_ENDIAN 1
#endif
#if MINIZ_X86_OR_X64_CPU
// Set MINIZ_USE_UNALIGNED_LOADS_AND_STORES to 1 on CPU's that permit efficient integer loads and stores from unaligned addresses.
#define MINIZ_USE_UNALIGNED_LOADS_AND_STORES 1
#endif
#if defined(_M_X64) || defined(_WIN64) || defined(__MINGW64__) || defined(_LP64) || defined(__LP64__) || defined(__ia64__) || defined(__x86_64__)
// Set MINIZ_HAS_64BIT_REGISTERS to 1 if operations on 64-bit integers are reasonably fast (and don't involve compiler generated calls to helper functions).
#define MINIZ_HAS_64BIT_REGISTERS 1
#endif
#ifdef __cplusplus
extern "C" {
#endif
// ------------------- zlib-style API Definitions.
// For more compatibility with zlib, miniz.c uses unsigned long for some parameters/struct members. Beware: mz_ulong can be either 32 or 64-bits!
typedef unsigned long mz_ulong;
// mz_free() internally uses the MZ_FREE() macro (which by default calls free() unless you've modified the MZ_MALLOC macro) to release a block allocated from the heap.
void mz_free(void *p);
#define MZ_ADLER32_INIT (1)
// mz_adler32() returns the initial adler-32 value to use when called with ptr==NULL.
mz_ulong mz_adler32(mz_ulong adler, const unsigned char *ptr, size_t buf_len);
#define MZ_CRC32_INIT (0)
// mz_crc32() returns the initial CRC-32 value to use when called with ptr==NULL.
mz_ulong mz_crc32(mz_ulong crc, const unsigned char *ptr, size_t buf_len);
// Compression strategies.
enum { MZ_DEFAULT_STRATEGY = 0, MZ_FILTERED = 1, MZ_HUFFMAN_ONLY = 2, MZ_RLE = 3, MZ_FIXED = 4 };
// Method
#define MZ_DEFLATED 8
#ifndef MINIZ_NO_ZLIB_APIS
// Heap allocation callbacks.
// Note that mz_alloc_func parameter types purpsosely differ from zlib's: items/size is size_t, not unsigned long.
typedef void *(*mz_alloc_func)(void *opaque, size_t items, size_t size);
typedef void (*mz_free_func)(void *opaque, void *address);
typedef void *(*mz_realloc_func)(void *opaque, void *address, size_t items, size_t size);
#define MZ_VERSION "9.1.15"
#define MZ_VERNUM 0x91F0
#define MZ_VER_MAJOR 9
#define MZ_VER_MINOR 1
#define MZ_VER_REVISION 15
#define MZ_VER_SUBREVISION 0
// Flush values. For typical usage you only need MZ_NO_FLUSH and MZ_FINISH. The other values are for advanced use (refer to the zlib docs).
enum { MZ_NO_FLUSH = 0, MZ_PARTIAL_FLUSH = 1, MZ_SYNC_FLUSH = 2, MZ_FULL_FLUSH = 3, MZ_FINISH = 4, MZ_BLOCK = 5 };
// Return status codes. MZ_PARAM_ERROR is non-standard.
enum { MZ_OK = 0, MZ_STREAM_END = 1, MZ_NEED_DICT = 2, MZ_ERRNO = -1, MZ_STREAM_ERROR = -2, MZ_DATA_ERROR = -3, MZ_MEM_ERROR = -4, MZ_BUF_ERROR = -5, MZ_VERSION_ERROR = -6, MZ_PARAM_ERROR = -10000 };
// Compression levels: 0-9 are the standard zlib-style levels, 10 is best possible compression (not zlib compatible, and may be very slow), MZ_DEFAULT_COMPRESSION=MZ_DEFAULT_LEVEL.
enum { MZ_NO_COMPRESSION = 0, MZ_BEST_SPEED = 1, MZ_BEST_COMPRESSION = 9, MZ_UBER_COMPRESSION = 10, MZ_DEFAULT_LEVEL = 6, MZ_DEFAULT_COMPRESSION = -1 };
// Window bits
#define MZ_DEFAULT_WINDOW_BITS 15
struct mz_internal_state;
// Compression/decompression stream struct.
typedef struct mz_stream_s
{
const unsigned char *next_in; // pointer to next byte to read
unsigned int avail_in; // number of bytes available at next_in
mz_ulong total_in; // total number of bytes consumed so far
unsigned char *next_out; // pointer to next byte to write
unsigned int avail_out; // number of bytes that can be written to next_out
mz_ulong total_out; // total number of bytes produced so far
char *msg; // error msg (unused)
struct mz_internal_state *state; // internal state, allocated by zalloc/zfree
mz_alloc_func zalloc; // optional heap allocation function (defaults to malloc)
mz_free_func zfree; // optional heap free function (defaults to free)
void *opaque; // heap alloc function user pointer
int data_type; // data_type (unused)
mz_ulong adler; // adler32 of the source or uncompressed data
mz_ulong reserved; // not used
} mz_stream;
typedef mz_stream *mz_streamp;
// Returns the version string of miniz.c.
const char *mz_version(void);
// mz_deflateInit() initializes a compressor with default options:
// Parameters:
// pStream must point to an initialized mz_stream struct.
// level must be between [MZ_NO_COMPRESSION, MZ_BEST_COMPRESSION].
// level 1 enables a specially optimized compression function that's been optimized purely for performance, not ratio.
// (This special func. is currently only enabled when MINIZ_USE_UNALIGNED_LOADS_AND_STORES and MINIZ_LITTLE_ENDIAN are defined.)
// Return values:
// MZ_OK on success.
// MZ_STREAM_ERROR if the stream is bogus.
// MZ_PARAM_ERROR if the input parameters are bogus.
// MZ_MEM_ERROR on out of memory.
int mz_deflateInit(mz_streamp pStream, int level);
// mz_deflateInit2() is like mz_deflate(), except with more control:
// Additional parameters:
// method must be MZ_DEFLATED
// window_bits must be MZ_DEFAULT_WINDOW_BITS (to wrap the deflate stream with zlib header/adler-32 footer) or -MZ_DEFAULT_WINDOW_BITS (raw deflate/no header or footer)
// mem_level must be between [1, 9] (it's checked but ignored by miniz.c)
int mz_deflateInit2(mz_streamp pStream, int level, int method, int window_bits, int mem_level, int strategy);
// Quickly resets a compressor without having to reallocate anything. Same as calling mz_deflateEnd() followed by mz_deflateInit()/mz_deflateInit2().
int mz_deflateReset(mz_streamp pStream);
// mz_deflate() compresses the input to output, consuming as much of the input and producing as much output as possible.
// Parameters:
// pStream is the stream to read from and write to. You must initialize/update the next_in, avail_in, next_out, and avail_out members.
// flush may be MZ_NO_FLUSH, MZ_PARTIAL_FLUSH/MZ_SYNC_FLUSH, MZ_FULL_FLUSH, or MZ_FINISH.
// Return values:
// MZ_OK on success (when flushing, or if more input is needed but not available, and/or there's more output to be written but the output buffer is full).
// MZ_STREAM_END if all input has been consumed and all output bytes have been written. Don't call mz_deflate() on the stream anymore.
// MZ_STREAM_ERROR if the stream is bogus.
// MZ_PARAM_ERROR if one of the parameters is invalid.
// MZ_BUF_ERROR if no forward progress is possible because the input and/or output buffers are empty. (Fill up the input buffer or free up some output space and try again.)
int mz_deflate(mz_streamp pStream, int flush);
// mz_deflateEnd() deinitializes a compressor:
// Return values:
// MZ_OK on success.
// MZ_STREAM_ERROR if the stream is bogus.
int mz_deflateEnd(mz_streamp pStream);
// mz_deflateBound() returns a (very) conservative upper bound on the amount of data that could be generated by deflate(), assuming flush is set to only MZ_NO_FLUSH or MZ_FINISH.
mz_ulong mz_deflateBound(mz_streamp pStream, mz_ulong source_len);
// Single-call compression functions mz_compress() and mz_compress2():
// Returns MZ_OK on success, or one of the error codes from mz_deflate() on failure.
int mz_compress(unsigned char *pDest, mz_ulong *pDest_len, const unsigned char *pSource, mz_ulong source_len);
int mz_compress2(unsigned char *pDest, mz_ulong *pDest_len, const unsigned char *pSource, mz_ulong source_len, int level);
// mz_compressBound() returns a (very) conservative upper bound on the amount of data that could be generated by calling mz_compress().
mz_ulong mz_compressBound(mz_ulong source_len);
// Initializes a decompressor.
int mz_inflateInit(mz_streamp pStream);
// mz_inflateInit2() is like mz_inflateInit() with an additional option that controls the window size and whether or not the stream has been wrapped with a zlib header/footer:
// window_bits must be MZ_DEFAULT_WINDOW_BITS (to parse zlib header/footer) or -MZ_DEFAULT_WINDOW_BITS (raw deflate).
int mz_inflateInit2(mz_streamp pStream, int window_bits);
// Decompresses the input stream to the output, consuming only as much of the input as needed, and writing as much to the output as possible.
// Parameters:
// pStream is the stream to read from and write to. You must initialize/update the next_in, avail_in, next_out, and avail_out members.
// flush may be MZ_NO_FLUSH, MZ_SYNC_FLUSH, or MZ_FINISH.
// On the first call, if flush is MZ_FINISH it's assumed the input and output buffers are both sized large enough to decompress the entire stream in a single call (this is slightly faster).
// MZ_FINISH implies that there are no more source bytes available beside what's already in the input buffer, and that the output buffer is large enough to hold the rest of the decompressed data.
// Return values:
// MZ_OK on success. Either more input is needed but not available, and/or there's more output to be written but the output buffer is full.
// MZ_STREAM_END if all needed input has been consumed and all output bytes have been written. For zlib streams, the adler-32 of the decompressed data has also been verified.
// MZ_STREAM_ERROR if the stream is bogus.
// MZ_DATA_ERROR if the deflate stream is invalid.
// MZ_PARAM_ERROR if one of the parameters is invalid.
// MZ_BUF_ERROR if no forward progress is possible because the input buffer is empty but the inflater needs more input to continue, or if the output buffer is not large enough. Call mz_inflate() again
// with more input data, or with more room in the output buffer (except when using single call decompression, described above).
int mz_inflate(mz_streamp pStream, int flush);
// Deinitializes a decompressor.
int mz_inflateEnd(mz_streamp pStream);
// Single-call decompression.
// Returns MZ_OK on success, or one of the error codes from mz_inflate() on failure.
int mz_uncompress(unsigned char *pDest, mz_ulong *pDest_len, const unsigned char *pSource, mz_ulong source_len);
// Returns a string description of the specified error code, or NULL if the error code is invalid.
const char *mz_error(int err);
// Redefine zlib-compatible names to miniz equivalents, so miniz.c can be used as a drop-in replacement for the subset of zlib that miniz.c supports.
// Define MINIZ_NO_ZLIB_COMPATIBLE_NAMES to disable zlib-compatibility if you use zlib in the same project.
#ifndef MINIZ_NO_ZLIB_COMPATIBLE_NAMES
typedef unsigned char Byte;
typedef unsigned int uInt;
typedef mz_ulong uLong;
typedef Byte Bytef;
typedef uInt uIntf;
typedef char charf;
typedef int intf;
typedef void *voidpf;
typedef uLong uLongf;
typedef void *voidp;
typedef void *const voidpc;
#define Z_NULL 0
#define Z_NO_FLUSH MZ_NO_FLUSH
#define Z_PARTIAL_FLUSH MZ_PARTIAL_FLUSH
#define Z_SYNC_FLUSH MZ_SYNC_FLUSH
#define Z_FULL_FLUSH MZ_FULL_FLUSH
#define Z_FINISH MZ_FINISH
#define Z_BLOCK MZ_BLOCK
#define Z_OK MZ_OK
#define Z_STREAM_END MZ_STREAM_END
#define Z_NEED_DICT MZ_NEED_DICT
#define Z_ERRNO MZ_ERRNO
#define Z_STREAM_ERROR MZ_STREAM_ERROR
#define Z_DATA_ERROR MZ_DATA_ERROR
#define Z_MEM_ERROR MZ_MEM_ERROR
#define Z_BUF_ERROR MZ_BUF_ERROR
#define Z_VERSION_ERROR MZ_VERSION_ERROR
#define Z_PARAM_ERROR MZ_PARAM_ERROR
#define Z_NO_COMPRESSION MZ_NO_COMPRESSION
#define Z_BEST_SPEED MZ_BEST_SPEED
#define Z_BEST_COMPRESSION MZ_BEST_COMPRESSION
#define Z_DEFAULT_COMPRESSION MZ_DEFAULT_COMPRESSION
#define Z_DEFAULT_STRATEGY MZ_DEFAULT_STRATEGY
#define Z_FILTERED MZ_FILTERED
#define Z_HUFFMAN_ONLY MZ_HUFFMAN_ONLY
#define Z_RLE MZ_RLE
#define Z_FIXED MZ_FIXED
#define Z_DEFLATED MZ_DEFLATED
#define Z_DEFAULT_WINDOW_BITS MZ_DEFAULT_WINDOW_BITS
#define alloc_func mz_alloc_func
#define free_func mz_free_func
#define internal_state mz_internal_state
#define z_stream mz_stream
#define deflateInit mz_deflateInit
#define deflateInit2 mz_deflateInit2
#define deflateReset mz_deflateReset
#define deflate mz_deflate
#define deflateEnd mz_deflateEnd
#define deflateBound mz_deflateBound
#define compress mz_compress
#define compress2 mz_compress2
#define compressBound mz_compressBound
#define inflateInit mz_inflateInit
#define inflateInit2 mz_inflateInit2
#define inflate mz_inflate
#define inflateEnd mz_inflateEnd
#define uncompress mz_uncompress
#define crc32 mz_crc32
#define adler32 mz_adler32
#define MAX_WBITS 15
#define MAX_MEM_LEVEL 9
#define zError mz_error
#define ZLIB_VERSION MZ_VERSION
#define ZLIB_VERNUM MZ_VERNUM
#define ZLIB_VER_MAJOR MZ_VER_MAJOR
#define ZLIB_VER_MINOR MZ_VER_MINOR
#define ZLIB_VER_REVISION MZ_VER_REVISION
#define ZLIB_VER_SUBREVISION MZ_VER_SUBREVISION
#define zlibVersion mz_version
#define zlib_version mz_version()
#endif // #ifndef MINIZ_NO_ZLIB_COMPATIBLE_NAMES
#endif // MINIZ_NO_ZLIB_APIS
// ------------------- Types and macros
typedef unsigned char mz_uint8;
typedef signed short mz_int16;
typedef unsigned short mz_uint16;
typedef unsigned int mz_uint32;
typedef unsigned int mz_uint;
typedef long long mz_int64;
typedef unsigned long long mz_uint64;
typedef int mz_bool;
#define MZ_FALSE (0)
#define MZ_TRUE (1)
// An attempt to work around MSVC's spammy "warning C4127: conditional expression is constant" message.
#ifdef _MSC_VER
#define MZ_MACRO_END while (0, 0)
#else
#define MZ_MACRO_END while (0)
#endif
// ------------------- ZIP archive reading/writing
#ifndef MINIZ_NO_ARCHIVE_APIS
enum
{
MZ_ZIP_MAX_IO_BUF_SIZE = 64*1024,
MZ_ZIP_MAX_ARCHIVE_FILENAME_SIZE = 260,
MZ_ZIP_MAX_ARCHIVE_FILE_COMMENT_SIZE = 256
};
typedef struct
{
mz_uint32 m_file_index;
mz_uint32 m_central_dir_ofs;
mz_uint16 m_version_made_by;
mz_uint16 m_version_needed;
mz_uint16 m_bit_flag;
mz_uint16 m_method;
#ifndef MINIZ_NO_TIME
time_t m_time;
#endif
mz_uint32 m_crc32;
mz_uint64 m_comp_size;
mz_uint64 m_uncomp_size;
mz_uint16 m_internal_attr;
mz_uint32 m_external_attr;
mz_uint64 m_local_header_ofs;
mz_uint32 m_comment_size;
char m_filename[MZ_ZIP_MAX_ARCHIVE_FILENAME_SIZE];
char m_comment[MZ_ZIP_MAX_ARCHIVE_FILE_COMMENT_SIZE];
} mz_zip_archive_file_stat;
typedef size_t (*mz_file_read_func)(void *pOpaque, mz_uint64 file_ofs, void *pBuf, size_t n);
typedef size_t (*mz_file_write_func)(void *pOpaque, mz_uint64 file_ofs, const void *pBuf, size_t n);
struct mz_zip_internal_state_tag;
typedef struct mz_zip_internal_state_tag mz_zip_internal_state;
typedef enum
{
MZ_ZIP_MODE_INVALID = 0,
MZ_ZIP_MODE_READING = 1,
MZ_ZIP_MODE_WRITING = 2,
MZ_ZIP_MODE_WRITING_HAS_BEEN_FINALIZED = 3
} mz_zip_mode;
typedef struct mz_zip_archive_tag
{
mz_uint64 m_archive_size;
mz_uint64 m_central_directory_file_ofs;
mz_uint m_total_files;
mz_zip_mode m_zip_mode;
mz_uint m_file_offset_alignment;
mz_alloc_func m_pAlloc;
mz_free_func m_pFree;
mz_realloc_func m_pRealloc;
void *m_pAlloc_opaque;
mz_file_read_func m_pRead;
mz_file_write_func m_pWrite;
void *m_pIO_opaque;
mz_zip_internal_state *m_pState;
} mz_zip_archive;
typedef enum
{
MZ_ZIP_FLAG_CASE_SENSITIVE = 0x0100,
MZ_ZIP_FLAG_IGNORE_PATH = 0x0200,
MZ_ZIP_FLAG_COMPRESSED_DATA = 0x0400,
MZ_ZIP_FLAG_DO_NOT_SORT_CENTRAL_DIRECTORY = 0x0800
} mz_zip_flags;
// ZIP archive reading
// Inits a ZIP archive reader.
// These functions read and validate the archive's central directory.
mz_bool mz_zip_reader_init(mz_zip_archive *pZip, mz_uint64 size, mz_uint32 flags);
mz_bool mz_zip_reader_init_mem(mz_zip_archive *pZip, const void *pMem, size_t size, mz_uint32 flags);
#ifndef MINIZ_NO_STDIO
mz_bool mz_zip_reader_init_file(mz_zip_archive *pZip, const char *pFilename, mz_uint32 flags);
#endif
// Returns the total number of files in the archive.
mz_uint mz_zip_reader_get_num_files(mz_zip_archive *pZip);
// Returns detailed information about an archive file entry.
mz_bool mz_zip_reader_file_stat(mz_zip_archive *pZip, mz_uint file_index, mz_zip_archive_file_stat *pStat);
// Determines if an archive file entry is a directory entry.
mz_bool mz_zip_reader_is_file_a_directory(mz_zip_archive *pZip, mz_uint file_index);
mz_bool mz_zip_reader_is_file_encrypted(mz_zip_archive *pZip, mz_uint file_index);
// Retrieves the filename of an archive file entry.
// Returns the number of bytes written to pFilename, or if filename_buf_size is 0 this function returns the number of bytes needed to fully store the filename.
mz_uint mz_zip_reader_get_filename(mz_zip_archive *pZip, mz_uint file_index, char *pFilename, mz_uint filename_buf_size);
// Attempts to locates a file in the archive's central directory.
// Valid flags: MZ_ZIP_FLAG_CASE_SENSITIVE, MZ_ZIP_FLAG_IGNORE_PATH
// Returns -1 if the file cannot be found.
int mz_zip_reader_locate_file(mz_zip_archive *pZip, const char *pName, const char *pComment, mz_uint flags);
// Extracts a archive file to a memory buffer using no memory allocation.
mz_bool mz_zip_reader_extract_to_mem_no_alloc(mz_zip_archive *pZip, mz_uint file_index, void *pBuf, size_t buf_size, mz_uint flags, void *pUser_read_buf, size_t user_read_buf_size);
mz_bool mz_zip_reader_extract_file_to_mem_no_alloc(mz_zip_archive *pZip, const char *pFilename, void *pBuf, size_t buf_size, mz_uint flags, void *pUser_read_buf, size_t user_read_buf_size);
// Extracts a archive file to a memory buffer.
mz_bool mz_zip_reader_extract_to_mem(mz_zip_archive *pZip, mz_uint file_index, void *pBuf, size_t buf_size, mz_uint flags);
mz_bool mz_zip_reader_extract_file_to_mem(mz_zip_archive *pZip, const char *pFilename, void *pBuf, size_t buf_size, mz_uint flags);
// Extracts a archive file to a dynamically allocated heap buffer.
void *mz_zip_reader_extract_to_heap(mz_zip_archive *pZip, mz_uint file_index, size_t *pSize, mz_uint flags);
void *mz_zip_reader_extract_file_to_heap(mz_zip_archive *pZip, const char *pFilename, size_t *pSize, mz_uint flags);
// Extracts a archive file using a callback function to output the file's data.
mz_bool mz_zip_reader_extract_to_callback(mz_zip_archive *pZip, mz_uint file_index, mz_file_write_func pCallback, void *pOpaque, mz_uint flags);
mz_bool mz_zip_reader_extract_file_to_callback(mz_zip_archive *pZip, const char *pFilename, mz_file_write_func pCallback, void *pOpaque, mz_uint flags);
#ifndef MINIZ_NO_STDIO
// Extracts a archive file to a disk file and sets its last accessed and modified times.
// This function only extracts files, not archive directory records.
mz_bool mz_zip_reader_extract_to_file(mz_zip_archive *pZip, mz_uint file_index, const char *pDst_filename, mz_uint flags);
mz_bool mz_zip_reader_extract_file_to_file(mz_zip_archive *pZip, const char *pArchive_filename, const char *pDst_filename, mz_uint flags);
#endif
// Ends archive reading, freeing all allocations, and closing the input archive file if mz_zip_reader_init_file() was used.
mz_bool mz_zip_reader_end(mz_zip_archive *pZip);
// ZIP archive writing
#ifndef MINIZ_NO_ARCHIVE_WRITING_APIS
// Inits a ZIP archive writer.
mz_bool mz_zip_writer_init(mz_zip_archive *pZip, mz_uint64 existing_size);
mz_bool mz_zip_writer_init_heap(mz_zip_archive *pZip, size_t size_to_reserve_at_beginning, size_t initial_allocation_size);
#ifndef MINIZ_NO_STDIO
mz_bool mz_zip_writer_init_file(mz_zip_archive *pZip, const char *pFilename, mz_uint64 size_to_reserve_at_beginning);
#endif
// Converts a ZIP archive reader object into a writer object, to allow efficient in-place file appends to occur on an existing archive.
// For archives opened using mz_zip_reader_init_file, pFilename must be the archive's filename so it can be reopened for writing. If the file can't be reopened, mz_zip_reader_end() will be called.
// For archives opened using mz_zip_reader_init_mem, the memory block must be growable using the realloc callback (which defaults to realloc unless you've overridden it).
// Finally, for archives opened using mz_zip_reader_init, the mz_zip_archive's user provided m_pWrite function cannot be NULL.
// Note: In-place archive modification is not recommended unless you know what you're doing, because if execution stops or something goes wrong before
// the archive is finalized the file's central directory will be hosed.
mz_bool mz_zip_writer_init_from_reader(mz_zip_archive *pZip, const char *pFilename);
// Adds the contents of a memory buffer to an archive. These functions record the current local time into the archive.
// To add a directory entry, call this method with an archive name ending in a forwardslash with empty buffer.
// level_and_flags - compression level (0-10, see MZ_BEST_SPEED, MZ_BEST_COMPRESSION, etc.) logically OR'd with zero or more mz_zip_flags, or just set to MZ_DEFAULT_COMPRESSION.
mz_bool mz_zip_writer_add_mem(mz_zip_archive *pZip, const char *pArchive_name, const void *pBuf, size_t buf_size, mz_uint level_and_flags);
mz_bool mz_zip_writer_add_mem_ex(mz_zip_archive *pZip, const char *pArchive_name, const void *pBuf, size_t buf_size, const void *pComment, mz_uint16 comment_size, mz_uint level_and_flags, mz_uint64 uncomp_size, mz_uint32 uncomp_crc32);
#ifndef MINIZ_NO_STDIO
// Adds the contents of a disk file to an archive. This function also records the disk file's modified time into the archive.
// level_and_flags - compression level (0-10, see MZ_BEST_SPEED, MZ_BEST_COMPRESSION, etc.) logically OR'd with zero or more mz_zip_flags, or just set to MZ_DEFAULT_COMPRESSION.
mz_bool mz_zip_writer_add_file(mz_zip_archive *pZip, const char *pArchive_name, const char *pSrc_filename, const void *pComment, mz_uint16 comment_size, mz_uint level_and_flags);
#endif
// Adds a file to an archive by fully cloning the data from another archive.
// This function fully clones the source file's compressed data (no recompression), along with its full filename, extra data, and comment fields.
mz_bool mz_zip_writer_add_from_zip_reader(mz_zip_archive *pZip, mz_zip_archive *pSource_zip, mz_uint file_index);
// Finalizes the archive by writing the central directory records followed by the end of central directory record.
// After an archive is finalized, the only valid call on the mz_zip_archive struct is mz_zip_writer_end().
// An archive must be manually finalized by calling this function for it to be valid.
mz_bool mz_zip_writer_finalize_archive(mz_zip_archive *pZip);
mz_bool mz_zip_writer_finalize_heap_archive(mz_zip_archive *pZip, void **pBuf, size_t *pSize);
// Ends archive writing, freeing all allocations, and closing the output file if mz_zip_writer_init_file() was used.
// Note for the archive to be valid, it must have been finalized before ending.
mz_bool mz_zip_writer_end(mz_zip_archive *pZip);
// Misc. high-level helper functions:
// mz_zip_add_mem_to_archive_file_in_place() efficiently (but not atomically) appends a memory blob to a ZIP archive.
// level_and_flags - compression level (0-10, see MZ_BEST_SPEED, MZ_BEST_COMPRESSION, etc.) logically OR'd with zero or more mz_zip_flags, or just set to MZ_DEFAULT_COMPRESSION.
mz_bool mz_zip_add_mem_to_archive_file_in_place(const char *pZip_filename, const char *pArchive_name, const void *pBuf, size_t buf_size, const void *pComment, mz_uint16 comment_size, mz_uint level_and_flags);
// Reads a single file from an archive into a heap block.
// Returns NULL on failure.
//
// Note: Due to MINIZ_NO_MALLOC, this function will not work.
//
void *mz_zip_extract_archive_file_to_heap(const char *pZip_filename, const char *pArchive_name, size_t *pSize, mz_uint zip_flags) __attribute__((warning("miniz is compiled without malloc so this function does not work")));
#endif // #ifndef MINIZ_NO_ARCHIVE_WRITING_APIS
#endif // #ifndef MINIZ_NO_ARCHIVE_APIS
// ------------------- Low-level Decompression API Definitions
// Decompression flags used by tinfl_decompress().
// TINFL_FLAG_PARSE_ZLIB_HEADER: If set, the input has a valid zlib header and ends with an adler32 checksum (it's a valid zlib stream). Otherwise, the input is a raw deflate stream.
// TINFL_FLAG_HAS_MORE_INPUT: If set, there are more input bytes available beyond the end of the supplied input buffer. If clear, the input buffer contains all remaining input.
// TINFL_FLAG_USING_NON_WRAPPING_OUTPUT_BUF: If set, the output buffer is large enough to hold the entire decompressed stream. If clear, the output buffer is at least the size of the dictionary (typically 32KB).
// TINFL_FLAG_COMPUTE_ADLER32: Force adler-32 checksum computation of the decompressed bytes.
enum
{
TINFL_FLAG_PARSE_ZLIB_HEADER = 1,
TINFL_FLAG_HAS_MORE_INPUT = 2,
TINFL_FLAG_USING_NON_WRAPPING_OUTPUT_BUF = 4,
TINFL_FLAG_COMPUTE_ADLER32 = 8
};
// High level decompression functions:
// tinfl_decompress_mem_to_heap() decompresses a block in memory to a heap block allocated via malloc().
// On entry:
// pSrc_buf, src_buf_len: Pointer and size of the Deflate or zlib source data to decompress.
// On return:
// Function returns a pointer to the decompressed data, or NULL on failure.
// *pOut_len will be set to the decompressed data's size, which could be larger than src_buf_len on uncompressible data.
// The caller must call mz_free() on the returned block when it's no longer needed.
//
// Note: Due to MINIZ_NO_MALLOC, this function will not work.
//
void *tinfl_decompress_mem_to_heap(const void *pSrc_buf, size_t src_buf_len, size_t *pOut_len, int flags) __attribute__((warning("miniz is compiled without malloc so this function does not work")));
// tinfl_decompress_mem_to_mem() decompresses a block in memory to another block in memory.
// Returns TINFL_DECOMPRESS_MEM_TO_MEM_FAILED on failure, or the number of bytes written on success.
#define TINFL_DECOMPRESS_MEM_TO_MEM_FAILED ((size_t)(-1))
size_t tinfl_decompress_mem_to_mem(void *pOut_buf, size_t out_buf_len, const void *pSrc_buf, size_t src_buf_len, int flags);
// tinfl_decompress_mem_to_callback() decompresses a block in memory to an internal 32KB buffer, and a user provided callback function will be called to flush the buffer.
//
// Note: Due to MINIZ_NO_MALLOC, this function will not work.
//
// Returns 1 on success or 0 or -1 on failure.
typedef int (*tinfl_put_buf_func_ptr)(const void* pBuf, int len, void *pUser);
int tinfl_decompress_mem_to_callback(const void *pIn_buf, size_t *pIn_buf_size, tinfl_put_buf_func_ptr pPut_buf_func, void *pPut_buf_user, int flags) __attribute__((warning("miniz is compiled without malloc so this function does not work")));;
struct tinfl_decompressor_tag; typedef struct tinfl_decompressor_tag tinfl_decompressor;
// Max size of LZ dictionary.
#define TINFL_LZ_DICT_SIZE 32768
// Return status.
typedef enum
{
TINFL_STATUS_BAD_PARAM = -3,
TINFL_STATUS_ADLER32_MISMATCH = -2,
TINFL_STATUS_FAILED = -1,
TINFL_STATUS_DONE = 0,
TINFL_STATUS_NEEDS_MORE_INPUT = 1,
TINFL_STATUS_HAS_MORE_OUTPUT = 2
} tinfl_status;
// Initializes the decompressor to its initial state.
#define tinfl_init(r) do { (r)->m_state = 0; } MZ_MACRO_END
#define tinfl_get_adler32(r) (r)->m_check_adler32
// Main low-level decompressor coroutine function. This is the only function actually needed for decompression. All the other functions are just high-level helpers for improved usability.
// This is a universal API, i.e. it can be used as a building block to build any desired higher level decompression API. In the limit case, it can be called once per every byte input or output.
tinfl_status tinfl_decompress(tinfl_decompressor *r, const mz_uint8 *pIn_buf_next, size_t *pIn_buf_size, mz_uint8 *pOut_buf_start, mz_uint8 *pOut_buf_next, size_t *pOut_buf_size, const mz_uint32 decomp_flags);
// Internal/private bits follow.
enum
{
TINFL_MAX_HUFF_TABLES = 3, TINFL_MAX_HUFF_SYMBOLS_0 = 288, TINFL_MAX_HUFF_SYMBOLS_1 = 32, TINFL_MAX_HUFF_SYMBOLS_2 = 19,
TINFL_FAST_LOOKUP_BITS = 10, TINFL_FAST_LOOKUP_SIZE = 1 << TINFL_FAST_LOOKUP_BITS
};
typedef struct
{
mz_uint8 m_code_size[TINFL_MAX_HUFF_SYMBOLS_0];
mz_int16 m_look_up[TINFL_FAST_LOOKUP_SIZE], m_tree[TINFL_MAX_HUFF_SYMBOLS_0 * 2];
} tinfl_huff_table;
#if MINIZ_HAS_64BIT_REGISTERS
#define TINFL_USE_64BIT_BITBUF 1
#endif
#if TINFL_USE_64BIT_BITBUF
typedef mz_uint64 tinfl_bit_buf_t;
#define TINFL_BITBUF_SIZE (64)
#else
typedef mz_uint32 tinfl_bit_buf_t;
#define TINFL_BITBUF_SIZE (32)
#endif
struct tinfl_decompressor_tag
{
mz_uint32 m_state, m_num_bits, m_zhdr0, m_zhdr1, m_z_adler32, m_final, m_type, m_check_adler32, m_dist, m_counter, m_num_extra, m_table_sizes[TINFL_MAX_HUFF_TABLES];
tinfl_bit_buf_t m_bit_buf;
size_t m_dist_from_out_buf_start;
tinfl_huff_table m_tables[TINFL_MAX_HUFF_TABLES];
mz_uint8 m_raw_header[4], m_len_codes[TINFL_MAX_HUFF_SYMBOLS_0 + TINFL_MAX_HUFF_SYMBOLS_1 + 137];
};
// ------------------- Low-level Compression API Definitions
// Set TDEFL_LESS_MEMORY to 1 to use less memory (compression will be slightly slower, and raw/dynamic blocks will be output more frequently).
#define TDEFL_LESS_MEMORY 1
// tdefl_init() compression flags logically OR'd together (low 12 bits contain the max. number of probes per dictionary search):
// TDEFL_DEFAULT_MAX_PROBES: The compressor defaults to 128 dictionary probes per dictionary search. 0=Huffman only, 1=Huffman+LZ (fastest/crap compression), 4095=Huffman+LZ (slowest/best compression).
enum
{
TDEFL_HUFFMAN_ONLY = 0, TDEFL_DEFAULT_MAX_PROBES = 128, TDEFL_MAX_PROBES_MASK = 0xFFF
};
// TDEFL_WRITE_ZLIB_HEADER: If set, the compressor outputs a zlib header before the deflate data, and the Adler-32 of the source data at the end. Otherwise, you'll get raw deflate data.
// TDEFL_COMPUTE_ADLER32: Always compute the adler-32 of the input data (even when not writing zlib headers).
// TDEFL_GREEDY_PARSING_FLAG: Set to use faster greedy parsing, instead of more efficient lazy parsing.
// TDEFL_NONDETERMINISTIC_PARSING_FLAG: Enable to decrease the compressor's initialization time to the minimum, but the output may vary from run to run given the same input (depending on the contents of memory).
// TDEFL_RLE_MATCHES: Only look for RLE matches (matches with a distance of 1)
// TDEFL_FILTER_MATCHES: Discards matches <= 5 chars if enabled.
// TDEFL_FORCE_ALL_STATIC_BLOCKS: Disable usage of optimized Huffman tables.
// TDEFL_FORCE_ALL_RAW_BLOCKS: Only use raw (uncompressed) deflate blocks.
// The low 12 bits are reserved to control the max # of hash probes per dictionary lookup (see TDEFL_MAX_PROBES_MASK).
enum
{
TDEFL_WRITE_ZLIB_HEADER = 0x01000,
TDEFL_COMPUTE_ADLER32 = 0x02000,
TDEFL_GREEDY_PARSING_FLAG = 0x04000,
TDEFL_NONDETERMINISTIC_PARSING_FLAG = 0x08000,
TDEFL_RLE_MATCHES = 0x10000,
TDEFL_FILTER_MATCHES = 0x20000,
TDEFL_FORCE_ALL_STATIC_BLOCKS = 0x40000,
TDEFL_FORCE_ALL_RAW_BLOCKS = 0x80000
};
// High level compression functions:
// tdefl_compress_mem_to_heap() compresses a block in memory to a heap block allocated via malloc().
// On entry:
// pSrc_buf, src_buf_len: Pointer and size of source block to compress.
// flags: The max match finder probes (default is 128) logically OR'd against the above flags. Higher probes are slower but improve compression.
// On return:
// Function returns a pointer to the compressed data, or NULL on failure.
// *pOut_len will be set to the compressed data's size, which could be larger than src_buf_len on uncompressible data.
// The caller must free() the returned block when it's no longer needed.
//
// Note: Due to MINIZ_NO_MALLOC, this function will not work.
//
void *tdefl_compress_mem_to_heap(const void *pSrc_buf, size_t src_buf_len, size_t *pOut_len, int flags) __attribute__((warning("miniz is compiled without malloc so this function does not work")));;
// tdefl_compress_mem_to_mem() compresses a block in memory to another block in memory.
// Returns 0 on failure.
size_t tdefl_compress_mem_to_mem(void *pOut_buf, size_t out_buf_len, const void *pSrc_buf, size_t src_buf_len, int flags);
// Compresses an image to a compressed PNG file in memory.
// On entry:
// pImage, w, h, and num_chans describe the image to compress. num_chans may be 1, 2, 3, or 4.
// The image pitch in bytes per scanline will be w*num_chans. The leftmost pixel on the top scanline is stored first in memory.
// level may range from [0,10], use MZ_NO_COMPRESSION, MZ_BEST_SPEED, MZ_BEST_COMPRESSION, etc. or a decent default is MZ_DEFAULT_LEVEL
// If flip is true, the image will be flipped on the Y axis (useful for OpenGL apps).
// On return:
// Function returns a pointer to the compressed data, or NULL on failure.
// *pLen_out will be set to the size of the PNG image file.
// The caller must mz_free() the returned heap block (which will typically be larger than *pLen_out) when it's no longer needed.
void *tdefl_write_image_to_png_file_in_memory_ex(const void *pImage, int w, int h, int num_chans, size_t *pLen_out, mz_uint level, mz_bool flip);
void *tdefl_write_image_to_png_file_in_memory(const void *pImage, int w, int h, int num_chans, size_t *pLen_out);
// Output stream interface. The compressor uses this interface to write compressed data. It'll typically be called TDEFL_OUT_BUF_SIZE at a time.
typedef mz_bool (*tdefl_put_buf_func_ptr)(const void* pBuf, int len, void *pUser);
// tdefl_compress_mem_to_output() compresses a block to an output stream. The above helpers use this function internally.
//
// Note: Due to MINIZ_NO_MALLOC, this function will not work.
//
mz_bool tdefl_compress_mem_to_output(const void *pBuf, size_t buf_len, tdefl_put_buf_func_ptr pPut_buf_func, void *pPut_buf_user, int flags) __attribute__((warning("miniz is compiled without malloc so this function does not work")));;
enum { TDEFL_MAX_HUFF_TABLES = 3, TDEFL_MAX_HUFF_SYMBOLS_0 = 288, TDEFL_MAX_HUFF_SYMBOLS_1 = 32, TDEFL_MAX_HUFF_SYMBOLS_2 = 19, TDEFL_LZ_DICT_SIZE = 32768, TDEFL_LZ_DICT_SIZE_MASK = TDEFL_LZ_DICT_SIZE - 1, TDEFL_MIN_MATCH_LEN = 3, TDEFL_MAX_MATCH_LEN = 258 };
// TDEFL_OUT_BUF_SIZE MUST be large enough to hold a single entire compressed output block (using static/fixed Huffman codes).
#if TDEFL_LESS_MEMORY
enum { TDEFL_LZ_CODE_BUF_SIZE = 24 * 1024, TDEFL_OUT_BUF_SIZE = (TDEFL_LZ_CODE_BUF_SIZE * 13 ) / 10, TDEFL_MAX_HUFF_SYMBOLS = 288, TDEFL_LZ_HASH_BITS = 12, TDEFL_LEVEL1_HASH_SIZE_MASK = 4095, TDEFL_LZ_HASH_SHIFT = (TDEFL_LZ_HASH_BITS + 2) / 3, TDEFL_LZ_HASH_SIZE = 1 << TDEFL_LZ_HASH_BITS };
#else
enum { TDEFL_LZ_CODE_BUF_SIZE = 64 * 1024, TDEFL_OUT_BUF_SIZE = (TDEFL_LZ_CODE_BUF_SIZE * 13 ) / 10, TDEFL_MAX_HUFF_SYMBOLS = 288, TDEFL_LZ_HASH_BITS = 15, TDEFL_LEVEL1_HASH_SIZE_MASK = 4095, TDEFL_LZ_HASH_SHIFT = (TDEFL_LZ_HASH_BITS + 2) / 3, TDEFL_LZ_HASH_SIZE = 1 << TDEFL_LZ_HASH_BITS };
#endif
// The low-level tdefl functions below may be used directly if the above helper functions aren't flexible enough. The low-level functions don't make any heap allocations, unlike the above helper functions.
typedef enum
{
TDEFL_STATUS_BAD_PARAM = -2,
TDEFL_STATUS_PUT_BUF_FAILED = -1,
TDEFL_STATUS_OKAY = 0,
TDEFL_STATUS_DONE = 1,
} tdefl_status;
// Must map to MZ_NO_FLUSH, MZ_SYNC_FLUSH, etc. enums
typedef enum
{
TDEFL_NO_FLUSH = 0,
TDEFL_SYNC_FLUSH = 2,
TDEFL_FULL_FLUSH = 3,
TDEFL_FINISH = 4
} tdefl_flush;
// tdefl's compression state structure.
typedef struct
{
tdefl_put_buf_func_ptr m_pPut_buf_func;
void *m_pPut_buf_user;
mz_uint m_flags, m_max_probes[2];
int m_greedy_parsing;
mz_uint m_adler32, m_lookahead_pos, m_lookahead_size, m_dict_size;
mz_uint8 *m_pLZ_code_buf, *m_pLZ_flags, *m_pOutput_buf, *m_pOutput_buf_end;
mz_uint m_num_flags_left, m_total_lz_bytes, m_lz_code_buf_dict_pos, m_bits_in, m_bit_buffer;
mz_uint m_saved_match_dist, m_saved_match_len, m_saved_lit, m_output_flush_ofs, m_output_flush_remaining, m_finished, m_block_index, m_wants_to_finish;
tdefl_status m_prev_return_status;
const void *m_pIn_buf;
void *m_pOut_buf;
size_t *m_pIn_buf_size, *m_pOut_buf_size;
tdefl_flush m_flush;
const mz_uint8 *m_pSrc;
size_t m_src_buf_left, m_out_buf_ofs;
mz_uint8 m_dict[TDEFL_LZ_DICT_SIZE + TDEFL_MAX_MATCH_LEN - 1];
mz_uint16 m_huff_count[TDEFL_MAX_HUFF_TABLES][TDEFL_MAX_HUFF_SYMBOLS];
mz_uint16 m_huff_codes[TDEFL_MAX_HUFF_TABLES][TDEFL_MAX_HUFF_SYMBOLS];
mz_uint8 m_huff_code_sizes[TDEFL_MAX_HUFF_TABLES][TDEFL_MAX_HUFF_SYMBOLS];
mz_uint8 m_lz_code_buf[TDEFL_LZ_CODE_BUF_SIZE];
mz_uint16 m_next[TDEFL_LZ_DICT_SIZE];
mz_uint16 m_hash[TDEFL_LZ_HASH_SIZE];
mz_uint8 m_output_buf[TDEFL_OUT_BUF_SIZE];
} tdefl_compressor;
// Initializes the compressor.
// There is no corresponding deinit() function because the tdefl API's do not dynamically allocate memory.
// pBut_buf_func: If **not** NULL, output data will be supplied to the specified callback. In this case, the user should call the tdefl_compress_buffer() API for compression.
// If pBut_buf_func is NULL the user should always call the tdefl_compress() API.
// flags: See the above enums (TDEFL_HUFFMAN_ONLY, TDEFL_WRITE_ZLIB_HEADER, etc.)
tdefl_status tdefl_init(tdefl_compressor *d, tdefl_put_buf_func_ptr pPut_buf_func, void *pPut_buf_user, int flags);
// Compresses a block of data, consuming as much of the specified input buffer as possible, and writing as much compressed data to the specified output buffer as possible.
tdefl_status tdefl_compress(tdefl_compressor *d, const void *pIn_buf, size_t *pIn_buf_size, void *pOut_buf, size_t *pOut_buf_size, tdefl_flush flush);
// tdefl_compress_buffer() is only usable when the tdefl_init() is called with a non-NULL tdefl_put_buf_func_ptr.
// tdefl_compress_buffer() always consumes the entire input buffer.
tdefl_status tdefl_compress_buffer(tdefl_compressor *d, const void *pIn_buf, size_t in_buf_size, tdefl_flush flush);
tdefl_status tdefl_get_prev_return_status(tdefl_compressor *d);
mz_uint32 tdefl_get_adler32(tdefl_compressor *d);
// Can't use tdefl_create_comp_flags_from_zip_params if MINIZ_NO_ZLIB_APIS isn't defined, because it uses some of its macros.
#ifndef MINIZ_NO_ZLIB_APIS
// Create tdefl_compress() flags given zlib-style compression parameters.
// level may range from [0,10] (where 10 is absolute max compression, but may be much slower on some files)
// window_bits may be -15 (raw deflate) or 15 (zlib)
// strategy may be either MZ_DEFAULT_STRATEGY, MZ_FILTERED, MZ_HUFFMAN_ONLY, MZ_RLE, or MZ_FIXED
mz_uint tdefl_create_comp_flags_from_zip_params(int level, int window_bits, int strategy);
#endif // #ifndef MINIZ_NO_ZLIB_APIS
#ifdef __cplusplus
}
#endif
#endif // MINIZ_HEADER_INCLUDED

50
tools/sdk/esp32/include/esp_rom/include/esp32/rom/rsa_pss.h Normal file
View File

@ -0,0 +1,50 @@
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#pragma once
#include "sdkconfig.h"
#ifdef CONFIG_ESP32_REV_MIN_3
#include <stdint.h>
#include <stdbool.h>
#include <stddef.h>
#ifdef __cplusplus
extern "C" {
#endif
#define ETS_SIG_LEN 384 /* Bytes */
#define ETS_DIGEST_LEN 32 /* SHA-256, bytes */
/* Secure Boot Version 2 - Public Key format */
typedef struct {
uint8_t n[384]; /* Public key modulus */
uint32_t e; /* Public key exponent */
uint8_t rinv[384];
uint32_t mdash;
} ets_rsa_pubkey_t;
bool ets_rsa_pss_verify(const ets_rsa_pubkey_t *key, const uint8_t *sig, const uint8_t *digest, uint8_t *verified_digest);
void ets_mgf1_sha256(const uint8_t *mgfSeed, size_t seedLen, size_t maskLen, uint8_t *mask);
bool ets_emsa_pss_verify(const uint8_t *encoded_message, const uint8_t *mhash, uint8_t *verified_digest);
#ifdef __cplusplus
}
#endif
#endif // CONFIG_ESP32_REV_MIN_3

251
tools/sdk/esp32/include/esp_rom/include/esp32/rom/rtc.h Normal file
View File

@ -0,0 +1,251 @@
// Copyright 2010-2016 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#ifndef _ROM_RTC_H_
#define _ROM_RTC_H_
#include "ets_sys.h"
#include <stdbool.h>
#include <stdint.h>
#include "soc/soc.h"
#include "soc/rtc_cntl_reg.h"
#include "soc/reset_reasons.h"
#ifdef __cplusplus
extern "C" {
#endif
/** \defgroup rtc_apis, rtc registers and memory related apis
* @brief rtc apis
*/
/** @addtogroup rtc_apis
* @{
*/
/**************************************************************************************
* Note: *
* Some Rtc memory and registers are used, in ROM or in internal library. *
* Please do not use reserved or used rtc memory or registers. *
* *
*************************************************************************************
* RTC Memory & Store Register usage
*************************************************************************************
* rtc memory addr type size usage
* 0x3ff61000(0x50000000) Slow SIZE_CP Co-Processor code/Reset Entry
* 0x3ff61000+SIZE_CP Slow 8192-SIZE_CP
*
* 0x3ff80000(0x400c0000) Fast 8192 deep sleep entry code
*
*************************************************************************************
* RTC store registers usage
* RTC_CNTL_STORE0_REG Reserved
* RTC_CNTL_STORE1_REG RTC_SLOW_CLK calibration value
* RTC_CNTL_STORE2_REG Boot time, low word
* RTC_CNTL_STORE3_REG Boot time, high word
* RTC_CNTL_STORE4_REG External XTAL frequency. The frequency must necessarily be even, otherwise there will be a conflict with the low bit, which is used to disable logs in the ROM code.
* RTC_CNTL_STORE5_REG APB bus frequency
* RTC_CNTL_STORE6_REG FAST_RTC_MEMORY_ENTRY
* RTC_CNTL_STORE7_REG FAST_RTC_MEMORY_CRC
*************************************************************************************
*/
#define RTC_SLOW_CLK_CAL_REG RTC_CNTL_STORE1_REG
#define RTC_BOOT_TIME_LOW_REG RTC_CNTL_STORE2_REG
#define RTC_BOOT_TIME_HIGH_REG RTC_CNTL_STORE3_REG
#define RTC_XTAL_FREQ_REG RTC_CNTL_STORE4_REG
#define RTC_APB_FREQ_REG RTC_CNTL_STORE5_REG
#define RTC_ENTRY_ADDR_REG RTC_CNTL_STORE6_REG
#define RTC_RESET_CAUSE_REG RTC_CNTL_STORE6_REG
#define RTC_MEMORY_CRC_REG RTC_CNTL_STORE7_REG
#define RTC_DISABLE_ROM_LOG ((1 << 0) | (1 << 16)) //!< Disable logging from the ROM code.
typedef enum {
AWAKE = 0, //<CPU ON
LIGHT_SLEEP = BIT0, //CPU waiti, PLL ON. We don't need explicitly set this mode.
DEEP_SLEEP = BIT1 //CPU OFF, PLL OFF, only specific timer could wake up
} SLEEP_MODE;
typedef enum {
NO_MEAN = 0,
POWERON_RESET = 1, /**<1, Vbat power on reset*/
SW_RESET = 3, /**<3, Software reset digital core*/
OWDT_RESET = 4, /**<4, Legacy watch dog reset digital core*/
DEEPSLEEP_RESET = 5, /**<3, Deep Sleep reset digital core*/
SDIO_RESET = 6, /**<6, Reset by SLC module, reset digital core*/
TG0WDT_SYS_RESET = 7, /**<7, Timer Group0 Watch dog reset digital core*/
TG1WDT_SYS_RESET = 8, /**<8, Timer Group1 Watch dog reset digital core*/
RTCWDT_SYS_RESET = 9, /**<9, RTC Watch dog Reset digital core*/
INTRUSION_RESET = 10, /**<10, Instrusion tested to reset CPU*/
TGWDT_CPU_RESET = 11, /**<11, Time Group reset CPU*/
SW_CPU_RESET = 12, /**<12, Software reset CPU*/
RTCWDT_CPU_RESET = 13, /**<13, RTC Watch dog Reset CPU*/
EXT_CPU_RESET = 14, /**<14, for APP CPU, reseted by PRO CPU*/
RTCWDT_BROWN_OUT_RESET = 15, /**<15, Reset when the vdd voltage is not stable*/
RTCWDT_RTC_RESET = 16 /**<16, RTC Watch dog reset digital core and rtc module*/
} RESET_REASON;
// Check if the reset reason defined in ROM is compatible with soc/reset_reasons.h
_Static_assert((soc_reset_reason_t)POWERON_RESET == RESET_REASON_CHIP_POWER_ON, "POWERON_RESET != RESET_REASON_CHIP_POWER_ON");
_Static_assert((soc_reset_reason_t)SW_RESET == RESET_REASON_CORE_SW, "SW_RESET != RESET_REASON_CORE_SW");
_Static_assert((soc_reset_reason_t)DEEPSLEEP_RESET == RESET_REASON_CORE_DEEP_SLEEP, "DEEPSLEEP_RESET != RESET_REASON_CORE_DEEP_SLEEP");
_Static_assert((soc_reset_reason_t)TG0WDT_SYS_RESET == RESET_REASON_CORE_MWDT0, "TG0WDT_SYS_RESET != RESET_REASON_CORE_MWDT0");
_Static_assert((soc_reset_reason_t)TG1WDT_SYS_RESET == RESET_REASON_CORE_MWDT1, "TG1WDT_SYS_RESET != RESET_REASON_CORE_MWDT1");
_Static_assert((soc_reset_reason_t)RTCWDT_SYS_RESET == RESET_REASON_CORE_RTC_WDT, "RTCWDT_SYS_RESET != RESET_REASON_CORE_RTC_WDT");
_Static_assert((soc_reset_reason_t)TGWDT_CPU_RESET == RESET_REASON_CPU0_MWDT0, "TGWDT_CPU_RESET != RESET_REASON_CPU0_MWDT0");
_Static_assert((soc_reset_reason_t)SW_CPU_RESET == RESET_REASON_CPU0_SW, "SW_CPU_RESET != RESET_REASON_CPU0_SW");
_Static_assert((soc_reset_reason_t)RTCWDT_CPU_RESET == RESET_REASON_CPU0_RTC_WDT, "RTCWDT_CPU_RESET != RESET_REASON_CPU0_RTC_WDT");
_Static_assert((soc_reset_reason_t)RTCWDT_BROWN_OUT_RESET == RESET_REASON_SYS_BROWN_OUT, "RTCWDT_BROWN_OUT_RESET != RESET_REASON_SYS_BROWN_OUT");
_Static_assert((soc_reset_reason_t)RTCWDT_RTC_RESET == RESET_REASON_SYS_RTC_WDT, "RTCWDT_RTC_RESET != RESET_REASON_SYS_RTC_WDT");
typedef enum {
NO_SLEEP = 0,
EXT_EVENT0_TRIG = BIT0,
EXT_EVENT1_TRIG = BIT1,
GPIO_TRIG = BIT2,
TIMER_EXPIRE = BIT3,
SDIO_TRIG = BIT4,
MAC_TRIG = BIT5,
UART0_TRIG = BIT6,
UART1_TRIG = BIT7,
TOUCH_TRIG = BIT8,
SAR_TRIG = BIT9,
BT_TRIG = BIT10
} WAKEUP_REASON;
typedef enum {
DISEN_WAKEUP = NO_SLEEP,
EXT_EVENT0_TRIG_EN = EXT_EVENT0_TRIG,
EXT_EVENT1_TRIG_EN = EXT_EVENT1_TRIG,
GPIO_TRIG_EN = GPIO_TRIG,
TIMER_EXPIRE_EN = TIMER_EXPIRE,
SDIO_TRIG_EN = SDIO_TRIG,
MAC_TRIG_EN = MAC_TRIG,
UART0_TRIG_EN = UART0_TRIG,
UART1_TRIG_EN = UART1_TRIG,
TOUCH_TRIG_EN = TOUCH_TRIG,
SAR_TRIG_EN = SAR_TRIG,
BT_TRIG_EN = BT_TRIG
} WAKEUP_ENABLE;
typedef enum {
NO_INT = 0,
WAKEUP_INT = BIT0,
REJECT_INT = BIT1,
SDIO_IDLE_INT = BIT2,
RTC_WDT_INT = BIT3,
RTC_TIME_VALID_INT = BIT4
} RTC_INT_REASON;
typedef enum {
DISEN_INT = 0,
WAKEUP_INT_EN = WAKEUP_INT,
REJECT_INT_EN = REJECT_INT,
SDIO_IDLE_INT_EN = SDIO_IDLE_INT,
RTC_WDT_INT_EN = RTC_WDT_INT,
RTC_TIME_VALID_INT_EN = RTC_TIME_VALID_INT
} RTC_INT_EN;
/**
* @brief Get the reset reason for CPU.
*
* @param int cpu_no : CPU no.
*
* @return RESET_REASON
*/
RESET_REASON rtc_get_reset_reason(int cpu_no);
/**
* @brief Get the wakeup cause for CPU.
*
* @param int cpu_no : CPU no.
*
* @return WAKEUP_REASON
*/
WAKEUP_REASON rtc_get_wakeup_cause(void);
/**
* @brief Get CRC for Fast RTC Memory.
*
* @param uint32_t start_addr : 0 - 0x7ff for Fast RTC Memory.
*
* @param uint32_t crc_len : 0 - 0x7ff, 0 for 4 byte, 0x7ff for 0x2000 byte.
*
* @return uint32_t : CRC32 result
*/
uint32_t calc_rtc_memory_crc(uint32_t start_addr, uint32_t crc_len);
/**
* @brief Set CRC of Fast RTC memory 0-0x7ff into RTC STORE7.
*
* @param None
*
* @return None
*/
void set_rtc_memory_crc(void);
/**
* @brief Suppress ROM log by setting specific RTC control register.
* @note This is not a permanent disable of ROM logging since the RTC register can not retain after chip reset.
*
* @param None
*
* @return None
*/
static inline void rtc_suppress_rom_log(void)
{
/* To disable logging in the ROM, only the least significant bit of the register is used,
* but since this register is also used to store the frequency of the main crystal (RTC_XTAL_FREQ_REG),
* you need to write to this register in the same format.
* Namely, the upper 16 bits and lower should be the same.
*/
REG_SET_BIT(RTC_CNTL_STORE4_REG, RTC_DISABLE_ROM_LOG);
}
/**
* @brief Software Reset digital core.
*
* It is not recommended to use this function in esp-idf, use
* esp_restart() instead.
*
* @param None
*
* @return None
*/
void __attribute__((noreturn)) software_reset(void);
/**
* @brief Software Reset digital core.
*
* It is not recommended to use this function in esp-idf, use
* esp_restart() instead.
*
* @param int cpu_no : The CPU to reset, 0 for PRO CPU, 1 for APP CPU.
*
* @return None
*/
void software_reset_cpu(int cpu_no);
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* _ROM_RTC_H_ */

121
tools/sdk/esp32/include/esp_rom/include/esp32/rom/secure_boot.h Normal file
View File

@ -0,0 +1,121 @@
/*
* SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "sdkconfig.h"
#pragma once
#include <stdint.h>
#include "ets_sys.h"
#ifdef __cplusplus
extern "C" {
#endif
void ets_secure_boot_start(void);
void ets_secure_boot_finish(void);
void ets_secure_boot_hash(const uint32_t *buf);
void ets_secure_boot_obtain(void);
int ets_secure_boot_check(uint32_t *buf);
void ets_secure_boot_rd_iv(uint32_t *buf);
void ets_secure_boot_rd_abstract(uint32_t *buf);
bool ets_secure_boot_check_start(uint8_t abs_index, uint32_t iv_addr);
int ets_secure_boot_check_finish(uint32_t *abstract);
#ifdef CONFIG_ESP32_REV_MIN_3
#include "rsa_pss.h"
#define SECURE_BOOT_NUM_BLOCKS 1
#define CRC_SIGN_BLOCK_LEN 1196
#define SIG_BLOCK_PADDING 4096
#define ETS_SECURE_BOOT_V2_SIGNATURE_MAGIC 0xE7
// Anti-FI measure: use full words for success/fail internally, instead of 0/non-zero
typedef enum {
SBV2_SUCCESS = 0x3A5A5AA5,
SB_SUCCESS = 0x3A5A5AA5,
SBV2_FAILED = 0xA533885A,
SB_FAILED = 0xA533885A,
} secure_boot_v2_status_t;
/* Secure Boot Version 2 signature format for ESP32 ECO3 */
typedef struct {
uint8_t magic_byte;
uint8_t version;
uint8_t _reserved1;
uint8_t _reserved2;
uint8_t image_digest[32];
ets_rsa_pubkey_t key;
uint8_t signature[384];
uint32_t block_crc;
uint8_t _padding[16];
} ets_secure_boot_sig_block_t;
_Static_assert(sizeof(ets_secure_boot_sig_block_t) == 1216, "invalid sig block size");
/* ROM supports up to 3, but IDF only checks the first one (SECURE_BOOT_NUM_BLOCKS) */
#define SECURE_BOOT_MAX_APPENDED_SIGN_BLOCKS_TO_IMAGE 3
/* Multiple key block support */
typedef struct {
ets_secure_boot_sig_block_t block[SECURE_BOOT_MAX_APPENDED_SIGN_BLOCKS_TO_IMAGE];
uint8_t _padding[4096 - (sizeof(ets_secure_boot_sig_block_t) * SECURE_BOOT_MAX_APPENDED_SIGN_BLOCKS_TO_IMAGE)];
} ets_secure_boot_signature_t;
_Static_assert(sizeof(ets_secure_boot_signature_t) == 4096, "invalid sig sector size");
typedef struct {
const void *key_digests[SECURE_BOOT_NUM_BLOCKS];
} ets_secure_boot_key_digests_t;
/** @brief Verifies the signature block appended to a firmware image. Implemented in the ROM.
*
* This function is used to verify the bootloader before burning its public key hash into Efuse.
* Also, it is used to verify the app on loading the image on boot and on OTA.
*
* @param sig The signature block flashed aligned 4096 bytes from the firmware. (ROM implementation expects 3 blocks, sig->block[3]).
* @param image_digest The SHA-256 Digest of the firmware to be verified
* @param trusted_key_digest The SHA-256 Digest of the public key (ets_rsa_pubkey_t) of a single signature block.
* @param verified_digest RSA-PSS signature of image_digest. Pass an uninitialised array.
*
* @return SBV2_SUCCESS if signature is valid
* SBV2_FAILED for failures.
*/
secure_boot_v2_status_t ets_secure_boot_verify_signature(const ets_secure_boot_signature_t *sig, const uint8_t *image_digest, const uint8_t *trusted_key_digest, uint8_t *verified_digest);
/** @brief This function verifies the 1st stage bootloader. Implemented in the ROM.
* Reboots post verification. It reads the Efuse key for verification of the public key.
*
* This function is not used in the current workflow.
*
*/
void ets_secure_boot_verify_boot_bootloader(void);
/** @brief Confirms if the secure boot V2 has been enabled. Implemented in the ROM.
*
* In ESP32-ECO3 - It checks the value of ABS_DONE_1 in EFuse.
*
* @return true if is Secure boot v2 has been enabled
* False if Secure boot v2 has not been enabled.
*/
bool ets_use_secure_boot_v2(void);
#else
#define SECURE_BOOT_NUM_BLOCKS 0
#endif /* CONFIG_ESP32_REV_MIN_3 */
#ifdef __cplusplus
}
#endif

65
tools/sdk/esp32/include/esp_rom/include/esp32/rom/sha.h Normal file
View File

@ -0,0 +1,65 @@
/*
ROM functions for hardware SHA support.
It is not recommended to use these functions directly. If using
them from esp-idf then use the esp_sha_lock_engine() and
esp_sha_lock_memory_block() functions in esp32/sha.h to ensure
exclusive access.
*/
// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#ifndef _ROM_SHA_H_
#define _ROM_SHA_H_
#include <stdint.h>
#include <stdbool.h>
#include <stddef.h>
#ifdef __cplusplus
extern "C" {
#endif
typedef struct SHAContext {
bool start;
uint32_t total_input_bits[4];
} SHA_CTX;
enum SHA_TYPE {
SHA1 = 0,
SHA2_256,
SHA2_384,
SHA2_512,
SHA_INVALID = -1,
};
/* Do not use these function in multi core mode due to
* inside they have no safe implementation (without DPORT workaround).
*/
void ets_sha_init(SHA_CTX *ctx);
void ets_sha_enable(void);
void ets_sha_disable(void);
void ets_sha_update(SHA_CTX *ctx, enum SHA_TYPE type, const uint8_t *input, size_t input_bits);
void ets_sha_finish(SHA_CTX *ctx, enum SHA_TYPE type, uint8_t *output);
#ifdef __cplusplus
}
#endif
#endif /* _ROM_SHA_H_ */

569
tools/sdk/esp32/include/esp_rom/include/esp32/rom/spi_flash.h Normal file
View File

@ -0,0 +1,569 @@
// Copyright 2010-2016 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#ifndef _ROM_SPI_FLASH_H_
#define _ROM_SPI_FLASH_H_
#include <stdint.h>
#include <stdbool.h>
#include "esp_attr.h"
#include "sdkconfig.h"
#ifdef CONFIG_LEGACY_INCLUDE_COMMON_HEADERS
#include "soc/spi_reg.h"
#endif
#ifdef __cplusplus
extern "C" {
#endif
/** \defgroup spi_flash_apis, spi flash operation related apis
* @brief spi_flash apis
*/
/** @addtogroup spi_flash_apis
* @{
*/
/*************************************************************
* Note
*************************************************************
* 1. ESP32 chip have 4 SPI slave/master, however, SPI0 is
* used as an SPI master to access Flash and ext-SRAM by
* Cache module. It will support Decryto read for Flash,
* read/write for ext-SRAM. And SPI1 is also used as an
* SPI master for Flash read/write and ext-SRAM read/write.
* It will support Encrypto write for Flash.
* 2. As an SPI master, SPI support Highest clock to 80M,
* however, Flash with 80M Clock should be configured
* for different Flash chips. If you want to use 80M
* clock We should use the SPI that is certified by
* Espressif. However, the certification is not started
* at the time, so please use 40M clock at the moment.
* 3. SPI Flash can use 2 lines or 4 lines mode. If you
* use 2 lines mode, you can save two pad SPIHD and
* SPIWP for gpio. ESP32 support configured SPI pad for
* Flash, the configuration is stored in efuse and flash.
* However, the configurations of pads should be certified
* by Espressif. If you use this function, please use 40M
* clock at the moment.
* 4. ESP32 support to use Common SPI command to configure
* Flash to QIO mode, if you failed to configure with fix
* command. With Common SPI Command, ESP32 can also provide
* a way to use same Common SPI command groups on different
* Flash chips.
* 5. This functions are not protected by packeting, Please use the
*************************************************************
*/
#define PERIPHS_SPI_FLASH_CMD SPI_CMD_REG(1)
#define PERIPHS_SPI_FLASH_ADDR SPI_ADDR_REG(1)
#define PERIPHS_SPI_FLASH_CTRL SPI_CTRL_REG(1)
#define PERIPHS_SPI_FLASH_CTRL1 SPI_CTRL1_REG(1)
#define PERIPHS_SPI_FLASH_STATUS SPI_RD_STATUS_REG(1)
#define PERIPHS_SPI_FLASH_USRREG SPI_USER_REG(1)
#define PERIPHS_SPI_FLASH_USRREG1 SPI_USER1_REG(1)
#define PERIPHS_SPI_FLASH_USRREG2 SPI_USER2_REG(1)
#define PERIPHS_SPI_FLASH_C0 SPI_W0_REG(1)
#define PERIPHS_SPI_FLASH_C1 SPI_W1_REG(1)
#define PERIPHS_SPI_FLASH_C2 SPI_W2_REG(1)
#define PERIPHS_SPI_FLASH_C3 SPI_W3_REG(1)
#define PERIPHS_SPI_FLASH_C4 SPI_W4_REG(1)
#define PERIPHS_SPI_FLASH_C5 SPI_W5_REG(1)
#define PERIPHS_SPI_FLASH_C6 SPI_W6_REG(1)
#define PERIPHS_SPI_FLASH_C7 SPI_W7_REG(1)
#define PERIPHS_SPI_FLASH_TX_CRC SPI_TX_CRC_REG(1)
#define SPI0_R_QIO_DUMMY_CYCLELEN 3
#define SPI0_R_QIO_ADDR_BITSLEN 31
#define SPI0_R_FAST_DUMMY_CYCLELEN 7
#define SPI0_R_DIO_DUMMY_CYCLELEN 1
#define SPI0_R_DIO_ADDR_BITSLEN 27
#define SPI0_R_FAST_ADDR_BITSLEN 23
#define SPI0_R_SIO_ADDR_BITSLEN 23
#define SPI1_R_QIO_DUMMY_CYCLELEN 3
#define SPI1_R_QIO_ADDR_BITSLEN 31
#define SPI1_R_FAST_DUMMY_CYCLELEN 7
#define SPI1_R_DIO_DUMMY_CYCLELEN 3
#define SPI1_R_DIO_ADDR_BITSLEN 31
#define SPI1_R_FAST_ADDR_BITSLEN 23
#define SPI1_R_SIO_ADDR_BITSLEN 23
#define ESP_ROM_SPIFLASH_W_SIO_ADDR_BITSLEN 23
#define ESP_ROM_SPIFLASH_TWO_BYTE_STATUS_EN SPI_WRSR_2B
//SPI address register
#define ESP_ROM_SPIFLASH_BYTES_LEN 24
#define ESP_ROM_SPIFLASH_BUFF_BYTE_WRITE_NUM 32
#define ESP_ROM_SPIFLASH_BUFF_BYTE_READ_NUM 64
#define ESP_ROM_SPIFLASH_BUFF_BYTE_READ_BITS 0x3f
//SPI status register
#define ESP_ROM_SPIFLASH_BUSY_FLAG BIT0
#define ESP_ROM_SPIFLASH_WRENABLE_FLAG BIT1
#define ESP_ROM_SPIFLASH_BP0 BIT2
#define ESP_ROM_SPIFLASH_BP1 BIT3
#define ESP_ROM_SPIFLASH_BP2 BIT4
#define ESP_ROM_SPIFLASH_WR_PROTECT (ESP_ROM_SPIFLASH_BP0|ESP_ROM_SPIFLASH_BP1|ESP_ROM_SPIFLASH_BP2)
#define ESP_ROM_SPIFLASH_QE BIT9
#define ESP_ROM_SPIFLASH_BP_MASK_ISSI (BIT7 | BIT5 | BIT4 | BIT3 | BIT2)
//Extra dummy for flash read
#define ESP_ROM_SPIFLASH_DUMMY_LEN_PLUS_20M 0
#define ESP_ROM_SPIFLASH_DUMMY_LEN_PLUS_26M 0
#define ESP_ROM_SPIFLASH_DUMMY_LEN_PLUS_40M 1
#define ESP_ROM_SPIFLASH_DUMMY_LEN_PLUS_80M 2
#define FLASH_ID_GD25LQ32C 0xC86016
typedef enum {
ESP_ROM_SPIFLASH_QIO_MODE = 0,
ESP_ROM_SPIFLASH_QOUT_MODE,
ESP_ROM_SPIFLASH_DIO_MODE,
ESP_ROM_SPIFLASH_DOUT_MODE,
ESP_ROM_SPIFLASH_FASTRD_MODE,
ESP_ROM_SPIFLASH_SLOWRD_MODE
} esp_rom_spiflash_read_mode_t;
typedef enum {
ESP_ROM_SPIFLASH_RESULT_OK,
ESP_ROM_SPIFLASH_RESULT_ERR,
ESP_ROM_SPIFLASH_RESULT_TIMEOUT
} esp_rom_spiflash_result_t;
typedef struct {
uint32_t device_id;
uint32_t chip_size; // chip size in bytes
uint32_t block_size;
uint32_t sector_size;
uint32_t page_size;
uint32_t status_mask;
} esp_rom_spiflash_chip_t;
typedef struct {
uint8_t data_length;
uint8_t read_cmd0;
uint8_t read_cmd1;
uint8_t write_cmd;
uint16_t data_mask;
uint16_t data;
} esp_rom_spiflash_common_cmd_t;
/**
* @brief Fix the bug in SPI hardware communication with Flash/Ext-SRAM in High Speed.
* Please do not call this function in SDK.
*
* @param uint8_t spi: 0 for SPI0(Cache Access), 1 for SPI1(Flash read/write).
*
* @param uint8_t freqdiv: Pll is 80M, 4 for 20M, 3 for 26.7M, 2 for 40M, 1 for 80M.
*
* @return None
*/
void esp_rom_spiflash_fix_dummylen(uint8_t spi, uint8_t freqdiv);
/**
* @brief Select SPI Flash to QIO mode when WP pad is read from Flash.
* Please do not call this function in SDK.
*
* @param uint8_t wp_gpio_num: WP gpio number.
*
* @param uint32_t ishspi: 0 for spi, 1 for hspi, flash pad decided by strapping
* else, bit[5:0] spiclk, bit[11:6] spiq, bit[17:12] spid, bit[23:18] spics0, bit[29:24] spihd
*
* @return None
*/
void esp_rom_spiflash_select_qiomode(uint8_t wp_gpio_num, uint32_t ishspi);
/**
* @brief Set SPI Flash pad drivers.
* Please do not call this function in SDK.
*
* @param uint8_t wp_gpio_num: WP gpio number.
*
* @param uint32_t ishspi: 0 for spi, 1 for hspi, flash pad decided by strapping
* else, bit[5:0] spiclk, bit[11:6] spiq, bit[17:12] spid, bit[23:18] spics0, bit[29:24] spihd
*
* @param uint8_t *drvs: drvs[0]-bit[3:0] for cpiclk, bit[7:4] for spiq, drvs[1]-bit[3:0] for spid, drvs[1]-bit[7:4] for spid
* drvs[2]-bit[3:0] for spihd, drvs[2]-bit[7:4] for spiwp.
* Values usually read from falsh by rom code, function usually callde by rom code.
* if value with bit(3) set, the value is valid, bit[2:0] is the real value.
*
* @return None
*/
void esp_rom_spiflash_set_drvs(uint8_t wp_gpio_num, uint32_t ishspi, uint8_t *drvs);
/**
* @brief Select SPI Flash function for pads.
* Please do not call this function in SDK.
*
* @param uint32_t ishspi: 0 for spi, 1 for hspi, flash pad decided by strapping
* else, bit[5:0] spiclk, bit[11:6] spiq, bit[17:12] spid, bit[23:18] spics0, bit[29:24] spihd
*
* @return None
*/
void esp_rom_spiflash_select_padsfunc(uint32_t ishspi);
/**
* @brief SPI Flash init, clock divisor is 4, use 1 line Slow read mode.
* Please do not call this function in SDK.
*
* @param uint32_t ishspi: 0 for spi, 1 for hspi, flash pad decided by strapping
* else, bit[5:0] spiclk, bit[11:6] spiq, bit[17:12] spid, bit[23:18] spics0, bit[29:24] spihd
*
* @param uint8_t legacy: In legacy mode, more SPI command is used in line.
*
* @return None
*/
void esp_rom_spiflash_attach(uint32_t ishspi, bool legacy);
/**
* @brief SPI Read Flash status register. We use CMD 0x05 (RDSR).
* Please do not call this function in SDK.
*
* @param esp_rom_spiflash_chip_t *spi : The information for Flash, which is exported from ld file.
*
* @param uint32_t *status : The pointer to which to return the Flash status value.
*
* @return ESP_ROM_SPIFLASH_RESULT_OK : read OK.
* ESP_ROM_SPIFLASH_RESULT_ERR : read error.
* ESP_ROM_SPIFLASH_RESULT_TIMEOUT : read timeout.
*/
esp_rom_spiflash_result_t esp_rom_spiflash_read_status(esp_rom_spiflash_chip_t *spi, uint32_t *status);
/**
* @brief SPI Read Flash status register bits 8-15. We use CMD 0x35 (RDSR2).
* Please do not call this function in SDK.
*
* @param esp_rom_spiflash_chip_t *spi : The information for Flash, which is exported from ld file.
*
* @param uint32_t *status : The pointer to which to return the Flash status value.
*
* @return ESP_ROM_SPIFLASH_RESULT_OK : read OK.
* ESP_ROM_SPIFLASH_RESULT_ERR : read error.
* ESP_ROM_SPIFLASH_RESULT_TIMEOUT : read timeout.
*/
esp_rom_spiflash_result_t esp_rom_spiflash_read_statushigh(esp_rom_spiflash_chip_t *spi, uint32_t *status);
/**
* @brief Write status to Flash status register.
* Please do not call this function in SDK.
*
* @param esp_rom_spiflash_chip_t *spi : The information for Flash, which is exported from ld file.
*
* @param uint32_t status_value : Value to .
*
* @return ESP_ROM_SPIFLASH_RESULT_OK : write OK.
* ESP_ROM_SPIFLASH_RESULT_ERR : write error.
* ESP_ROM_SPIFLASH_RESULT_TIMEOUT : write timeout.
*/
esp_rom_spiflash_result_t esp_rom_spiflash_write_status(esp_rom_spiflash_chip_t *spi, uint32_t status_value);
/**
* @brief Use a command to Read Flash status register.
* Please do not call this function in SDK.
*
* @param esp_rom_spiflash_chip_t *spi : The information for Flash, which is exported from ld file.
*
* @param uint32_t*status : The pointer to which to return the Flash status value.
*
* @return ESP_ROM_SPIFLASH_RESULT_OK : read OK.
* ESP_ROM_SPIFLASH_RESULT_ERR : read error.
* ESP_ROM_SPIFLASH_RESULT_TIMEOUT : read timeout.
*/
esp_rom_spiflash_result_t esp_rom_spiflash_read_user_cmd(uint32_t *status, uint8_t cmd);
/**
* @brief Config SPI Flash read mode when init.
* Please do not call this function in SDK.
*
* @param esp_rom_spiflash_read_mode_t mode : QIO/QOUT/DIO/DOUT/FastRD/SlowRD.
*
* This function does not try to set the QIO Enable bit in the status register, caller is responsible for this.
*
* @return ESP_ROM_SPIFLASH_RESULT_OK : config OK.
* ESP_ROM_SPIFLASH_RESULT_ERR : config error.
* ESP_ROM_SPIFLASH_RESULT_TIMEOUT : config timeout.
*/
esp_rom_spiflash_result_t esp_rom_spiflash_config_readmode(esp_rom_spiflash_read_mode_t mode);
/**
* @brief Config SPI Flash clock divisor.
* Please do not call this function in SDK.
*
* @param uint8_t freqdiv: clock divisor.
*
* @param uint8_t spi: 0 for SPI0, 1 for SPI1.
*
* @return ESP_ROM_SPIFLASH_RESULT_OK : config OK.
* ESP_ROM_SPIFLASH_RESULT_ERR : config error.
* ESP_ROM_SPIFLASH_RESULT_TIMEOUT : config timeout.
*/
esp_rom_spiflash_result_t esp_rom_spiflash_config_clk(uint8_t freqdiv, uint8_t spi);
/**
* @brief Send CommonCmd to Flash so that is can go into QIO mode, some Flash use different CMD.
* Please do not call this function in SDK.
*
* @param esp_rom_spiflash_common_cmd_t *cmd : A struct to show the action of a command.
*
* @return uint16_t 0 : do not send command any more.
* 1 : go to the next command.
* n > 1 : skip (n - 1) commands.
*/
uint16_t esp_rom_spiflash_common_cmd(esp_rom_spiflash_common_cmd_t *cmd);
/**
* @brief Unlock SPI write protect.
* Please do not call this function in SDK.
*
* @param None.
*
* @return ESP_ROM_SPIFLASH_RESULT_OK : Unlock OK.
* ESP_ROM_SPIFLASH_RESULT_ERR : Unlock error.
* ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Unlock timeout.
*/
esp_rom_spiflash_result_t esp_rom_spiflash_unlock(void);
/**
* @brief SPI write protect.
* Please do not call this function in SDK.
*
* @param None.
*
* @return ESP_ROM_SPIFLASH_RESULT_OK : Lock OK.
* ESP_ROM_SPIFLASH_RESULT_ERR : Lock error.
* ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Lock timeout.
*/
esp_rom_spiflash_result_t esp_rom_spiflash_lock(void);
/**
* @brief Update SPI Flash parameter.
* Please do not call this function in SDK.
*
* @param uint32_t deviceId : Device ID read from SPI, the low 32 bit.
*
* @param uint32_t chip_size : The Flash size.
*
* @param uint32_t block_size : The Flash block size.
*
* @param uint32_t sector_size : The Flash sector size.
*
* @param uint32_t page_size : The Flash page size.
*
* @param uint32_t status_mask : The Mask used when read status from Flash(use single CMD).
*
* @return ESP_ROM_SPIFLASH_RESULT_OK : Update OK.
* ESP_ROM_SPIFLASH_RESULT_ERR : Update error.
* ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Update timeout.
*/
esp_rom_spiflash_result_t esp_rom_spiflash_config_param(uint32_t deviceId, uint32_t chip_size, uint32_t block_size,
uint32_t sector_size, uint32_t page_size, uint32_t status_mask);
/**
* @brief Erase whole flash chip.
* Please do not call this function in SDK.
*
* @param None
*
* @return ESP_ROM_SPIFLASH_RESULT_OK : Erase OK.
* ESP_ROM_SPIFLASH_RESULT_ERR : Erase error.
* ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Erase timeout.
*/
esp_rom_spiflash_result_t esp_rom_spiflash_erase_chip(void);
/**
* @brief Erase a 64KB block of flash
* Uses SPI flash command D8H.
* Please do not call this function in SDK.
*
* @param uint32_t block_num : Which block to erase.
*
* @return ESP_ROM_SPIFLASH_RESULT_OK : Erase OK.
* ESP_ROM_SPIFLASH_RESULT_ERR : Erase error.
* ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Erase timeout.
*/
esp_rom_spiflash_result_t esp_rom_spiflash_erase_block(uint32_t block_num);
/**
* @brief Erase a sector of flash.
* Uses SPI flash command 20H.
* Please do not call this function in SDK.
*
* @param uint32_t sector_num : Which sector to erase.
*
* @return ESP_ROM_SPIFLASH_RESULT_OK : Erase OK.
* ESP_ROM_SPIFLASH_RESULT_ERR : Erase error.
* ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Erase timeout.
*/
esp_rom_spiflash_result_t esp_rom_spiflash_erase_sector(uint32_t sector_num);
/**
* @brief Erase some sectors.
* Please do not call this function in SDK.
*
* @param uint32_t start_addr : Start addr to erase, should be sector aligned.
*
* @param uint32_t area_len : Length to erase, should be sector aligned.
*
* @return ESP_ROM_SPIFLASH_RESULT_OK : Erase OK.
* ESP_ROM_SPIFLASH_RESULT_ERR : Erase error.
* ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Erase timeout.
*/
esp_rom_spiflash_result_t esp_rom_spiflash_erase_area(uint32_t start_addr, uint32_t area_len);
/**
* @brief Write Data to Flash, you should Erase it yourself if need.
* Please do not call this function in SDK.
*
* @param uint32_t dest_addr : Address to write, should be 4 bytes aligned.
*
* @param const uint32_t *src : The pointer to data which is to write.
*
* @param uint32_t len : Length to write, should be 4 bytes aligned.
*
* @return ESP_ROM_SPIFLASH_RESULT_OK : Write OK.
* ESP_ROM_SPIFLASH_RESULT_ERR : Write error.
* ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Write timeout.
*/
esp_rom_spiflash_result_t esp_rom_spiflash_write(uint32_t dest_addr, const uint32_t *src, int32_t len);
/**
* @brief Read Data from Flash, you should Erase it yourself if need.
* Please do not call this function in SDK.
*
* @param uint32_t src_addr : Address to read, should be 4 bytes aligned.
*
* @param uint32_t *dest : The buf to read the data.
*
* @param uint32_t len : Length to read, should be 4 bytes aligned.
*
* @return ESP_ROM_SPIFLASH_RESULT_OK : Read OK.
* ESP_ROM_SPIFLASH_RESULT_ERR : Read error.
* ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Read timeout.
*/
esp_rom_spiflash_result_t esp_rom_spiflash_read(uint32_t src_addr, uint32_t *dest, int32_t len);
/**
* @brief SPI1 go into encrypto mode.
* Please do not call this function in SDK.
*
* @param None
*
* @return None
*/
void esp_rom_spiflash_write_encrypted_enable(void);
/**
* @brief Prepare 32 Bytes data to encrpto writing, you should Erase it yourself if need.
* Please do not call this function in SDK.
*
* @param uint32_t flash_addr : Address to write, should be 32 bytes aligned.
*
* @param uint32_t *data : The pointer to data which is to write.
*
* @return ESP_ROM_SPIFLASH_RESULT_OK : Prepare OK.
* ESP_ROM_SPIFLASH_RESULT_ERR : Prepare error.
* ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Prepare timeout.
*/
esp_rom_spiflash_result_t esp_rom_spiflash_prepare_encrypted_data(uint32_t flash_addr, uint32_t *data);
/**
* @brief SPI1 go out of encrypto mode.
* Please do not call this function in SDK.
*
* @param None
*
* @return None
*/
void esp_rom_spiflash_write_encrypted_disable(void);
/**
* @brief Write data to flash with transparent encryption.
* @note Sectors to be written should already be erased.
*
* @note Please do not call this function in SDK.
*
* @param uint32_t flash_addr : Address to write, should be 32 byte aligned.
*
* @param uint32_t *data : The pointer to data to write. Note, this pointer must
* be 32 bit aligned and the content of the data will be
* modified by the encryption function.
*
* @param uint32_t len : Length to write, should be 32 bytes aligned.
*
* @return ESP_ROM_SPIFLASH_RESULT_OK : Data written successfully.
* ESP_ROM_SPIFLASH_RESULT_ERR : Encryption write error.
* ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Encrypto write timeout.
*/
esp_rom_spiflash_result_t esp_rom_spiflash_write_encrypted(uint32_t flash_addr, uint32_t *data, uint32_t len);
/** @brief Wait until SPI flash write operation is complete
*
* @note Please do not call this function in SDK.
*
* Reads the Write In Progress bit of the SPI flash status register,
* repeats until this bit is zero (indicating write complete).
*
* @return ESP_ROM_SPIFLASH_RESULT_OK : Write is complete
* ESP_ROM_SPIFLASH_RESULT_ERR : Error while reading status.
*/
esp_rom_spiflash_result_t esp_rom_spiflash_wait_idle(esp_rom_spiflash_chip_t *spi);
/** @brief Enable Quad I/O pin functions
*
* @note Please do not call this function in SDK.
*
* Sets the HD & WP pin functions for Quad I/O modes, based on the
* efuse SPI pin configuration.
*
* @param wp_gpio_num - Number of the WP pin to reconfigure for quad I/O.
*
* @param spiconfig - Pin configuration, as returned from ets_efuse_get_spiconfig().
* - If this parameter is 0, default SPI pins are used and wp_gpio_num parameter is ignored.
* - If this parameter is 1, default HSPI pins are used and wp_gpio_num parameter is ignored.
* - For other values, this parameter encodes the HD pin number and also the CLK pin number. CLK pin selection is used
* to determine if HSPI or SPI peripheral will be used (use HSPI if CLK pin is the HSPI clock pin, otherwise use SPI).
* Both HD & WP pins are configured via GPIO matrix to map to the selected peripheral.
*/
void esp_rom_spiflash_select_qio_pins(uint8_t wp_gpio_num, uint32_t spiconfig);
/**
* @brief Clear WEL bit unconditionally.
*
* @return always ESP_ROM_SPIFLASH_RESULT_OK
*/
esp_rom_spiflash_result_t esp_rom_spiflash_write_disable(void);
/** @brief Global esp_rom_spiflash_chip_t structure used by ROM functions
*
*/
extern esp_rom_spiflash_chip_t g_rom_flashchip;
extern uint8_t g_rom_spiflash_dummy_len_plus[];
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* _ROM_SPI_FLASH_H_ */

27
tools/sdk/esp32/include/esp_rom/include/esp32/rom/tbconsole.h Normal file
View File

@ -0,0 +1,27 @@
// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#ifndef _ROM_TBCONSOLE_H_
#define _ROM_TBCONSOLE_H_
#ifdef __cplusplus
extern "C" {
#endif
void start_tb_console(void);
#ifdef __cplusplus
}
#endif
#endif /* _ROM_TBCONSOLE_H_ */

99
tools/sdk/esp32/include/esp_rom/include/esp32/rom/tjpgd.h Normal file
View File

@ -0,0 +1,99 @@
/*----------------------------------------------------------------------------/
/ TJpgDec - Tiny JPEG Decompressor include file (C)ChaN, 2012
/----------------------------------------------------------------------------*/
#ifndef _TJPGDEC
#define _TJPGDEC
/*---------------------------------------------------------------------------*/
/* System Configurations */
#define JD_SZBUF 512 /* Size of stream input buffer */
#define JD_FORMAT 0 /* Output pixel format 0:RGB888 (3 BYTE/pix), 1:RGB565 (1 WORD/pix) */
#define JD_USE_SCALE 1 /* Use descaling feature for output */
#define JD_TBLCLIP 1 /* Use table for saturation (might be a bit faster but increases 1K bytes of code size) */
/*---------------------------------------------------------------------------*/
#ifdef __cplusplus
extern "C" {
#endif
/* These types must be 16-bit, 32-bit or larger integer */
typedef int INT;
typedef unsigned int UINT;
/* These types must be 8-bit integer */
typedef char CHAR;
typedef unsigned char UCHAR;
typedef unsigned char BYTE;
/* These types must be 16-bit integer */
typedef short SHORT;
typedef unsigned short USHORT;
typedef unsigned short WORD;
typedef unsigned short WCHAR;
/* These types must be 32-bit integer */
typedef long LONG;
typedef unsigned long ULONG;
typedef unsigned long DWORD;
/* Error code */
typedef enum {
JDR_OK = 0, /* 0: Succeeded */
JDR_INTR, /* 1: Interrupted by output function */
JDR_INP, /* 2: Device error or wrong termination of input stream */
JDR_MEM1, /* 3: Insufficient memory pool for the image */
JDR_MEM2, /* 4: Insufficient stream input buffer */
JDR_PAR, /* 5: Parameter error */
JDR_FMT1, /* 6: Data format error (may be damaged data) */
JDR_FMT2, /* 7: Right format but not supported */
JDR_FMT3 /* 8: Not supported JPEG standard */
} JRESULT;
/* Rectangular structure */
typedef struct {
WORD left, right, top, bottom;
} JRECT;
/* Decompressor object structure */
typedef struct JDEC JDEC;
struct JDEC {
UINT dctr; /* Number of bytes available in the input buffer */
BYTE* dptr; /* Current data read ptr */
BYTE* inbuf; /* Bit stream input buffer */
BYTE dmsk; /* Current bit in the current read byte */
BYTE scale; /* Output scaling ratio */
BYTE msx, msy; /* MCU size in unit of block (width, height) */
BYTE qtid[3]; /* Quantization table ID of each component */
SHORT dcv[3]; /* Previous DC element of each component */
WORD nrst; /* Restart inverval */
UINT width, height; /* Size of the input image (pixel) */
BYTE* huffbits[2][2]; /* Huffman bit distribution tables [id][dcac] */
WORD* huffcode[2][2]; /* Huffman code word tables [id][dcac] */
BYTE* huffdata[2][2]; /* Huffman decoded data tables [id][dcac] */
LONG* qttbl[4]; /* Dequaitizer tables [id] */
void* workbuf; /* Working buffer for IDCT and RGB output */
BYTE* mcubuf; /* Working buffer for the MCU */
void* pool; /* Pointer to available memory pool */
UINT sz_pool; /* Size of momory pool (bytes available) */
UINT (*infunc)(JDEC*, BYTE*, UINT);/* Pointer to jpeg stream input function */
void* device; /* Pointer to I/O device identifiler for the session */
};
/* TJpgDec API functions */
JRESULT jd_prepare (JDEC*, UINT(*)(JDEC*,BYTE*,UINT), void*, UINT, void*);
JRESULT jd_decomp (JDEC*, UINT(*)(JDEC*,void*,JRECT*), BYTE);
#ifdef __cplusplus
}
#endif
#endif /* _TJPGDEC */

420
tools/sdk/esp32/include/esp_rom/include/esp32/rom/uart.h Normal file
View File

@ -0,0 +1,420 @@
// Copyright 2010-2016 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#ifndef _ROM_UART_H_
#define _ROM_UART_H_
#include "esp_types.h"
#include "esp_attr.h"
#include "ets_sys.h"
#include "soc/soc.h"
#include "soc/uart_periph.h"
#ifdef __cplusplus
extern "C" {
#endif
/** \defgroup uart_apis, uart configuration and communication related apis
* @brief uart apis
*/
/** @addtogroup uart_apis
* @{
*/
#define RX_BUFF_SIZE 0x100
#define TX_BUFF_SIZE 100
//uart int enable register ctrl bits
#define UART_RCV_INTEN BIT0
#define UART_TRX_INTEN BIT1
#define UART_LINE_STATUS_INTEN BIT2
//uart int identification ctrl bits
#define UART_INT_FLAG_MASK 0x0E
//uart fifo ctrl bits
#define UART_CLR_RCV_FIFO BIT1
#define UART_CLR_TRX_FIFO BIT2
#define UART_RCVFIFO_TRG_LVL_BITS BIT6
//uart line control bits
#define UART_DIV_LATCH_ACCESS_BIT BIT7
//uart line status bits
#define UART_RCV_DATA_RDY_FLAG BIT0
#define UART_RCV_OVER_FLOW_FLAG BIT1
#define UART_RCV_PARITY_ERR_FLAG BIT2
#define UART_RCV_FRAME_ERR_FLAG BIT3
#define UART_BRK_INT_FLAG BIT4
#define UART_TRX_FIFO_EMPTY_FLAG BIT5
#define UART_TRX_ALL_EMPTY_FLAG BIT6 // include fifo and shift reg
#define UART_RCV_ERR_FLAG BIT7
//send and receive message frame head
#define FRAME_FLAG 0x7E
typedef enum {
UART_LINE_STATUS_INT_FLAG = 0x06,
UART_RCV_FIFO_INT_FLAG = 0x04,
UART_RCV_TMOUT_INT_FLAG = 0x0C,
UART_TXBUFF_EMPTY_INT_FLAG = 0x02
} UartIntType; //consider bit0 for int_flag
typedef enum {
RCV_ONE_BYTE = 0x0,
RCV_FOUR_BYTE = 0x1,
RCV_EIGHT_BYTE = 0x2,
RCV_FOURTEEN_BYTE = 0x3
} UartRcvFifoTrgLvl;
typedef enum {
FIVE_BITS = 0x0,
SIX_BITS = 0x1,
SEVEN_BITS = 0x2,
EIGHT_BITS = 0x3
} UartBitsNum4Char;
typedef enum {
ONE_STOP_BIT = 1,
ONE_HALF_STOP_BIT = 2,
TWO_STOP_BIT = 3
} UartStopBitsNum;
typedef enum {
NONE_BITS = 0,
ODD_BITS = 2,
EVEN_BITS = 3
} UartParityMode;
typedef enum {
STICK_PARITY_DIS = 0,
STICK_PARITY_EN = 2
} UartExistParity;
typedef enum {
BIT_RATE_9600 = 9600,
BIT_RATE_19200 = 19200,
BIT_RATE_38400 = 38400,
BIT_RATE_57600 = 57600,
BIT_RATE_115200 = 115200,
BIT_RATE_230400 = 230400,
BIT_RATE_460800 = 460800,
BIT_RATE_921600 = 921600
} UartBautRate;
typedef enum {
NONE_CTRL,
HARDWARE_CTRL,
XON_XOFF_CTRL
} UartFlowCtrl;
typedef enum {
EMPTY,
UNDER_WRITE,
WRITE_OVER
} RcvMsgBuffState;
typedef struct {
uint8_t *pRcvMsgBuff;
uint8_t *pWritePos;
uint8_t *pReadPos;
uint8_t TrigLvl;
RcvMsgBuffState BuffState;
} RcvMsgBuff;
typedef struct {
uint32_t TrxBuffSize;
uint8_t *pTrxBuff;
} TrxMsgBuff;
typedef enum {
BAUD_RATE_DET,
WAIT_SYNC_FRM,
SRCH_MSG_HEAD,
RCV_MSG_BODY,
RCV_ESC_CHAR,
} RcvMsgState;
typedef struct {
UartBautRate baut_rate;
UartBitsNum4Char data_bits;
UartExistParity exist_parity;
UartParityMode parity; // chip size in byte
UartStopBitsNum stop_bits;
UartFlowCtrl flow_ctrl;
uint8_t buff_uart_no; //indicate which uart use tx/rx buffer
uint8_t tx_uart_no;
RcvMsgBuff rcv_buff;
// TrxMsgBuff trx_buff;
RcvMsgState rcv_state;
int received;
} UartDevice;
/**
* @brief Init uart device struct value and reset uart0/uart1 rx.
* Please do not call this function in SDK.
*
* @param None
*
* @return None
*/
void uartAttach(void);
/**
* @brief Init uart0 or uart1 for UART download booting mode.
* Please do not call this function in SDK.
*
* @param uint8_t uart_no : 0 for UART0, else for UART1.
*
* @param uint32_t clock : clock used by uart module, to adjust baudrate.
*
* @return None
*/
void Uart_Init(uint8_t uart_no, uint32_t clock);
/**
* @brief Modify uart baudrate.
* This function will reset RX/TX fifo for uart.
*
* @param uint8_t uart_no : 0 for UART0, 1 for UART1.
*
* @param uint32_t DivLatchValue : (clock << 4)/baudrate.
*
* @return None
*/
void uart_div_modify(uint8_t uart_no, uint32_t DivLatchValue);
/**
* @brief Init uart0 or uart1 for UART download booting mode.
* Please do not call this function in SDK.
*
* @param uint8_t uart_no : 0 for UART0, 1 for UART1.
*
* @param uint8_t is_sync : 0, only one UART module, easy to detect, wait until detected;
* 1, two UART modules, hard to detect, detect and return.
*
* @return None
*/
int uart_baudrate_detect(uint8_t uart_no, uint8_t is_sync);
/**
* @brief Switch printf channel of uart_tx_one_char.
* Please do not call this function when printf.
*
* @param uint8_t uart_no : 0 for UART0, 1 for UART1.
*
* @return None
*/
void uart_tx_switch(uint8_t uart_no);
/**
* @brief Switch message exchange channel for UART download booting.
* Please do not call this function in SDK.
*
* @param uint8_t uart_no : 0 for UART0, 1 for UART1.
*
* @return None
*/
void uart_buff_switch(uint8_t uart_no);
/**
* @brief Output a char to printf channel, wait until fifo not full.
*
* @param None
*
* @return OK.
*/
STATUS uart_tx_one_char(uint8_t TxChar);
/**
* @brief Output a char to message exchange channel, wait until fifo not full.
* Please do not call this function in SDK.
*
* @param None
*
* @return OK.
*/
STATUS uart_tx_one_char2(uint8_t TxChar);
/**
* @brief Wait until uart tx full empty.
*
* @param uint8_t uart_no : 0 for UART0, 1 for UART1.
*
* @return None.
*/
void uart_tx_flush(uint8_t uart_no);
/**
* @brief Wait until uart tx full empty and the last char send ok.
*
* @param uart_no : 0 for UART0, 1 for UART1, 2 for UART2
*
* The function defined in ROM code has a bug, so we define the correct version
* here for compatibility.
*/
static inline void IRAM_ATTR uart_tx_wait_idle(uint8_t uart_no) {
uint32_t status;
do {
status = READ_PERI_REG(UART_STATUS_REG(uart_no));
/* either tx count or state is non-zero */
} while ((status & (UART_ST_UTX_OUT_M | UART_TXFIFO_CNT_M)) != 0);
}
/**
* @brief Get an input char from message channel.
* Please do not call this function in SDK.
*
* @param uint8_t *pRxChar : the pointer to store the char.
*
* @return OK for successful.
* FAIL for failed.
*/
STATUS uart_rx_one_char(uint8_t *pRxChar);
/**
* @brief Get an input char from message channel, wait until successful.
* Please do not call this function in SDK.
*
* @param None
*
* @return char : input char value.
*/
char uart_rx_one_char_block(void);
/**
* @brief Get an input string line from message channel.
* Please do not call this function in SDK.
*
* @param uint8_t *pString : the pointer to store the string.
*
* @param uint8_t MaxStrlen : the max string length, include '\0'.
*
* @return OK.
*/
STATUS UartRxString(uint8_t *pString, uint8_t MaxStrlen);
/**
* @brief Process uart received information in the interrupt handler.
* Please do not call this function in SDK.
*
* @param void *para : the message receive buffer.
*
* @return None
*/
void uart_rx_intr_handler(void *para);
/**
* @brief Get an char from receive buffer.
* Please do not call this function in SDK.
*
* @param RcvMsgBuff *pRxBuff : the pointer to the struct that include receive buffer.
*
* @param uint8_t *pRxByte : the pointer to store the char.
*
* @return OK for successful.
* FAIL for failed.
*/
STATUS uart_rx_readbuff( RcvMsgBuff *pRxBuff, uint8_t *pRxByte);
/**
* @brief Get all chars from receive buffer.
* Please do not call this function in SDK.
*
* @param uint8_t *pCmdLn : the pointer to store the string.
*
* @return OK for successful.
* FAIL for failed.
*/
STATUS UartGetCmdLn(uint8_t *pCmdLn);
/**
* @brief Get uart configuration struct.
* Please do not call this function in SDK.
*
* @param None
*
* @return UartDevice * : uart configuration struct pointer.
*/
UartDevice *GetUartDevice(void);
/**
* @brief Send an packet to download tool, with SLIP escaping.
* Please do not call this function in SDK.
*
* @param uint8_t *p : the pointer to output string.
*
* @param int len : the string length.
*
* @return None.
*/
void send_packet(uint8_t *p, int len);
/**
* @brief Receive an packet from download tool, with SLIP escaping.
* Please do not call this function in SDK.
*
* @param uint8_t *p : the pointer to input string.
*
* @param int len : If string length > len, the string will be truncated.
*
* @param uint8_t is_sync : 0, only one UART module;
* 1, two UART modules.
*
* @return int : the length of the string.
*/
int recv_packet(uint8_t *p, int len, uint8_t is_sync);
/**
* @brief Send an packet to download tool, with SLIP escaping.
* Please do not call this function in SDK.
*
* @param uint8_t *pData : the pointer to input string.
*
* @param uint16_t DataLen : the string length.
*
* @return OK for successful.
* FAIL for failed.
*/
STATUS SendMsg(uint8_t *pData, uint16_t DataLen);
/**
* @brief Receive an packet from download tool, with SLIP escaping.
* Please do not call this function in SDK.
*
* @param uint8_t *pData : the pointer to input string.
*
* @param uint16_t MaxDataLen : If string length > MaxDataLen, the string will be truncated.
*
* @param uint8_t is_sync : 0, only one UART module;
* 1, two UART modules.
*
* @return OK for successful.
* FAIL for failed.
*/
STATUS RcvMsg(uint8_t *pData, uint16_t MaxDataLen, uint8_t is_sync);
extern UartDevice UartDev;
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* _ROM_UART_H_ */

58
tools/sdk/esp32/include/esp_rom/include/esp32c3/rom/aes.h Normal file
View File

@ -0,0 +1,58 @@
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#ifndef _ROM_AES_H_
#define _ROM_AES_H_
#include <stdint.h>
#include <stdbool.h>
#ifdef __cplusplus
extern "C" {
#endif
#define AES_BLOCK_SIZE 16
enum AES_TYPE {
AES_ENC,
AES_DEC,
};
enum AES_BITS {
AES128,
AES192,
AES256
};
void ets_aes_enable(void);
void ets_aes_disable(void);
void ets_aes_set_endian(bool key_word_swap, bool key_byte_swap,
bool in_word_swap, bool in_byte_swap,
bool out_word_swap, bool out_byte_swap);
int ets_aes_setkey(enum AES_TYPE type, const void *key, enum AES_BITS bits);
int ets_aes_setkey_enc(const void *key, enum AES_BITS bits);
int ets_aes_setkey_dec(const void *key, enum AES_BITS bits);
void ets_aes_block(const void *input, void *output);
#ifdef __cplusplus
}
#endif
#endif /* _ROM_AES_H_ */

25
tools/sdk/esp32/include/esp_rom/include/esp32c3/rom/apb_backup_dma.h Normal file
View File

@ -0,0 +1,25 @@
// Copyright 2010-2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#pragma once
#ifdef __cplusplus
extern "C" {
#endif
void ets_apb_backup_init_lock_func(void(* _apb_backup_lock)(void), void(* _apb_backup_unlock)(void));
#ifdef __cplusplus
}
#endif

43
tools/sdk/esp32/include/esp_rom/include/esp32c3/rom/bigint.h Normal file
View File

@ -0,0 +1,43 @@
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#ifndef _ROM_BIGINT_H_
#define _ROM_BIGINT_H_
#include <stdint.h>
#include <stdbool.h>
#ifdef __cplusplus
extern "C" {
#endif
void ets_bigint_enable(void);
void ets_bigint_disable(void);
int ets_bigint_multiply(const uint32_t *x, const uint32_t *y, uint32_t len_words);
int ets_bigint_modmult(const uint32_t *x, const uint32_t *y, const uint32_t *m, uint32_t m_dash, const uint32_t *rb, uint32_t len_words);
int ets_bigint_modexp(const uint32_t *x, const uint32_t *y, const uint32_t *m, uint32_t m_dash, const uint32_t *rb, bool constant_time, uint32_t len_words);
void ets_bigint_wait_finish(void);
int ets_bigint_getz(uint32_t *z, uint32_t len_words);
#ifdef __cplusplus
}
#endif
#endif /* _ROM_BIGINT_H_ */

796
tools/sdk/esp32/include/esp_rom/include/esp32c3/rom/cache.h Normal file
View File

@ -0,0 +1,796 @@
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#ifndef _ROM_CACHE_H_
#define _ROM_CACHE_H_
#include <stdint.h>
#include "esp_bit_defs.h"
#ifdef __cplusplus
extern "C" {
#endif
/** \defgroup cache_apis, cache operation related apis
* @brief cache apis
*/
/** @addtogroup cache_apis
* @{
*/
#define MIN_ICACHE_SIZE 16384
#define MAX_ICACHE_SIZE 16384
#define MIN_ICACHE_WAYS 8
#define MAX_ICACHE_WAYS 8
#define MAX_CACHE_WAYS 8
#define MIN_CACHE_LINE_SIZE 32
#define TAG_SIZE 4
#define MIN_ICACHE_BANK_NUM 1
#define MAX_ICACHE_BANK_NUM 1
#define CACHE_MEMORY_BANK_NUM 1
#define CACHE_MEMORY_IBANK_SIZE 0x4000
#define MAX_ITAG_BANK_ITEMS (MAX_ICACHE_SIZE / MAX_ICACHE_BANK_NUM / MIN_CACHE_LINE_SIZE)
#define MAX_ITAG_BLOCK_ITEMS (MAX_ICACHE_SIZE / MAX_ICACHE_BANK_NUM / MAX_ICACHE_WAYS / MIN_CACHE_LINE_SIZE)
#define MAX_ITAG_BANK_SIZE (MAX_ITAG_BANK_ITEMS * TAG_SIZE)
#define MAX_ITAG_BLOCK_SIZE (MAX_ITAG_BLOCK_ITEMS * TAG_SIZE)
typedef enum {
CACHE_DCACHE = 0,
CACHE_ICACHE0 = 1,
CACHE_ICACHE1 = 2,
} cache_t;
typedef enum {
CACHE_MEMORY_INVALID = 0,
CACHE_MEMORY_IBANK0 = BIT(0),
CACHE_MEMORY_IBANK1 = BIT(1),
CACHE_MEMORY_IBANK2 = BIT(2),
CACHE_MEMORY_IBANK3 = BIT(3),
CACHE_MEMORY_DBANK0 = BIT(0),
CACHE_MEMORY_DBANK1 = BIT(1),
CACHE_MEMORY_DBANK2 = BIT(2),
CACHE_MEMORY_DBANK3 = BIT(3),
} cache_array_t;
#define ICACHE_SIZE_16KB CACHE_SIZE_HALF
#define ICACHE_SIZE_32KB CACHE_SIZE_FULL
#define DCACHE_SIZE_32KB CACHE_SIZE_HALF
#define DCACHE_SIZE_64KB CACHE_SIZE_FULL
typedef enum {
CACHE_SIZE_HALF = 0, /*!< 8KB for icache and dcache */
CACHE_SIZE_FULL = 1, /*!< 16KB for icache and dcache */
} cache_size_t;
typedef enum {
CACHE_4WAYS_ASSOC = 0, /*!< 4 way associated cache */
CACHE_8WAYS_ASSOC = 1, /*!< 8 way associated cache */
} cache_ways_t;
typedef enum {
CACHE_LINE_SIZE_16B = 0, /*!< 16 Byte cache line size */
CACHE_LINE_SIZE_32B = 1, /*!< 32 Byte cache line size */
CACHE_LINE_SIZE_64B = 2, /*!< 64 Byte cache line size */
} cache_line_size_t;
typedef enum {
CACHE_AUTOLOAD_POSITIVE = 0, /*!< cache autoload step is positive */
CACHE_AUTOLOAD_NEGATIVE = 1, /*!< cache autoload step is negative */
} cache_autoload_order_t;
#define CACHE_AUTOLOAD_STEP(i) ((i) - 1)
typedef enum {
CACHE_AUTOLOAD_MISS_TRIGGER = 0, /*!< autoload only triggered by cache miss */
CACHE_AUTOLOAD_HIT_TRIGGER = 1, /*!< autoload only triggered by cache hit */
CACHE_AUTOLOAD_BOTH_TRIGGER = 2, /*!< autoload triggered both by cache miss and hit */
} cache_autoload_trigger_t;
typedef enum {
CACHE_FREEZE_ACK_BUSY = 0, /*!< in this mode, cache ack busy to CPU if a cache miss happens*/
CACHE_FREEZE_ACK_ERROR = 1, /*!< in this mode, cache ack wrong data to CPU and trigger an error if a cache miss happens */
} cache_freeze_mode_t;
struct cache_mode {
uint32_t cache_size; /*!< cache size in byte */
uint16_t cache_line_size; /*!< cache line size in byte */
uint8_t cache_ways; /*!< cache ways, always 4 */
uint8_t ibus; /*!< the cache index, 0 for dcache, 1 for icache */
};
struct icache_tag_item {
uint32_t valid:1; /*!< the tag item is valid or not */
uint32_t lock:1; /*!< the cache line is locked or not */
uint32_t fifo_cnt:3; /*!< fifo cnt, 0 ~ 3 for 4 ways cache */
uint32_t tag:13; /*!< the tag is the high part of the cache address, however is only 16MB (8MB Ibus + 8MB Dbus) range, and without low part */
uint32_t reserved:14;
};
struct autoload_config {
uint8_t order; /*!< autoload step is positive or negative */
uint8_t trigger; /*!< autoload trigger */
uint8_t ena0; /*!< autoload region0 enable */
uint8_t ena1; /*!< autoload region1 enable */
uint32_t addr0; /*!< autoload region0 start address */
uint32_t size0; /*!< autoload region0 size */
uint32_t addr1; /*!< autoload region1 start address */
uint32_t size1; /*!< autoload region1 size */
};
struct tag_group_info {
struct cache_mode mode; /*!< cache and cache mode */
uint32_t filter_addr; /*!< the address that used to generate the struct */
uint32_t vaddr_offset; /*!< virtual address offset of the cache ways */
uint32_t tag_addr[MAX_CACHE_WAYS]; /*!< tag memory address, only [0~mode.ways-1] is valid to use */
uint32_t cache_memory_offset[MAX_CACHE_WAYS]; /*!< cache memory address, only [0~mode.ways-1] is valid to use */
};
struct lock_config {
uint32_t addr; /*!< manual lock address*/
uint16_t size; /*!< manual lock size*/
uint16_t group; /*!< manual lock group, 0 or 1*/
};
struct cache_internal_stub_table {
uint32_t (* icache_line_size)(void);
uint32_t (* icache_addr)(uint32_t addr);
uint32_t (* dcache_addr)(uint32_t addr);
void (* invalidate_icache_items)(uint32_t addr, uint32_t items);
void (* lock_icache_items)(uint32_t addr, uint32_t items);
void (* unlock_icache_items)(uint32_t addr, uint32_t items);
uint32_t (* suspend_icache_autoload)(void);
void (* resume_icache_autoload)(uint32_t autoload);
void (* freeze_icache_enable)(cache_freeze_mode_t mode);
void (* freeze_icache_disable)(void);
int (* op_addr)(uint32_t start_addr, uint32_t size, uint32_t cache_line_size, uint32_t max_sync_num, void(* cache_Iop)(uint32_t, uint32_t));
};
/* Defined in the interface file, default value is rom_default_cache_internal_table */
extern const struct cache_internal_stub_table* rom_cache_internal_table_ptr;
typedef void (* cache_op_start)(void);
typedef void (* cache_op_end)(void);
typedef struct {
cache_op_start start;
cache_op_end end;
} cache_op_cb_t;
/* Defined in the interface file, default value is NULL */
extern const cache_op_cb_t* rom_cache_op_cb;
#define ESP_ROM_ERR_INVALID_ARG 1
#define MMU_SET_ADDR_ALIGNED_ERROR 2
#define MMU_SET_PASE_SIZE_ERROR 3
#define MMU_SET_VADDR_OUT_RANGE 4
#define CACHE_OP_ICACHE_Y 1
#define CACHE_OP_ICACHE_N 0
/**
* @brief Initialise cache mmu, mark all entries as invalid.
* Please do not call this function in your SDK application.
*
* @param None
*
* @return None
*/
void Cache_MMU_Init(void);
/**
* @brief Set ICache mmu mapping.
* Please do not call this function in your SDK application.
*
* @param uint32_t ext_ram : DPORT_MMU_ACCESS_FLASH for flash, DPORT_MMU_INVALID for invalid. In
* esp32c3, external memory is always flash
*
* @param uint32_t vaddr : virtual address in CPU address space.
* Can be Iram0,Iram1,Irom0,Drom0 and AHB buses address.
* Should be aligned by psize.
*
* @param uint32_t paddr : physical address in external memory.
* Should be aligned by psize.
*
* @param uint32_t psize : page size of ICache, in kilobytes. Should be 64 here.
*
* @param uint32_t num : pages to be set.
*
* @param uint32_t fixed : 0 for physical pages grow with virtual pages, other for virtual pages map to same physical page.
*
* @return uint32_t: error status
* 0 : mmu set success
* 2 : vaddr or paddr is not aligned
* 3 : psize error
* 4 : vaddr is out of range
*/
int Cache_Ibus_MMU_Set(uint32_t ext_ram, uint32_t vaddr, uint32_t paddr, uint32_t psize, uint32_t num, uint32_t fixed);
/**
* @brief Set DCache mmu mapping.
* Please do not call this function in your SDK application.
*
* @param uint32_t ext_ram : DPORT_MMU_ACCESS_FLASH for flash, DPORT_MMU_INVALID for invalid. In
* esp32c3, external memory is always flash
*
* @param uint32_t vaddr : virtual address in CPU address space.
* Can be DRam0, DRam1, DRom0, DPort and AHB buses address.
* Should be aligned by psize.
*
* @param uint32_t paddr : physical address in external memory.
* Should be aligned by psize.
*
* @param uint32_t psize : page size of DCache, in kilobytes. Should be 64 here.
*
* @param uint32_t num : pages to be set.
* @param uint32_t fixed : 0 for physical pages grow with virtual pages, other for virtual pages map to same physical page.
*
* @return uint32_t: error status
* 0 : mmu set success
* 2 : vaddr or paddr is not aligned
* 3 : psize error
* 4 : vaddr is out of range
*/
int Cache_Dbus_MMU_Set(uint32_t ext_ram, uint32_t vaddr, uint32_t paddr, uint32_t psize, uint32_t num, uint32_t fixed);
/**
* @brief Count the pages in the bus room address which map to Flash.
* Please do not call this function in your SDK application.
*
* @param uint32_t bus : the bus to count with.
*
* @param uint32_t * page0_mapped : value should be initial by user, 0 for not mapped, other for mapped count.
*
* return uint32_t : the number of pages which map to Flash.
*/
uint32_t Cache_Count_Flash_Pages(uint32_t bus, uint32_t * page0_mapped);
/**
* @brief allocate memory to used by ICache.
* Please do not call this function in your SDK application.
*
* @param cache_array_t icache_low : the data array bank used by icache low part. Due to timing constraint, can only be CACHE_MEMORY_INVALID, CACHE_MEMORY_IBANK0
*
* return none
*/
void Cache_Occupy_ICache_MEMORY(cache_array_t icache_low);
/**
* @brief Get cache mode of ICache or DCache.
* Please do not call this function in your SDK application.
*
* @param struct cache_mode * mode : the pointer of cache mode struct, caller should set the icache field
*
* return none
*/
void Cache_Get_Mode(struct cache_mode * mode);
/**
* @brief set ICache modes: cache size, associate ways and cache line size.
* Please do not call this function in your SDK application.
*
* @param cache_size_t cache_size : the cache size, can be CACHE_SIZE_HALF and CACHE_SIZE_FULL
*
* @param cache_ways_t ways : the associate ways of cache, can be CACHE_4WAYS_ASSOC and CACHE_8WAYS_ASSOC
*
* @param cache_line_size_t cache_line_size : the cache line size, can be CACHE_LINE_SIZE_16B, CACHE_LINE_SIZE_32B and CACHE_LINE_SIZE_64B
*
* return none
*/
void Cache_Set_ICache_Mode(cache_size_t cache_size, cache_ways_t ways, cache_line_size_t cache_line_size);
/**
* @brief set DCache modes: cache size, associate ways and cache line size.
* Please do not call this function in your SDK application.
*
* @param cache_size_t cache_size : the cache size, can be CACHE_SIZE_8KB and CACHE_SIZE_16KB
*
* @param cache_ways_t ways : the associate ways of cache, can be CACHE_4WAYS_ASSOC and CACHE_8WAYS_ASSOC
*
* @param cache_line_size_t cache_line_size : the cache line size, can be CACHE_LINE_SIZE_16B, CACHE_LINE_SIZE_32B and CACHE_LINE_SIZE_64B
*
* return none
*/
void Cache_Set_DCache_Mode(cache_size_t cache_size, cache_ways_t ways, cache_line_size_t cache_line_size);
/**
* @brief check if the address is accessed through ICache.
* Please do not call this function in your SDK application.
*
* @param uint32_t addr : the address to check.
*
* @return 1 if the address is accessed through ICache, 0 if not.
*/
uint32_t Cache_Address_Through_ICache(uint32_t addr);
/**
* @brief check if the address is accessed through DCache.
* Please do not call this function in your SDK application.
*
* @param uint32_t addr : the address to check.
*
* @return 1 if the address is accessed through DCache, 0 if not.
*/
uint32_t Cache_Address_Through_DCache(uint32_t addr);
/**
* @brief Init mmu owner register to make i/d cache use half mmu entries.
*
* @param None
*
* @return None
*/
void Cache_Owner_Init(void);
/**
* @brief Invalidate the cache items for ICache.
* Operation will be done CACHE_LINE_SIZE aligned.
* If the region is not in ICache addr room, nothing will be done.
* Please do not call this function in your SDK application.
*
* @param uint32_t addr: start address to invalidate
*
* @param uint32_t items: cache lines to invalidate, items * cache_line_size should not exceed the bus address size(16MB/32MB/64MB)
*
* @return None
*/
void Cache_Invalidate_ICache_Items(uint32_t addr, uint32_t items);
/**
* @brief Invalidate the Cache items in the region from ICache or DCache.
* If the region is not in Cache addr room, nothing will be done.
* Please do not call this function in your SDK application.
*
* @param uint32_t addr : invalidated region start address.
*
* @param uint32_t size : invalidated region size.
*
* @return 0 for success
* 1 for invalid argument
*/
int Cache_Invalidate_Addr(uint32_t addr, uint32_t size);
/**
* @brief Invalidate all cache items in ICache.
* Please do not call this function in your SDK application.
*
* @param None
*
* @return None
*/
void Cache_Invalidate_ICache_All(void);
/**
* @brief Mask all buses through ICache and DCache.
* Please do not call this function in your SDK application.
*
* @param None
*
* @return None
*/
void Cache_Mask_All(void);
/**
* @brief Suspend ICache auto preload operation, then you can resume it after some ICache operations.
* Please do not call this function in your SDK application.
*
* @param None
*
* @return uint32_t : 0 for ICache not auto preload before suspend.
*/
uint32_t Cache_Suspend_ICache_Autoload(void);
/**
* @brief Resume ICache auto preload operation after some ICache operations.
* Please do not call this function in your SDK application.
*
* @param uint32_t autoload : 0 for ICache not auto preload before suspend.
*
* @return None.
*/
void Cache_Resume_ICache_Autoload(uint32_t autoload);
/**
* @brief Start an ICache manual preload, will suspend auto preload of ICache.
* Please do not call this function in your SDK application.
*
* @param uint32_t addr : start address of the preload region.
*
* @param uint32_t size : size of the preload region, should not exceed the size of ICache.
*
* @param uint32_t order : the preload order, 0 for positive, other for negative
*
* @return uint32_t : 0 for ICache not auto preload before manual preload.
*/
uint32_t Cache_Start_ICache_Preload(uint32_t addr, uint32_t size, uint32_t order);
/**
* @brief Return if the ICache manual preload done.
* Please do not call this function in your SDK application.
*
* @param None
*
* @return uint32_t : 0 for ICache manual preload not done.
*/
uint32_t Cache_ICache_Preload_Done(void);
/**
* @brief End the ICache manual preload to resume auto preload of ICache.
* Please do not call this function in your SDK application.
*
* @param uint32_t autoload : 0 for ICache not auto preload before manual preload.
*
* @return None
*/
void Cache_End_ICache_Preload(uint32_t autoload);
/**
* @brief Config autoload parameters of ICache.
* Please do not call this function in your SDK application.
*
* @param struct autoload_config * config : autoload parameters.
*
* @return None
*/
void Cache_Config_ICache_Autoload(const struct autoload_config * config);
/**
* @brief Enable auto preload for ICache.
* Please do not call this function in your SDK application.
*
* @param None
*
* @return None
*/
void Cache_Enable_ICache_Autoload(void);
/**
* @brief Disable auto preload for ICache.
* Please do not call this function in your SDK application.
*
* @param None
*
* @return None
*/
void Cache_Disable_ICache_Autoload(void);
/**
* @brief Config a group of prelock parameters of ICache.
* Please do not call this function in your SDK application.
*
* @param struct lock_config * config : a group of lock parameters.
*
* @return None
*/
void Cache_Enable_ICache_PreLock(const struct lock_config *config);
/**
* @brief Disable a group of prelock parameters for ICache.
* However, the locked data will not be released.
* Please do not call this function in your SDK application.
*
* @param uint16_t group : 0 for group0, 1 for group1.
*
* @return None
*/
void Cache_Disable_ICache_PreLock(uint16_t group);
/**
* @brief Lock the cache items for ICache.
* Operation will be done CACHE_LINE_SIZE aligned.
* If the region is not in ICache addr room, nothing will be done.
* Please do not call this function in your SDK application.
*
* @param uint32_t addr: start address to lock
*
* @param uint32_t items: cache lines to lock, items * cache_line_size should not exceed the bus address size(16MB/32MB/64MB)
*
* @return None
*/
void Cache_Lock_ICache_Items(uint32_t addr, uint32_t items);
/**
* @brief Unlock the cache items for ICache.
* Operation will be done CACHE_LINE_SIZE aligned.
* If the region is not in ICache addr room, nothing will be done.
* Please do not call this function in your SDK application.
*
* @param uint32_t addr: start address to unlock
*
* @param uint32_t items: cache lines to unlock, items * cache_line_size should not exceed the bus address size(16MB/32MB/64MB)
*
* @return None
*/
void Cache_Unlock_ICache_Items(uint32_t addr, uint32_t items);
/**
* @brief Lock the cache items in tag memory for ICache or DCache.
* Please do not call this function in your SDK application.
*
* @param uint32_t addr : start address of lock region.
*
* @param uint32_t size : size of lock region.
*
* @return 0 for success
* 1 for invalid argument
*/
int Cache_Lock_Addr(uint32_t addr, uint32_t size);
/**
* @brief Unlock the cache items in tag memory for ICache or DCache.
* Please do not call this function in your SDK application.
*
* @param uint32_t addr : start address of unlock region.
*
* @param uint32_t size : size of unlock region.
*
* @return 0 for success
* 1 for invalid argument
*/
int Cache_Unlock_Addr(uint32_t addr, uint32_t size);
/**
* @brief Disable ICache access for the cpu.
* This operation will make all ICache tag memory invalid, CPU can't access ICache, ICache will keep idle.
* Please do not call this function in your SDK application.
*
* @return uint32_t : auto preload enabled before
*/
uint32_t Cache_Disable_ICache(void);
/**
* @brief Enable ICache access for the cpu.
* Please do not call this function in your SDK application.
*
* @param uint32_t autoload : ICache will preload then.
*
* @return None
*/
void Cache_Enable_ICache(uint32_t autoload);
/**
* @brief Suspend ICache access for the cpu.
* The ICache tag memory is still there, CPU can't access ICache, ICache will keep idle.
* Please do not change MMU, cache mode or tag memory(tag memory can be changed in some special case).
* Please do not call this function in your SDK application.
*
* @param None
*
* @return uint32_t : auto preload enabled before
*/
uint32_t Cache_Suspend_ICache(void);
/**
* @brief Resume ICache access for the cpu.
* Please do not call this function in your SDK application.
*
* @param uint32_t autoload : ICache will preload then.
*
* @return None
*/
void Cache_Resume_ICache(uint32_t autoload);
/**
* @brief Get ICache cache line size
*
* @param None
*
* @return uint32_t: 16, 32, 64 Byte
*/
uint32_t Cache_Get_ICache_Line_Size(void);
/**
* @brief Set default mode from boot, 8KB ICache, 16Byte cache line size.
*
* @param None
*
* @return None
*/
void Cache_Set_Default_Mode(void);
/**
* @brief Set default mode from boot, 8KB ICache, 16Byte cache line size.
*
* @param None
*
* @return None
*/
void Cache_Enable_Defalut_ICache_Mode(void);
/**
* @brief Enable freeze for ICache.
* Any miss request will be rejected, including cpu miss and preload/autoload miss.
* Please do not call this function in your SDK application.
*
* @param cache_freeze_mode_t mode : 0 for assert busy 1 for assert hit
*
* @return None
*/
void Cache_Freeze_ICache_Enable(cache_freeze_mode_t mode);
/**
* @brief Disable freeze for ICache.
* Please do not call this function in your SDK application.
*
* @return None
*/
void Cache_Freeze_ICache_Disable(void);
/**
* @brief Travel tag memory to run a call back function.
* ICache and DCache are suspend when doing this.
* The callback will get the parameter tag_group_info, which will include a group of tag memory addresses and cache memory addresses.
* Please do not call this function in your SDK application.
*
* @param struct cache_mode * mode : the cache to check and the cache mode.
*
* @param uint32_t filter_addr : only the cache lines which may include the filter_address will be returned to the call back function.
* 0 for do not filter, all cache lines will be returned.
*
* @param void (* process)(struct tag_group_info *) : call back function, which may be called many times, a group(the addresses in the group are in the same position in the cache ways) a time.
*
* @return None
*/
void Cache_Travel_Tag_Memory(struct cache_mode * mode, uint32_t filter_addr, void (* process)(struct tag_group_info *));
/**
* @brief Get the virtual address from cache mode, cache tag and the virtual address offset of cache ways.
* Please do not call this function in your SDK application.
*
* @param struct cache_mode * mode : the cache to calculate the virtual address and the cache mode.
*
* @param uint32_t tag : the tag part fo a tag item, 12-14 bits.
*
* @param uint32_t addr_offset : the virtual address offset of the cache ways.
*
* @return uint32_t : the virtual address.
*/
uint32_t Cache_Get_Virtual_Addr(struct cache_mode *mode, uint32_t tag, uint32_t vaddr_offset);
/**
* @brief Get cache memory block base address.
* Please do not call this function in your SDK application.
*
* @param uint32_t icache : 0 for dcache, other for icache.
*
* @param uint32_t bank_no : 0 ~ 3 bank.
*
* @return uint32_t : the cache memory block base address, 0 if the block not used.
*/
uint32_t Cache_Get_Memory_BaseAddr(uint32_t icache, uint32_t bank_no);
/**
* @brief Get the cache memory address from cache mode, cache memory offset and the virtual address offset of cache ways.
* Please do not call this function in your SDK application.
*
* @param struct cache_mode * mode : the cache to calculate the virtual address and the cache mode.
*
* @param uint32_t cache_memory_offset : the cache memory offset of the whole cache (ICache or DCache) for the cache line.
*
* @param uint32_t addr_offset : the virtual address offset of the cache ways.
*
* @return uint32_t : the virtual address.
*/
uint32_t Cache_Get_Memory_Addr(struct cache_mode *mode, uint32_t cache_memory_offset, uint32_t vaddr_offset);
/**
* @brief Get the cache memory value by DRAM address.
* Please do not call this function in your SDK application.
*
* @param uint32_t cache_memory_addr : DRAM address for the cache memory, should be 4 byte aligned for IBus address.
*
* @return uint32_t : the word value of the address.
*/
uint32_t Cache_Get_Memory_value(uint32_t cache_memory_addr);
/**
* @}
*/
/**
* @brief Get the cache MMU IROM end address.
* Please do not call this function in your SDK application.
*
* @param void
*
* @return uint32_t : the word value of the address.
*/
uint32_t Cache_Get_IROM_MMU_End(void);
/**
* @brief Get the cache MMU DROM end address.
* Please do not call this function in your SDK application.
*
* @param void
*
* @return uint32_t : the word value of the address.
*/
uint32_t Cache_Get_DROM_MMU_End(void);
/**
* @brief Lock the permission control section configuration. After lock, any
* configuration modification will be bypass. Digital reset will clear the lock!
* Please do not call this function in your SDK application.
*
* @param int ibus : 1 for lock ibus pms, 0 for lock dbus pms
*
* @return None
*/
void Cache_Pms_Lock(int ibus);
/**
* @brief Set three ibus pms boundary address, which will determine pms reject section and section 1/2.
* Please do not call this function in your SDK application.
*
* @param uint32_t ibus_boundary0_addr : vaddress for split line0
*
* @param uint32_t ibus_boundary1_addr : vaddress for split line1
*
* @param uint32_t ibus_boundary2_addr : vaddress for split line2
*
* @return int : ESP_ROM_ERR_INVALID_ARG for invalid address, 0 for success
*/
int Cache_Ibus_Pms_Set_Addr(uint32_t ibus_boundary0_addr, uint32_t ibus_boundary1_addr, uint32_t ibus_boundary2_addr);
/**
* @brief Set three ibus pms attribute, which will determine pms in different section and world.
* Please do not call this function in your SDK application.
*
* @param uint32_t ibus_pms_sct2_attr : attr for section2
*
* @param uint32_t ibus_pms_sct1_attr : attr for section1
*
* @return None
*/
void Cache_Ibus_Pms_Set_Attr(uint32_t ibus_pms_sct2_attr, uint32_t ibus_pms_sct1_attr);
/**
* @brief Set three dbus pms boundary address, which will determine pms reject section and section 1/2.
* Please do not call this function in your SDK application.
*
* @param uint32_t dbus_boundary0_addr : vaddress for split line0
*
* @param uint32_t dbus_boundary1_addr : vaddress for split line1
*
* @param uint32_t dbus_boundary2_addr : vaddress for split line2
*
* @return int : ESP_ROM_ERR_INVALID_ARG for invalid address, 0 for success
*/
int Cache_Dbus_Pms_Set_Addr(uint32_t dbus_boundary0_addr, uint32_t dbus_boundary1_addr, uint32_t dbus_boundary2_addr);
/**
* @brief Set three dbus pms attribute, which will determine pms in different section and world.
* Please do not call this function in your SDK application.
*
* @param uint32_t dbus_pms_sct2_attr : attr for section2
*
* @param uint32_t dbus_pms_sct1_attr : attr for section1
*
* @return None
*/
void Cache_Dbus_Pms_Set_Attr(uint32_t dbus_pms_sct2_attr, uint32_t dbus_pms_sct1_attr);
/**
* @brief Used by SPI flash mmap
*
*/
uint32_t flash_instr_rodata_start_page(uint32_t bus);
uint32_t flash_instr_rodata_end_page(uint32_t bus);
#ifdef __cplusplus
}
#endif
#endif /* _ROM_CACHE_H_ */

127
tools/sdk/esp32/include/esp_rom/include/esp32c3/rom/crc.h Normal file
View File

@ -0,0 +1,127 @@
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#ifndef ROM_CRC_H
#define ROM_CRC_H
#include <stdint.h>
#ifdef __cplusplus
extern "C" {
#endif
/** \defgroup crc_apis, uart configuration and communication related apis
* @brief crc apis
*/
/** @addtogroup crc_apis
* @{
*/
/* Standard CRC8/16/32 algorithms. */
// CRC-8 x8+x2+x1+1 0x07
// CRC16-CCITT x16+x12+x5+1 1021 ISO HDLC, ITU X.25, V.34/V.41/V.42, PPP-FCS
// CRC32:
//G(x) = x32 +x26 + x23 + x22 + x16 + x12 + x11 + x10 + x8 + x7 + x5 + x4 + x2 + x1 + 1
//If your buf is not continuous, you can use the first result to be the second parameter.
/**
* @brief Crc32 value that is in little endian.
*
* @param uint32_t crc : init crc value, use 0 at the first use.
*
* @param uint8_t const *buf : buffer to start calculate crc.
*
* @param uint32_t len : buffer length in byte.
*
* @return None
*/
uint32_t crc32_le(uint32_t crc, uint8_t const *buf, uint32_t len);
/**
* @brief Crc32 value that is in big endian.
*
* @param uint32_t crc : init crc value, use 0 at the first use.
*
* @param uint8_t const *buf : buffer to start calculate crc.
*
* @param uint32_t len : buffer length in byte.
*
* @return None
*/
uint32_t crc32_be(uint32_t crc, uint8_t const *buf, uint32_t len);
/**
* @brief Crc16 value that is in little endian.
*
* @param uint16_t crc : init crc value, use 0 at the first use.
*
* @param uint8_t const *buf : buffer to start calculate crc.
*
* @param uint32_t len : buffer length in byte.
*
* @return None
*/
uint16_t crc16_le(uint16_t crc, uint8_t const *buf, uint32_t len);
/**
* @brief Crc16 value that is in big endian.
*
* @param uint16_t crc : init crc value, use 0 at the first use.
*
* @param uint8_t const *buf : buffer to start calculate crc.
*
* @param uint32_t len : buffer length in byte.
*
* @return None
*/
uint16_t crc16_be(uint16_t crc, uint8_t const *buf, uint32_t len);
/**
* @brief Crc8 value that is in little endian.
*
* @param uint8_t crc : init crc value, use 0 at the first use.
*
* @param uint8_t const *buf : buffer to start calculate crc.
*
* @param uint32_t len : buffer length in byte.
*
* @return None
*/
uint8_t crc8_le(uint8_t crc, uint8_t const *buf, uint32_t len);
/**
* @brief Crc8 value that is in big endian.
*
* @param uint32_t crc : init crc value, use 0 at the first use.
*
* @param uint8_t const *buf : buffer to start calculate crc.
*
* @param uint32_t len : buffer length in byte.
*
* @return None
*/
uint8_t crc8_be(uint8_t crc, uint8_t const *buf, uint32_t len);
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif

150
tools/sdk/esp32/include/esp_rom/include/esp32c3/rom/digital_signature.h Normal file
View File

@ -0,0 +1,150 @@
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#pragma once
#ifdef __cplusplus
extern "C" {
#endif
#include <stdint.h>
#include <stdbool.h>
#define ETS_DS_MAX_BITS 3072
#define ETS_DS_IV_LEN 16
/* Length of parameter 'C' stored in flash (not including IV)
Comprises encrypted Y, M, rinv, md (32), mprime (4), length (4), padding (8)
Note that if ETS_DS_MAX_BITS<4096, 'C' needs to be split up when writing to hardware
*/
#define ETS_DS_C_LEN ((ETS_DS_MAX_BITS * 3 / 8) + 32 + 8 + 8)
/* Encrypted ETS data. Recommended to store in flash in this format.
*/
typedef struct {
/* RSA LENGTH register parameters
* (number of words in RSA key & operands, minus one).
*
*
* This value must match the length field encrypted and stored in 'c',
* or invalid results will be returned. (The DS peripheral will
* always use the value in 'c', not this value, so an attacker can't
* alter the DS peripheral results this way, it will just truncate or
* extend the message and the resulting signature in software.)
*/
unsigned rsa_length;
/* IV value used to encrypt 'c' */
uint8_t iv[ETS_DS_IV_LEN];
/* Encrypted Digital Signature parameters. Result of AES-CBC encryption
of plaintext values. Includes an encrypted message digest.
*/
uint8_t c[ETS_DS_C_LEN];
} ets_ds_data_t;
typedef enum {
ETS_DS_OK,
ETS_DS_INVALID_PARAM, /* Supplied parameters are invalid */
ETS_DS_INVALID_KEY, /* HMAC peripheral failed to supply key */
ETS_DS_INVALID_PADDING, /* 'c' decrypted with invalid padding */
ETS_DS_INVALID_DIGEST, /* 'c' decrypted with invalid digest */
} ets_ds_result_t;
void ets_ds_enable(void);
void ets_ds_disable(void);
/*
* @brief Start signing a message (or padded message digest) using the Digital Signature peripheral
*
* - @param message Pointer to message (or padded digest) containing the message to sign. Should be
* (data->rsa_length + 1)*4 bytes long. @param data Pointer to DS data. Can be a pointer to data
* in flash.
*
* Caller must have already called ets_ds_enable() and ets_hmac_calculate_downstream() before calling
* this function, and is responsible for calling ets_ds_finish_sign() and then
* ets_hmac_invalidate_downstream() afterwards.
*
* @return ETS_DS_OK if signature is in progress, ETS_DS_INVALID_PARAM if param is invalid,
* EST_DS_INVALID_KEY if key or HMAC peripheral is configured incorrectly.
*/
ets_ds_result_t ets_ds_start_sign(const void *message, const ets_ds_data_t *data);
/*
* @brief Returns true if the DS peripheral is busy following a call to ets_ds_start_sign()
*
* A result of false indicates that a call to ets_ds_finish_sign() will not block.
*
* Only valid if ets_ds_enable() has been called.
*/
bool ets_ds_is_busy(void);
/* @brief Finish signing a message using the Digital Signature peripheral
*
* Must be called after ets_ds_start_sign(). Can use ets_ds_busy() to wait until
* peripheral is no longer busy.
*
* - @param signature Pointer to buffer to contain the signature. Should be
* (data->rsa_length + 1)*4 bytes long.
* - @param data Should match the 'data' parameter passed to ets_ds_start_sign()
*
* @param ETS_DS_OK if signing succeeded, ETS_DS_INVALID_PARAM if param is invalid,
* ETS_DS_INVALID_DIGEST or ETS_DS_INVALID_PADDING if there is a problem with the
* encrypted data digest or padding bytes (in case of ETS_DS_INVALID_PADDING, a
* digest is produced anyhow.)
*/
ets_ds_result_t ets_ds_finish_sign(void *signature, const ets_ds_data_t *data);
/* Plaintext parameters used by Digital Signature.
Not used for signing with DS peripheral, but can be encrypted
in-device by calling ets_ds_encrypt_params()
*/
typedef struct {
uint32_t Y[ETS_DS_MAX_BITS / 32];
uint32_t M[ETS_DS_MAX_BITS / 32];
uint32_t Rb[ETS_DS_MAX_BITS / 32];
uint32_t M_prime;
uint32_t length;
} ets_ds_p_data_t;
typedef enum {
ETS_DS_KEY_HMAC, /* The HMAC key (as stored in efuse) */
ETS_DS_KEY_AES, /* The AES key (as derived from HMAC key by HMAC peripheral in downstream mode) */
} ets_ds_key_t;
/* @brief Encrypt DS parameters suitable for storing and later use with DS peripheral
*
* @param data Output buffer to store encrypted data, suitable for later use generating signatures.
* @param iv Pointer to 16 byte IV buffer, will be copied into 'data'. Should be randomly generated bytes each time.
* @param p_data Pointer to input plaintext key data. The expectation is this data will be deleted after this process is done and 'data' is stored.
* @param key Pointer to 32 bytes of key data. Type determined by key_type parameter. The expectation is the corresponding HMAC key will be stored to efuse and then permanently erased.
* @param key_type Type of key stored in 'key' (either the AES-256 DS key, or an HMAC DS key from which the AES DS key is derived using HMAC peripheral)
*
* @return ETS_DS_INVALID_PARAM if any parameter is invalid, or ETS_DS_OK if 'data' is successfully generated from the input parameters.
*/
ets_ds_result_t ets_ds_encrypt_params(ets_ds_data_t *data, const void *iv, const ets_ds_p_data_t *p_data, const void *key, ets_ds_key_t key_type);
#ifdef __cplusplus
}
#endif

384
tools/sdk/esp32/include/esp_rom/include/esp32c3/rom/efuse.h Normal file
View File

@ -0,0 +1,384 @@
/*
* SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef _ROM_EFUSE_H_
#define _ROM_EFUSE_H_
#ifdef __cplusplus
extern "C" {
#endif
#include <stdint.h>
#include <stddef.h>
#include <stdbool.h>
/** \defgroup efuse_APIs efuse APIs
* @brief ESP32 efuse read/write APIs
* @attention
*
*/
/** @addtogroup efuse_APIs
* @{
*/
typedef enum {
ETS_EFUSE_KEY_PURPOSE_USER = 0,
ETS_EFUSE_KEY_PURPOSE_RESERVED = 1,
ETS_EFUSE_KEY_PURPOSE_XTS_AES_128_KEY = 4,
ETS_EFUSE_KEY_PURPOSE_HMAC_DOWN_ALL = 5,
ETS_EFUSE_KEY_PURPOSE_HMAC_DOWN_JTAG = 6,
ETS_EFUSE_KEY_PURPOSE_HMAC_DOWN_DIGITAL_SIGNATURE = 7,
ETS_EFUSE_KEY_PURPOSE_HMAC_UP = 8,
ETS_EFUSE_KEY_PURPOSE_SECURE_BOOT_DIGEST0 = 9,
ETS_EFUSE_KEY_PURPOSE_SECURE_BOOT_DIGEST1 = 10,
ETS_EFUSE_KEY_PURPOSE_SECURE_BOOT_DIGEST2 = 11,
ETS_EFUSE_KEY_PURPOSE_MAX,
} ets_efuse_purpose_t;
typedef enum {
ETS_EFUSE_BLOCK0 = 0,
ETS_EFUSE_MAC_SPI_SYS_0 = 1,
ETS_EFUSE_BLOCK_SYS_DATA = 2,
ETS_EFUSE_BLOCK_USR_DATA = 3,
ETS_EFUSE_BLOCK_KEY0 = 4,
ETS_EFUSE_BLOCK_KEY1 = 5,
ETS_EFUSE_BLOCK_KEY2 = 6,
ETS_EFUSE_BLOCK_KEY3 = 7,
ETS_EFUSE_BLOCK_KEY4 = 8,
ETS_EFUSE_BLOCK_KEY5 = 9,
ETS_EFUSE_BLOCK_KEY6 = 10,
ETS_EFUSE_BLOCK_MAX,
} ets_efuse_block_t;
/**
* @brief set timing accroding the apb clock, so no read error or write error happens.
*
* @param clock: apb clock in HZ, only accept 5M(in FPGA), 10M(in FPGA), 20M, 40M, 80M.
*
* @return : 0 if success, others if clock not accepted
*/
int ets_efuse_set_timing(uint32_t clock);
/**
* @brief Enable efuse subsystem. Called after reset. Doesn't need to be called again.
*/
void ets_efuse_start(void);
/**
* @brief Efuse read operation: copies data from physical efuses to efuse read registers.
*
* @param null
*
* @return : 0 if success, others if apb clock is not accepted
*/
int ets_efuse_read(void);
/**
* @brief Efuse write operation: Copies data from efuse write registers to efuse. Operates on a single block of efuses at a time.
*
* @note This function does not update read efuses, call ets_efuse_read() once all programming is complete.
*
* @return : 0 if success, others if apb clock is not accepted
*/
int ets_efuse_program(ets_efuse_block_t block);
/**
* @brief Set all Efuse program registers to zero.
*
* Call this before writing new data to the program registers.
*/
void ets_efuse_clear_program_registers(void);
/**
* @brief Program a block of key data to an efuse block
*
* @param key_block Block to read purpose for. Must be in range ETS_EFUSE_BLOCK_KEY0 to ETS_EFUSE_BLOCK_KEY6. Key block must be unused (@ref ets_efuse_key_block_unused).
* @param purpose Purpose to set for this key. Purpose must be already unset.
* @param data Pointer to data to write.
* @param data_len Length of data to write.
*
* @note This function also calls ets_efuse_program() for the specified block, and for block 0 (setting the purpose)
*/
int ets_efuse_write_key(ets_efuse_block_t key_block, ets_efuse_purpose_t purpose, const void *data, size_t data_len);
/* @brief Return the address of a particular efuse block's first read register
*
* @param block Index of efuse block to look up
*
* @return 0 if block is invalid, otherwise a numeric read register address
* of the first word in the block.
*/
uint32_t ets_efuse_get_read_register_address(ets_efuse_block_t block);
/**
* @brief Return the current purpose set for an efuse key block
*
* @param key_block Block to read purpose for. Must be in range ETS_EFUSE_BLOCK_KEY0 to ETS_EFUSE_BLOCK_KEY6.
*/
ets_efuse_purpose_t ets_efuse_get_key_purpose(ets_efuse_block_t key_block);
/**
* @brief Find a key block with the particular purpose set
*
* @param purpose Purpose to search for.
* @param[out] key_block Pointer which will be set to the key block if found. Can be NULL, if only need to test the key block exists.
* @return true if found, false if not found. If false, value at key_block pointer is unchanged.
*/
bool ets_efuse_find_purpose(ets_efuse_purpose_t purpose, ets_efuse_block_t *key_block);
/**
* Return true if the key block is unused, false otherwise.
*
* An unused key block is all zero content, not read or write protected,
* and has purpose 0 (ETS_EFUSE_KEY_PURPOSE_USER)
*
* @param key_block key block to check.
*
* @return true if key block is unused, false if key block or used
* or the specified block index is not a key block.
*/
bool ets_efuse_key_block_unused(ets_efuse_block_t key_block);
/**
* @brief Search for an unused key block and return the first one found.
*
* See @ref ets_efuse_key_block_unused for a description of an unused key block.
*
* @return First unused key block, or ETS_EFUSE_BLOCK_MAX if no unused key block is found.
*/
ets_efuse_block_t ets_efuse_find_unused_key_block(void);
/**
* @brief Return the number of unused efuse key blocks (0-6)
*/
unsigned ets_efuse_count_unused_key_blocks(void);
/**
* @brief Calculate Reed-Solomon Encoding values for a block of efuse data.
*
* @param data Pointer to data buffer (length 32 bytes)
* @param rs_values Pointer to write encoded data to (length 12 bytes)
*/
void ets_efuse_rs_calculate(const void *data, void *rs_values);
/**
* @brief Read spi flash pads configuration from Efuse
*
* @return
* - 0 for default SPI pins.
* - 1 for default HSPI pins.
* - Other values define a custom pin configuration mask. Pins are encoded as per the EFUSE_SPICONFIG_RET_SPICLK,
* EFUSE_SPICONFIG_RET_SPIQ, EFUSE_SPICONFIG_RET_SPID, EFUSE_SPICONFIG_RET_SPICS0, EFUSE_SPICONFIG_RET_SPIHD macros.
* WP pin (for quad I/O modes) is not saved in efuse and not returned by this function.
*/
uint32_t ets_efuse_get_spiconfig(void);
/**
* @brief Read spi flash wp pad from Efuse
*
* @return
* - 0x3f for invalid.
* - 0~46 is valid.
*/
uint32_t ets_efuse_get_wp_pad(void);
/**
* @brief Read opi flash pads configuration from Efuse
*
* @return
* - 0 for default SPI pins.
* - Other values define a custom pin configuration mask. From the LSB, every 6 bits represent a GPIO number which stand for:
* DQS, D4, D5, D6, D7 accordingly.
*/
uint32_t ets_efuse_get_opiconfig(void);
/**
* @brief Read if download mode disabled from Efuse
*
* @return
* - true for efuse disable download mode.
* - false for efuse doesn't disable download mode.
*/
bool ets_efuse_download_modes_disabled(void);
/**
* @brief Read if legacy spi flash boot mode disabled from Efuse
*
* @return
* - true for efuse disable legacy spi flash boot mode.
* - false for efuse doesn't disable legacy spi flash boot mode.
*/
bool ets_efuse_legacy_spi_boot_mode_disabled(void);
/**
* @brief Read if uart print control value from Efuse
*
* @return
* - 0 for uart force print.
* - 1 for uart print when GPIO8 is low when digital reset.
* 2 for uart print when GPIO8 is high when digital reset.
* 3 for uart force slient
*/
uint32_t ets_efuse_get_uart_print_control(void);
/**
* @brief Read if USB-Serial-JTAG print during rom boot is disabled from Efuse
*
* @return
* - 1 for efuse disable USB-Serial-JTAG print during rom boot.
* - 0 for efuse doesn't disable USB-Serial-JTAG print during rom boot.
*/
uint32_t ets_efuse_usb_serial_jtag_print_is_disabled(void);
/**
* @brief Read if usb download mode disabled from Efuse
*
* (Also returns true if security download mode is enabled, as this mode
* disables USB download.)
*
* @return
* - true for efuse disable usb download mode.
* - false for efuse doesn't disable usb download mode.
*/
bool ets_efuse_usb_download_mode_disabled(void);
/**
* @brief Read if tiny basic mode disabled from Efuse
*
* @return
* - true for efuse disable tiny basic mode.
* - false for efuse doesn't disable tiny basic mode.
*/
bool ets_efuse_tiny_basic_mode_disabled(void);
/**
* @brief Read if usb module disabled from Efuse
*
* @return
* - true for efuse disable usb module.
* - false for efuse doesn't disable usb module.
*/
bool ets_efuse_usb_module_disabled(void);
/**
* @brief Read if security download modes enabled from Efuse
*
* @return
* - true for efuse enable security download mode.
* - false for efuse doesn't enable security download mode.
*/
bool ets_efuse_security_download_modes_enabled(void);
/**
* @brief Return true if secure boot is enabled in EFuse
*/
bool ets_efuse_secure_boot_enabled(void);
/**
* @brief Return true if secure boot aggressive revoke is enabled in EFuse
*/
bool ets_efuse_secure_boot_aggressive_revoke_enabled(void);
/**
* @brief Return true if cache encryption (flash, etc) is enabled from boot via EFuse
*/
bool ets_efuse_cache_encryption_enabled(void);
/**
* @brief Return true if EFuse indicates an external phy needs to be used for USB
*/
bool ets_efuse_usb_use_ext_phy(void);
/**
* @brief Return true if EFuse indicates USB device persistence is disabled
*/
bool ets_efuse_usb_force_nopersist(void);
/**
* @brief Return true if OPI pins GPIO33-37 are powered by VDDSPI, otherwise by VDD33CPU
*/
bool ets_efuse_flash_opi_5pads_power_sel_vddspi(void);
/**
* @brief Return true if EFuse indicates an opi flash is attached.
*/
bool ets_efuse_flash_opi_mode(void);
/**
* @brief Return true if EFuse indicates to send a flash resume command.
*/
bool ets_efuse_force_send_resume(void);
/**
* @brief return the time in us ROM boot need wait flash to power on from Efuse
*
* @return
* - uint32_t the time in us.
*/
uint32_t ets_efuse_get_flash_delay_us(void);
#define EFUSE_SPICONFIG_SPI_DEFAULTS 0
#define EFUSE_SPICONFIG_HSPI_DEFAULTS 1
#define EFUSE_SPICONFIG_RET_SPICLK_MASK 0x3f
#define EFUSE_SPICONFIG_RET_SPICLK_SHIFT 0
#define EFUSE_SPICONFIG_RET_SPICLK(ret) (((ret) >> EFUSE_SPICONFIG_RET_SPICLK_SHIFT) & EFUSE_SPICONFIG_RET_SPICLK_MASK)
#define EFUSE_SPICONFIG_RET_SPIQ_MASK 0x3f
#define EFUSE_SPICONFIG_RET_SPIQ_SHIFT 6
#define EFUSE_SPICONFIG_RET_SPIQ(ret) (((ret) >> EFUSE_SPICONFIG_RET_SPIQ_SHIFT) & EFUSE_SPICONFIG_RET_SPIQ_MASK)
#define EFUSE_SPICONFIG_RET_SPID_MASK 0x3f
#define EFUSE_SPICONFIG_RET_SPID_SHIFT 12
#define EFUSE_SPICONFIG_RET_SPID(ret) (((ret) >> EFUSE_SPICONFIG_RET_SPID_SHIFT) & EFUSE_SPICONFIG_RET_SPID_MASK)
#define EFUSE_SPICONFIG_RET_SPICS0_MASK 0x3f
#define EFUSE_SPICONFIG_RET_SPICS0_SHIFT 18
#define EFUSE_SPICONFIG_RET_SPICS0(ret) (((ret) >> EFUSE_SPICONFIG_RET_SPICS0_SHIFT) & EFUSE_SPICONFIG_RET_SPICS0_MASK)
#define EFUSE_SPICONFIG_RET_SPIHD_MASK 0x3f
#define EFUSE_SPICONFIG_RET_SPIHD_SHIFT 24
#define EFUSE_SPICONFIG_RET_SPIHD(ret) (((ret) >> EFUSE_SPICONFIG_RET_SPIHD_SHIFT) & EFUSE_SPICONFIG_RET_SPIHD_MASK)
/**
* @brief Enable JTAG temporarily by writing a JTAG HMAC "key" into
* the JTAG_CTRL registers.
*
* Works if JTAG has been "soft" disabled by burning the EFUSE_SOFT_DIS_JTAG efuse.
*
* Will enable the HMAC module to generate a "downstream" HMAC value from a key already saved in efuse, and then write the JTAG HMAC "key" which will enable JTAG if the two keys match.
*
* @param jtag_hmac_key Pointer to a 32 byte array containing a valid key. Supplied by user.
* @param key_block Index of a key block containing the source for this key.
*
* @return ETS_FAILED if HMAC operation fails or invalid parameter, ETS_OK otherwise. ETS_OK doesn't necessarily mean that JTAG was enabled.
*/
int ets_jtag_enable_temporarily(const uint8_t *jtag_hmac_key, ets_efuse_block_t key_block);
/**
* @brief A crc8 algorithm used for MAC addresses in efuse
*
* @param unsigned char const *p : Pointer to original data.
*
* @param unsigned int len : Data length in byte.
*
* @return unsigned char: Crc value.
*/
unsigned char esp_crc8(unsigned char const *p, unsigned int len);
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* _ROM_EFUSE_H_ */

54
tools/sdk/esp32/include/esp_rom/include/esp32c3/rom/esp_flash.h Normal file
View File

@ -0,0 +1,54 @@
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#pragma once
#include "esp_err.h"
#ifdef __cplusplus
extern "C" {
#endif
/* Note: Most of esp_flash APIs in ROM are compatible with headers in ESP-IDF, this function
just adds ROM-specific parts
*/
struct spi_flash_chip_t;
typedef struct esp_flash_t esp_flash_t;
/* Structure to wrap "global" data used by esp_flash in ROM */
typedef struct {
/* Default SPI flash chip, ie main chip attached to the MCU
This chip is used if the 'chip' argument passed to esp_flash_xxx API functions is ever NULL
*/
esp_flash_t *default_chip;
/* Global API OS notification start/end/chip_check functions
These are used by ROM if no other host functions are configured.
*/
struct {
esp_err_t (*start)(esp_flash_t *chip);
esp_err_t (*end)(esp_flash_t *chip, esp_err_t err);
esp_err_t (*chip_check)(esp_flash_t **inout_chip);
} api_funcs;
} esp_flash_rom_global_data_t;
/** Access a pointer to the global data used by the ROM spi_flash driver
*/
esp_flash_rom_global_data_t *esp_flash_get_rom_global_data(void);
#ifdef __cplusplus
}
#endif

563
tools/sdk/esp32/include/esp_rom/include/esp32c3/rom/ets_sys.h Normal file
View File

@ -0,0 +1,563 @@
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#ifndef _ROM_ETS_SYS_H_
#define _ROM_ETS_SYS_H_
#include <stdint.h>
#include <stdbool.h>
#ifdef __cplusplus
extern "C" {
#endif
/** \defgroup ets_sys_apis, ets system related apis
* @brief ets system apis
*/
/** @addtogroup ets_sys_apis
* @{
*/
/************************************************************************
* NOTE
* Many functions in this header files can't be run in FreeRTOS.
* Please see the comment of the Functions.
* There are also some functions that doesn't work on FreeRTOS
* without listed in the header, such as:
* xtos functions start with "_xtos_" in ld file.
*
***********************************************************************
*/
/** \defgroup ets_apis, Espressif Task Scheduler related apis
* @brief ets apis
*/
/** @addtogroup ets_apis
* @{
*/
typedef enum {
ETS_OK = 0, /**< return successful in ets*/
ETS_FAILED = 1 /**< return failed in ets*/
} ETS_STATUS;
typedef ETS_STATUS ets_status_t;
typedef uint32_t ETSSignal;
typedef uint32_t ETSParam;
typedef struct ETSEventTag ETSEvent; /**< Event transmit/receive in ets*/
struct ETSEventTag {
ETSSignal sig; /**< Event signal, in same task, different Event with different signal*/
ETSParam par; /**< Event parameter, sometimes without usage, then will be set as 0*/
};
typedef void (*ETSTask)(ETSEvent *e); /**< Type of the Task processer*/
typedef void (* ets_idle_cb_t)(void *arg); /**< Type of the system idle callback*/
/**
* @brief Start the Espressif Task Scheduler, which is an infinit loop. Please do not add code after it.
*
* @param none
*
* @return none
*/
void ets_run(void);
/**
* @brief Set the Idle callback, when Tasks are processed, will call the callback before CPU goto sleep.
*
* @param ets_idle_cb_t func : The callback function.
*
* @param void *arg : Argument of the callback.
*
* @return None
*/
void ets_set_idle_cb(ets_idle_cb_t func, void *arg);
/**
* @brief Init a task with processer, priority, queue to receive Event, queue length.
*
* @param ETSTask task : The task processer.
*
* @param uint8_t prio : Task priority, 0-31, bigger num with high priority, one priority with one task.
*
* @param ETSEvent *queue : Queue belongs to the task, task always receives Events, Queue is circular used.
*
* @param uint8_t qlen : Queue length.
*
* @return None
*/
void ets_task(ETSTask task, uint8_t prio, ETSEvent *queue, uint8_t qlen);
/**
* @brief Post an event to an Task.
*
* @param uint8_t prio : Priority of the Task.
*
* @param ETSSignal sig : Event signal.
*
* @param ETSParam par : Event parameter
*
* @return ETS_OK : post successful
* @return ETS_FAILED : post failed
*/
ETS_STATUS ets_post(uint8_t prio, ETSSignal sig, ETSParam par);
/**
* @}
*/
/** \defgroup ets_boot_apis, Boot routing related apis
* @brief ets boot apis
*/
/** @addtogroup ets_apis
* @{
*/
extern const char *const exc_cause_table[40]; ///**< excption cause that defined by the core.*/
/**
* @brief Set Pro cpu Entry code, code can be called in PRO CPU when booting is not completed.
* When Pro CPU booting is completed, Pro CPU will call the Entry code if not NULL.
*
* @param uint32_t start : the PRO Entry code address value in uint32_t
*
* @return None
*/
void ets_set_user_start(uint32_t start);
/**
* @brief Set Pro cpu Startup code, code can be called when booting is not completed, or in Entry code.
* When Entry code completed, CPU will call the Startup code if not NULL, else call ets_run.
*
* @param uint32_t callback : the Startup code address value in uint32_t
*
* @return None : post successful
*/
void ets_set_startup_callback(uint32_t callback);
/**
* @brief Set App cpu Entry code, code can be called in PRO CPU.
* When APP booting is completed, APP CPU will call the Entry code if not NULL.
*
* @param uint32_t start : the APP Entry code address value in uint32_t, stored in register APPCPU_CTRL_REG_D.
*
* @return None
*/
void ets_set_appcpu_boot_addr(uint32_t start);
/**
* @}
*/
/** \defgroup ets_printf_apis, ets_printf related apis used in ets
* @brief ets printf apis
*/
/** @addtogroup ets_printf_apis
* @{
*/
/**
* @brief Printf the strings to uart or other devices, similar with printf, simple than printf.
* Can not print float point data format, or longlong data format.
* So we maybe only use this in ROM.
*
* @param const char *fmt : See printf.
*
* @param ... : See printf.
*
* @return int : the length printed to the output device.
*/
int ets_printf(const char *fmt, ...);
/**
* @brief Set the uart channel of ets_printf(uart_tx_one_char).
* ROM will set it base on the efuse and gpio setting, however, this can be changed after booting.
*
* @param uart_no : 0 for UART0, 1 for UART1.
*
* @return None
*/
void ets_set_printf_channel(uint8_t uart_no);
/**
* @brief Get the uart channel of ets_printf(uart_tx_one_char).
*
* @return uint8_t uart channel used by ets_printf(uart_tx_one_char).
*/
uint8_t ets_get_printf_channel(void);
/**
* @brief Output a char to uart, which uart to output(which is in uart module in ROM) is not in scope of the function.
* Can not print float point data format, or longlong data format
*
* @param char c : char to output.
*
* @return None
*/
void ets_write_char_uart(char c);
/**
* @brief Ets_printf have two output functions： putc1 and putc2, both of which will be called if need ouput.
* To install putc1, which is defaulted installed as ets_write_char_uart in none silent boot mode, as NULL in silent mode.
*
* @param void (*)(char) p: Output function to install.
*
* @return None
*/
void ets_install_putc1(void (*p)(char c));
/**
* @brief Ets_printf have two output functions： putc1 and putc2, both of which will be called if need ouput.
* To install putc2, which is defaulted installed as NULL.
*
* @param void (*)(char) p: Output function to install.
*
* @return None
*/
void ets_install_putc2(void (*p)(char c));
/**
* @brief Install putc1 as ets_write_char_uart.
* In silent boot mode(to void interfere the UART attached MCU), we can call this function, after booting ok.
*
* @param None
*
* @return None
*/
void ets_install_uart_printf(void);
#define ETS_PRINTF(...) ets_printf(...)
#define ETS_ASSERT(v) do { \
if (!(v)) { \
ets_printf("%s %u \n", __FILE__, __LINE__); \
while (1) {}; \
} \
} while (0);
/**
* @}
*/
/** \defgroup ets_timer_apis, ets_timer related apis used in ets
* @brief ets timer apis
*/
/** @addtogroup ets_timer_apis
* @{
*/
typedef void ETSTimerFunc(void *timer_arg);/**< timer handler*/
typedef struct _ETSTIMER_ {
struct _ETSTIMER_ *timer_next; /**< timer linker*/
uint32_t timer_expire; /**< abstruct time when timer expire*/
uint32_t timer_period; /**< timer period, 0 means timer is not periodic repeated*/
ETSTimerFunc *timer_func; /**< timer handler*/
void *timer_arg; /**< timer handler argument*/
} ETSTimer;
/**
* @brief Init ets timer, this timer range is 640 us to 429496 ms
* In FreeRTOS, please call FreeRTOS apis, never call this api.
*
* @param None
*
* @return None
*/
void ets_timer_init(void);
/**
* @brief In FreeRTOS, please call FreeRTOS apis, never call this api.
*
* @param None
*
* @return None
*/
void ets_timer_deinit(void);
/**
* @brief Arm an ets timer, this timer range is 640 us to 429496 ms.
* In FreeRTOS, please call FreeRTOS apis, never call this api.
*
* @param ETSTimer *timer : Timer struct pointer.
*
* @param uint32_t tmout : Timer value in ms, range is 1 to 429496.
*
* @param bool repeat : Timer is periodic repeated.
*
* @return None
*/
void ets_timer_arm(ETSTimer *timer, uint32_t tmout, bool repeat);
/**
* @brief Arm an ets timer, this timer range is 640 us to 429496 ms.
* In FreeRTOS, please call FreeRTOS apis, never call this api.
*
* @param ETSTimer *timer : Timer struct pointer.
*
* @param uint32_t tmout : Timer value in us, range is 1 to 429496729.
*
* @param bool repeat : Timer is periodic repeated.
*
* @return None
*/
void ets_timer_arm_us(ETSTimer *ptimer, uint32_t us, bool repeat);
/**
* @brief Disarm an ets timer.
* In FreeRTOS, please call FreeRTOS apis, never call this api.
*
* @param ETSTimer *timer : Timer struct pointer.
*
* @return None
*/
void ets_timer_disarm(ETSTimer *timer);
/**
* @brief Set timer callback and argument.
* In FreeRTOS, please call FreeRTOS apis, never call this api.
*
* @param ETSTimer *timer : Timer struct pointer.
*
* @param ETSTimerFunc *pfunction : Timer callback.
*
* @param void *parg : Timer callback argument.
*
* @return None
*/
void ets_timer_setfn(ETSTimer *ptimer, ETSTimerFunc *pfunction, void *parg);
/**
* @brief Unset timer callback and argument to NULL.
* In FreeRTOS, please call FreeRTOS apis, never call this api.
*
* @param ETSTimer *timer : Timer struct pointer.
*
* @return None
*/
void ets_timer_done(ETSTimer *ptimer);
/**
* @brief CPU do while loop for some time.
* In FreeRTOS task, please call FreeRTOS apis.
*
* @param uint32_t us : Delay time in us.
*
* @return None
*/
void ets_delay_us(uint32_t us);
/**
* @brief Set the real CPU ticks per us to the ets, so that ets_delay_us will be accurate.
* Call this function when CPU frequency is changed.
*
* @param uint32_t ticks_per_us : CPU ticks per us.
*
* @return None
*/
void ets_update_cpu_frequency(uint32_t ticks_per_us);
/**
* @brief Set the real CPU ticks per us to the ets, so that ets_delay_us will be accurate.
*
* @note This function only sets the tick rate for the current CPU. It is located in ROM,
* so the deep sleep stub can use it even if IRAM is not initialized yet.
*
* @param uint32_t ticks_per_us : CPU ticks per us.
*
* @return None
*/
void ets_update_cpu_frequency_rom(uint32_t ticks_per_us);
/**
* @brief Get the real CPU ticks per us to the ets.
* This function do not return real CPU ticks per us, just the record in ets. It can be used to check with the real CPU frequency.
*
* @param None
*
* @return uint32_t : CPU ticks per us record in ets.
*/
uint32_t ets_get_cpu_frequency(void);
/**
* @brief Get xtal_freq value, If value not stored in RTC_STORE5, than store.
*
* @param None
*
* @return uint32_t : if stored in efuse(not 0)
* clock = ets_efuse_get_xtal_freq() * 1000000;
* else if analog_8M in efuse
* clock = ets_get_xtal_scale() * 625 / 16 * ets_efuse_get_8M_clock();
* else clock = 40M.
*/
uint32_t ets_get_xtal_freq(void);
/**
* @brief Get the apb divior by xtal frequency.
* When any types of reset happen, the default value is 2.
*
* @param None
*
* @return uint32_t : 1 or 2.
*/
uint32_t ets_get_xtal_div(void);
/**
* @brief Get apb_freq value, If value not stored in RTC_STORE5, than store.
*
* @param None
*
* @return uint32_t : if rtc store the value (RTC_STORE5 high 16 bits and low 16 bits with same value), read from rtc register.
* clock = (REG_READ(RTC_STORE5) & 0xffff) << 12;
* else store ets_get_detected_xtal_freq() in.
*/
uint32_t ets_get_apb_freq(void);
/**
* @}
*/
/** \defgroup ets_intr_apis, ets interrupt configure related apis
* @brief ets intr apis
*/
/** @addtogroup ets_intr_apis
* @{
*/
typedef void (* ets_isr_t)(void *);/**< interrupt handler type*/
/**
* @brief Attach a interrupt handler to a CPU interrupt number.
* This function equals to _xtos_set_interrupt_handler_arg(i, func, arg).
* In FreeRTOS, please call FreeRTOS apis, never call this api.
*
* @param int i : CPU interrupt number.
*
* @param ets_isr_t func : Interrupt handler.
*
* @param void *arg : argument of the handler.
*
* @return None
*/
void ets_isr_attach(int i, ets_isr_t func, void *arg);
/**
* @brief Mask the interrupts which show in mask bits.
* This function equals to _xtos_ints_off(mask).
* In FreeRTOS, please call FreeRTOS apis, never call this api.
*
* @param uint32_t mask : BIT(i) means mask CPU interrupt number i.
*
* @return None
*/
void ets_isr_mask(uint32_t mask);
/**
* @brief Unmask the interrupts which show in mask bits.
* This function equals to _xtos_ints_on(mask).
* In FreeRTOS, please call FreeRTOS apis, never call this api.
*
* @param uint32_t mask : BIT(i) means mask CPU interrupt number i.
*
* @return None
*/
void ets_isr_unmask(uint32_t unmask);
/**
* @brief Lock the interrupt to level 2.
* This function direct set the CPU registers.
* In FreeRTOS, please call FreeRTOS apis, never call this api.
*
* @param None
*
* @return None
*/
void ets_intr_lock(void);
/**
* @brief Unlock the interrupt to level 0.
* This function direct set the CPU registers.
* In FreeRTOS, please call FreeRTOS apis, never call this api.
*
* @param None
*
* @return None
*/
void ets_intr_unlock(void);
/**
* @brief Unlock the interrupt to level 0, and CPU will go into power save mode(wait interrupt).
* This function direct set the CPU registers.
* In FreeRTOS, please call FreeRTOS apis, never call this api.
*
* @param None
*
* @return None
*/
void ets_waiti0(void);
/**
* @brief Attach an CPU interrupt to a hardware source.
* We have 4 steps to use an interrupt:
* 1.Attach hardware interrupt source to CPU. intr_matrix_set(0, ETS_WIFI_MAC_INTR_SOURCE, ETS_WMAC_INUM);
* 2.Set interrupt handler. xt_set_interrupt_handler(ETS_WMAC_INUM, func, NULL);
* 3.Enable interrupt for CPU. xt_ints_on(1 << ETS_WMAC_INUM);
* 4.Enable interrupt in the module.
*
* @param int cpu_no : The CPU which the interrupt number belongs.
*
* @param uint32_t model_num : The interrupt hardware source number, please see the interrupt hardware source table.
*
* @param uint32_t intr_num : The interrupt number CPU, please see the interrupt cpu using table.
*
* @return None
*/
void intr_matrix_set(int cpu_no, uint32_t model_num, uint32_t intr_num);
/**
* @}
*/
#ifndef MAC2STR
#define MAC2STR(a) (a)[0], (a)[1], (a)[2], (a)[3], (a)[4], (a)[5]
#define MACSTR "%02x:%02x:%02x:%02x:%02x:%02x"
#endif
#define ETS_MEM_BAR() asm volatile ( "" : : : "memory" )
typedef enum {
OK = 0,
FAIL,
PENDING,
BUSY,
CANCEL,
} STATUS;
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* _ROM_ETS_SYS_H_ */

311
tools/sdk/esp32/include/esp_rom/include/esp32c3/rom/gpio.h Normal file
View File

@ -0,0 +1,311 @@
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#ifndef _ROM_GPIO_H_
#define _ROM_GPIO_H_
#include <stdint.h>
#include <stdbool.h>
#include "esp_attr.h"
#include "soc/gpio_reg.h"
#ifdef __cplusplus
extern "C" {
#endif
/** \defgroup gpio_apis, uart configuration and communication related apis
* @brief gpio apis
*/
/** @addtogroup gpio_apis
* @{
*/
#define GPIO_REG_READ(reg) READ_PERI_REG(reg)
#define GPIO_REG_WRITE(reg, val) WRITE_PERI_REG(reg, val)
#define GPIO_ID_PIN0 0
#define GPIO_ID_PIN(n) (GPIO_ID_PIN0+(n))
#define GPIO_PIN_ADDR(i) (GPIO_PIN0_REG + i*4)
#define GPIO_FUNC_IN_HIGH 0x38
#define GPIO_FUNC_IN_LOW 0x3C
#define GPIO_ID_IS_PIN_REGISTER(reg_id) \
((reg_id >= GPIO_ID_PIN0) && (reg_id <= GPIO_ID_PIN(GPIO_PIN_COUNT-1)))
#define GPIO_REGID_TO_PINIDX(reg_id) ((reg_id) - GPIO_ID_PIN0)
typedef enum {
GPIO_PIN_INTR_DISABLE = 0,
GPIO_PIN_INTR_POSEDGE = 1,
GPIO_PIN_INTR_NEGEDGE = 2,
GPIO_PIN_INTR_ANYEDGE = 3,
GPIO_PIN_INTR_LOLEVEL = 4,
GPIO_PIN_INTR_HILEVEL = 5
} GPIO_INT_TYPE;
#define GPIO_OUTPUT_SET(gpio_no, bit_value) \
((gpio_no < 32) ? gpio_output_set(bit_value<<gpio_no, (bit_value ? 0 : 1)<<gpio_no, 1<<gpio_no,0) : \
gpio_output_set_high(bit_value<<(gpio_no - 32), (bit_value ? 0 : 1)<<(gpio_no - 32), 1<<(gpio_no -32),0))
#define GPIO_DIS_OUTPUT(gpio_no) ((gpio_no < 32) ? gpio_output_set(0,0,0, 1<<gpio_no) : gpio_output_set_high(0,0,0, 1<<(gpio_no - 32)))
#define GPIO_INPUT_GET(gpio_no) ((gpio_no < 32) ? ((gpio_input_get()>>gpio_no)&BIT0) : ((gpio_input_get_high()>>(gpio_no - 32))&BIT0))
/* GPIO interrupt handler, registered through gpio_intr_handler_register */
typedef void (* gpio_intr_handler_fn_t)(uint32_t intr_mask, bool high, void *arg);
/**
* @brief Initialize GPIO. This includes reading the GPIO Configuration DataSet
* to initialize "output enables" and pin configurations for each gpio pin.
* Please do not call this function in SDK.
*
* @param None
*
* @return None
*/
void gpio_init(void);
/**
* @brief Change GPIO(0-31) pin output by setting, clearing, or disabling pins, GPIO0<->BIT(0).
* There is no particular ordering guaranteed; so if the order of writes is significant,
* calling code should divide a single call into multiple calls.
*
* @param uint32_t set_mask : the gpios that need high level.
*
* @param uint32_t clear_mask : the gpios that need low level.
*
* @param uint32_t enable_mask : the gpios that need be changed.
*
* @param uint32_t disable_mask : the gpios that need diable output.
*
* @return None
*/
void gpio_output_set(uint32_t set_mask, uint32_t clear_mask, uint32_t enable_mask, uint32_t disable_mask);
/**
* @brief Change GPIO(32-39) pin output by setting, clearing, or disabling pins, GPIO32<->BIT(0).
* There is no particular ordering guaranteed; so if the order of writes is significant,
* calling code should divide a single call into multiple calls.
*
* @param uint32_t set_mask : the gpios that need high level.
*
* @param uint32_t clear_mask : the gpios that need low level.
*
* @param uint32_t enable_mask : the gpios that need be changed.
*
* @param uint32_t disable_mask : the gpios that need diable output.
*
* @return None
*/
void gpio_output_set_high(uint32_t set_mask, uint32_t clear_mask, uint32_t enable_mask, uint32_t disable_mask);
/**
* @brief Sample the value of GPIO input pins(0-31) and returns a bitmask.
*
* @param None
*
* @return uint32_t : bitmask for GPIO input pins, BIT(0) for GPIO0.
*/
uint32_t gpio_input_get(void);
/**
* @brief Sample the value of GPIO input pins(32-39) and returns a bitmask.
*
* @param None
*
* @return uint32_t : bitmask for GPIO input pins, BIT(0) for GPIO32.
*/
uint32_t gpio_input_get_high(void);
/**
* @brief Register an application-specific interrupt handler for GPIO pin interrupts.
* Once the interrupt handler is called, it will not be called again until after a call to gpio_intr_ack.
* Please do not call this function in SDK.
*
* @param gpio_intr_handler_fn_t fn : gpio application-specific interrupt handler
*
* @param void *arg : gpio application-specific interrupt handler argument.
*
* @return None
*/
void gpio_intr_handler_register(gpio_intr_handler_fn_t fn, void *arg);
/**
* @brief Get gpio interrupts which happens but not processed.
* Please do not call this function in SDK.
*
* @param None
*
* @return uint32_t : bitmask for GPIO pending interrupts, BIT(0) for GPIO0.
*/
uint32_t gpio_intr_pending(void);
/**
* @brief Get gpio interrupts which happens but not processed.
* Please do not call this function in SDK.
*
* @param None
*
* @return uint32_t : bitmask for GPIO pending interrupts, BIT(0) for GPIO32.
*/
uint32_t gpio_intr_pending_high(void);
/**
* @brief Ack gpio interrupts to process pending interrupts.
* Please do not call this function in SDK.
*
* @param uint32_t ack_mask: bitmask for GPIO ack interrupts, BIT(0) for GPIO0.
*
* @return None
*/
void gpio_intr_ack(uint32_t ack_mask);
/**
* @brief Ack gpio interrupts to process pending interrupts.
* Please do not call this function in SDK.
*
* @param uint32_t ack_mask: bitmask for GPIO ack interrupts, BIT(0) for GPIO32.
*
* @return None
*/
void gpio_intr_ack_high(uint32_t ack_mask);
/**
* @brief Set GPIO to wakeup the ESP32.
* Please do not call this function in SDK.
*
* @param uint32_t i: gpio number.
*
* @param GPIO_INT_TYPE intr_state : only GPIO_PIN_INTR_LOLEVEL\GPIO_PIN_INTR_HILEVEL can be used
*
* @return None
*/
void gpio_pin_wakeup_enable(uint32_t i, GPIO_INT_TYPE intr_state);
/**
* @brief disable GPIOs to wakeup the ESP32.
* Please do not call this function in SDK.
*
* @param None
*
* @return None
*/
void gpio_pin_wakeup_disable(void);
/**
* @brief set gpio input to a signal, one gpio can input to several signals.
*
* @param uint32_t gpio : gpio number, 0~0x2f
* gpio == 0x3C, input 0 to signal
* gpio == 0x3A, input nothing to signal
* gpio == 0x38, input 1 to signal
*
* @param uint32_t signal_idx : signal index.
*
* @param bool inv : the signal is inv or not
*
* @return None
*/
void gpio_matrix_in(uint32_t gpio, uint32_t signal_idx, bool inv);
/**
* @brief set signal output to gpio, one signal can output to several gpios.
*
* @param uint32_t gpio : gpio number, 0~0x2f
*
* @param uint32_t signal_idx : signal index.
* signal_idx == 0x100, cancel output put to the gpio
*
* @param bool out_inv : the signal output is invert or not
*
* @param bool oen_inv : the signal output enable is invert or not
*
* @return None
*/
void gpio_matrix_out(uint32_t gpio, uint32_t signal_idx, bool out_inv, bool oen_inv);
/**
* @brief Select pad as a gpio function from IOMUX.
*
* @param uint32_t gpio_num : gpio number, 0~0x2f
*
* @return None
*/
void gpio_pad_select_gpio(uint32_t gpio_num);
/**
* @brief Set pad driver capability.
*
* @param uint32_t gpio_num : gpio number, 0~0x2f
*
* @param uint32_t drv : 0-3
*
* @return None
*/
void gpio_pad_set_drv(uint32_t gpio_num, uint32_t drv);
/**
* @brief Pull up the pad from gpio number.
*
* @param uint32_t gpio_num : gpio number, 0~0x2f
*
* @return None
*/
void gpio_pad_pullup(uint32_t gpio_num);
/**
* @brief Pull down the pad from gpio number.
*
* @param uint32_t gpio_num : gpio number, 0~0x2f
*
* @return None
*/
void gpio_pad_pulldown(uint32_t gpio_num);
/**
* @brief Unhold the pad from gpio number.
*
* @param uint32_t gpio_num : gpio number, 0~0x2f
*
* @return None
*/
void gpio_pad_unhold(uint32_t gpio_num);
/**
* @brief Hold the pad from gpio number.
*
* @param uint32_t gpio_num : gpio number, 0~0x2f
*
* @return None
*/
void gpio_pad_hold(uint32_t gpio_num);
/**
* @brief enable gpio pad input.
*
* @param uint32_t gpio_num : gpio number, 0~0x2f
*
* @return None
*/
void gpio_pad_input_enable(uint32_t gpio_num);
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* _ROM_GPIO_H_ */

63
tools/sdk/esp32/include/esp_rom/include/esp32c3/rom/hmac.h Normal file
View File

@ -0,0 +1,63 @@
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#ifndef _ROM_HMAC_H_
#define _ROM_HMAC_H_
#ifdef __cplusplus
extern "C" {
#endif
#include <stdint.h>
#include <stdlib.h>
#include "efuse.h"
void ets_hmac_enable(void);
void ets_hmac_disable(void);
/* Use the "upstream" HMAC key (ETS_EFUSE_KEY_PURPOSE_HMAC_UP)
to digest a message.
*/
int ets_hmac_calculate_message(ets_efuse_block_t key_block, const void *message, size_t message_len, uint8_t *hmac);
/* Calculate a downstream HMAC message to temporarily enable JTAG, or
to generate a Digital Signature data decryption key.
- purpose must be ETS_EFUSE_KEY_PURPOSE_HMAC_DOWN_DIGITAL_SIGNATURE
or ETS_EFUSE_KEY_PURPOSE_HMAC_DOWN_JTAG
- key_block must be in range ETS_EFUSE_BLOCK_KEY0 toETS_EFUSE_BLOCK_KEY6.
This efuse block must have the corresponding purpose set in "purpose", or
ETS_EFUSE_KEY_PURPOSE_HMAC_DOWN_ALL.
The result of this HMAC calculation is only made available "downstream" to the
corresponding hardware module, and cannot be accessed by software.
*/
int ets_hmac_calculate_downstream(ets_efuse_block_t key_block, ets_efuse_purpose_t purpose);
/* Invalidate a downstream HMAC value previously calculated by ets_hmac_calculate_downstream().
*
* - purpose must match a previous call to ets_hmac_calculate_downstream().
*
* After this function is called, the corresponding internal operation (JTAG or DS) will no longer
* have access to the generated key.
*/
int ets_hmac_invalidate_downstream(ets_efuse_purpose_t purpose);
#ifdef __cplusplus
}
#endif
#endif // _ROM_HMAC_H_

91
tools/sdk/esp32/include/esp_rom/include/esp32c3/rom/libc_stubs.h Normal file
View File

@ -0,0 +1,91 @@
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#ifndef _ROM_LIBC_STUBS_H_
#define _ROM_LIBC_STUBS_H_
#include <sys/lock.h>
#include <stddef.h>
#include <stdint.h>
#include <stdio.h>
#include <stdarg.h>
#include <reent.h>
#include <errno.h>
#ifdef __cplusplus
extern "C" {
#endif
/*
ESP32-C3 ROM code contains implementations of some of C library functions.
Whenever a function in ROM needs to use a syscall, it calls a pointer to the corresponding syscall
implementation defined in the following struct.
The table itself, by default, is not allocated in RAM. A global pointer syscall_table_ptr is used to
set the address
So, before using any of the C library functions (except for pure functions and memcpy/memset functions),
application must allocate syscall table structure for each CPU being used, and populate it with pointers
to actual implementations of corresponding syscalls.
*/
struct syscall_stub_table
{
struct _reent* (*__getreent)(void);
void* (*_malloc_r)(struct _reent *r, size_t);
void (*_free_r)(struct _reent *r, void*);
void* (*_realloc_r)(struct _reent *r, void*, size_t);
void* (*_calloc_r)(struct _reent *r, size_t, size_t);
void (*_abort)(void);
int (*_system_r)(struct _reent *r, const char*);
int (*_rename_r)(struct _reent *r, const char*, const char*);
clock_t (*_times_r)(struct _reent *r, struct tms *);
int (*_gettimeofday_r) (struct _reent *r, struct timeval *, void *);
void (*_raise_r)(struct _reent *r);
int (*_unlink_r)(struct _reent *r, const char*);
int (*_link_r)(struct _reent *r, const char*, const char*);
int (*_stat_r)(struct _reent *r, const char*, struct stat *);
int (*_fstat_r)(struct _reent *r, int, struct stat *);
void* (*_sbrk_r)(struct _reent *r, ptrdiff_t);
int (*_getpid_r)(struct _reent *r);
int (*_kill_r)(struct _reent *r, int, int);
void (*_exit_r)(struct _reent *r, int);
int (*_close_r)(struct _reent *r, int);
int (*_open_r)(struct _reent *r, const char *, int, int);
int (*_write_r)(struct _reent *r, int, const void *, int);
int (*_lseek_r)(struct _reent *r, int, int, int);
int (*_read_r)(struct _reent *r, int, void *, int);
void (*_retarget_lock_init)(_LOCK_T *lock);
void (*_retarget_lock_init_recursive)(_LOCK_T *lock);
void (*_retarget_lock_close)(_LOCK_T lock);
void (*_retarget_lock_close_recursive)(_LOCK_T lock);
void (*_retarget_lock_acquire)(_LOCK_T lock);
void (*_retarget_lock_acquire_recursive)(_LOCK_T lock);
int (*_retarget_lock_try_acquire)(_LOCK_T lock);
int (*_retarget_lock_try_acquire_recursive)(_LOCK_T lock);
void (*_retarget_lock_release)(_LOCK_T lock);
void (*_retarget_lock_release_recursive)(_LOCK_T lock);
int (*_printf_float)(struct _reent *data, void *pdata, FILE * fp, int (*pfunc) (struct _reent *, FILE *, const char *, size_t len), va_list * ap);
int (*_scanf_float) (struct _reent *rptr, void *pdata, FILE *fp, va_list *ap);
void (*__assert_func) (const char *file, int line, const char * func, const char *failedexpr) __attribute__((noreturn));
void (*__sinit) (struct _reent *r);
void (*_cleanup_r) (struct _reent* r);
};
extern struct syscall_stub_table *syscall_table_ptr;
#ifdef __cplusplus
} // extern "C"
#endif
#endif /* _ROM_LIBC_STUBS_H_ */

176
tools/sdk/esp32/include/esp_rom/include/esp32c3/rom/lldesc.h Normal file
View File

@ -0,0 +1,176 @@
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#ifndef _ROM_LLDESC_H_
#define _ROM_LLDESC_H_
#include <stdint.h>
#include "sys/queue.h"
#ifdef __cplusplus
extern "C" {
#endif
#define LLDESC_TX_MBLK_SIZE 268 /* */
#define LLDESC_RX_SMBLK_SIZE 64 /* small block size, for small mgmt frame */
#define LLDESC_RX_MBLK_SIZE 524 /* rx is large sinec we want to contain mgmt frame in one block*/
#define LLDESC_RX_AMPDU_ENTRY_MBLK_SIZE 64 /* it is a small buffer which is a cycle link*/
#define LLDESC_RX_AMPDU_LEN_MBLK_SIZE 256 /*for ampdu entry*/
#ifdef ESP_MAC_5
#define LLDESC_TX_MBLK_NUM 116 /* 64K / 256 */
#define LLDESC_RX_MBLK_NUM 82 /* 64K / 512 MAX 172*/
#define LLDESC_RX_AMPDU_ENTRY_MBLK_NUM 4
#define LLDESC_RX_AMPDU_LEN_MLBK_NUM 12
#else
#ifdef SBUF_RXTX
#define LLDESC_TX_MBLK_NUM_MAX (2 * 48) /* 23K / 260 - 8 */
#define LLDESC_RX_MBLK_NUM_MAX (2 * 48) /* 23K / 524 */
#define LLDESC_TX_MBLK_NUM_MIN (2 * 16) /* 23K / 260 - 8 */
#define LLDESC_RX_MBLK_NUM_MIN (2 * 16) /* 23K / 524 */
#endif
#define LLDESC_TX_MBLK_NUM 10 //(2 * 32) /* 23K / 260 - 8 */
#ifdef IEEE80211_RX_AMPDU
#define LLDESC_RX_MBLK_NUM 30
#else
#define LLDESC_RX_MBLK_NUM 10
#endif /*IEEE80211_RX_AMPDU*/
#define LLDESC_RX_AMPDU_ENTRY_MBLK_NUM 4
#define LLDESC_RX_AMPDU_LEN_MLBK_NUM 8
#endif /* !ESP_MAC_5 */
/*
* SLC2 DMA Desc struct, aka lldesc_t
*
* --------------------------------------------------------------
* | own | EoF | sub_sof | 5'b0 | length [11:0] | size [11:0] |
* --------------------------------------------------------------
* | buf_ptr [31:0] |
* --------------------------------------------------------------
* | next_desc_ptr [31:0] |
* --------------------------------------------------------------
*/
/* this bitfield is start from the LSB!!! */
typedef struct lldesc_s {
volatile uint32_t size : 12,
length: 12,
offset: 5, /* h/w reserved 5bit, s/w use it as offset in buffer */
sosf : 1, /* start of sub-frame */
eof : 1, /* end of frame */
owner : 1; /* hw or sw */
volatile const uint8_t *buf; /* point to buffer data */
union {
volatile uint32_t empty;
STAILQ_ENTRY(lldesc_s) qe; /* pointing to the next desc */
};
} lldesc_t;
typedef struct tx_ampdu_entry_s {
uint32_t sub_len : 12,
dili_num : 7,
: 1,
null_byte: 2,
data : 1,
enc : 1,
seq : 8;
} tx_ampdu_entry_t;
typedef struct lldesc_chain_s {
lldesc_t *head;
lldesc_t *tail;
} lldesc_chain_t;
#ifdef SBUF_RXTX
enum sbuf_mask_s {
SBUF_MOVE_NO = 0,
SBUF_MOVE_TX2RX,
SBUF_MOVE_RX2TX,
} ;
#define SBUF_MOVE_STEP 8
#endif
#define LLDESC_SIZE sizeof(struct lldesc_s)
/* SLC Descriptor */
#define LLDESC_OWNER_MASK 0x80000000
#define LLDESC_OWNER_SHIFT 31
#define LLDESC_SW_OWNED 0
#define LLDESC_HW_OWNED 1
#define LLDESC_EOF_MASK 0x40000000
#define LLDESC_EOF_SHIFT 30
#define LLDESC_SOSF_MASK 0x20000000
#define LLDESC_SOSF_SHIFT 29
#define LLDESC_LENGTH_MASK 0x00fff000
#define LLDESC_LENGTH_SHIFT 12
#define LLDESC_SIZE_MASK 0x00000fff
#define LLDESC_SIZE_SHIFT 0
#define LLDESC_ADDR_MASK 0x000fffff
void lldesc_build_chain(uint8_t *descptr, uint32_t desclen, uint8_t *mblkptr, uint32_t buflen, uint32_t blksz, uint8_t owner,
lldesc_t **head,
#ifdef TO_HOST_RESTART
lldesc_t **one_before_tail,
#endif
lldesc_t **tail);
lldesc_t *lldesc_num2link(lldesc_t *head, uint16_t nblks);
lldesc_t *lldesc_set_owner(lldesc_t *head, uint16_t nblks, uint8_t owner);
static inline uint32_t lldesc_get_chain_length(lldesc_t *head)
{
lldesc_t *ds = head;
uint32_t len = 0;
while (ds) {
len += ds->length;
ds = STAILQ_NEXT(ds, qe);
}
return len;
}
static inline void lldesc_config(lldesc_t *ds, uint8_t owner, uint8_t eof, uint8_t sosf, uint16_t len)
{
ds->owner = owner;
ds->eof = eof;
ds->sosf = sosf;
ds->length = len;
}
#define LLDESC_CONFIG(_desc, _owner, _eof, _sosf, _len) do { \
(_desc)->owner = (_owner); \
(_desc)->eof = (_eof); \
(_desc)->sosf = (_sosf); \
(_desc)->length = (_len); \
} while(0)
#define LLDESC_FROM_HOST_CLEANUP(ds) LLDESC_CONFIG((ds), LLDESC_HW_OWNED, 0, 0, 0)
#define LLDESC_MAC_RX_CLEANUP(ds) LLDESC_CONFIG((ds), LLDESC_HW_OWNED, 0, 0, (ds)->size)
#define LLDESC_TO_HOST_CLEANUP(ds) LLDESC_CONFIG((ds), LLDESC_HW_OWNED, 0, 0, 0)
#ifdef __cplusplus
}
#endif
#endif /* _ROM_LLDESC_H_ */

38
tools/sdk/esp32/include/esp_rom/include/esp32c3/rom/md5_hash.h Normal file
View File

@ -0,0 +1,38 @@
/*
* MD5 internal definitions
* Copyright (c) 2003-2005, Jouni Malinen <j@w1.fi>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* Alternatively, this software may be distributed under the terms of BSD
* license.
*
* See README and COPYING for more details.
*/
#ifndef _ROM_MD5_HASH_H_
#define _ROM_MD5_HASH_H_
#include <stdint.h>
#ifdef __cplusplus
extern "C" {
#endif
struct MD5Context {
uint32_t buf[4];
uint32_t bits[2];
uint8_t in[64];
};
void MD5Init(struct MD5Context *context);
void MD5Update(struct MD5Context *context, unsigned char const *buf, unsigned len);
void MD5Final(unsigned char digest[16], struct MD5Context *context);
#ifdef __cplusplus
}
#endif
#endif /* _ROM_MD5_HASH_H_ */

760
tools/sdk/esp32/include/esp_rom/include/esp32c3/rom/miniz.h Normal file
View File

@ -0,0 +1,760 @@
#ifndef MINIZ_HEADER_INCLUDED
#define MINIZ_HEADER_INCLUDED
#include <stdlib.h>
// Defines to completely disable specific portions of miniz.c:
// If all macros here are defined the only functionality remaining will be CRC-32, adler-32, tinfl, and tdefl.
// Define MINIZ_NO_STDIO to disable all usage and any functions which rely on stdio for file I/O.
#define MINIZ_NO_STDIO
// If MINIZ_NO_TIME is specified then the ZIP archive functions will not be able to get the current time, or
// get/set file times, and the C run-time funcs that get/set times won't be called.
// The current downside is the times written to your archives will be from 1979.
#define MINIZ_NO_TIME
// Define MINIZ_NO_ARCHIVE_APIS to disable all ZIP archive API's.
#define MINIZ_NO_ARCHIVE_APIS
// Define MINIZ_NO_ARCHIVE_APIS to disable all writing related ZIP archive API's.
#define MINIZ_NO_ARCHIVE_WRITING_APIS
// Define MINIZ_NO_ZLIB_APIS to remove all ZLIB-style compression/decompression API's.
#define MINIZ_NO_ZLIB_APIS
// Define MINIZ_NO_ZLIB_COMPATIBLE_NAME to disable zlib names, to prevent conflicts against stock zlib.
#define MINIZ_NO_ZLIB_COMPATIBLE_NAMES
// Define MINIZ_NO_MALLOC to disable all calls to malloc, free, and realloc.
// Note if MINIZ_NO_MALLOC is defined then the user must always provide custom user alloc/free/realloc
// callbacks to the zlib and archive API's, and a few stand-alone helper API's which don't provide custom user
// functions (such as tdefl_compress_mem_to_heap() and tinfl_decompress_mem_to_heap()) won't work.
#define MINIZ_NO_MALLOC
#if defined(__TINYC__) && (defined(__linux) || defined(__linux__))
// TODO: Work around "error: include file 'sys\utime.h' when compiling with tcc on Linux
#define MINIZ_NO_TIME
#endif
#if !defined(MINIZ_NO_TIME) && !defined(MINIZ_NO_ARCHIVE_APIS)
#include <time.h>
#endif
//Hardcoded options for Xtensa - JD
#define MINIZ_X86_OR_X64_CPU 0
#define MINIZ_LITTLE_ENDIAN 1
#define MINIZ_USE_UNALIGNED_LOADS_AND_STORES 0
#define MINIZ_HAS_64BIT_REGISTERS 0
#define TINFL_USE_64BIT_BITBUF 0
#if defined(_M_IX86) || defined(_M_X64) || defined(__i386__) || defined(__i386) || defined(__i486__) || defined(__i486) || defined(i386) || defined(__ia64__) || defined(__x86_64__)
// MINIZ_X86_OR_X64_CPU is only used to help set the below macros.
#define MINIZ_X86_OR_X64_CPU 1
#endif
#if (__BYTE_ORDER__==__ORDER_LITTLE_ENDIAN__) || MINIZ_X86_OR_X64_CPU
// Set MINIZ_LITTLE_ENDIAN to 1 if the processor is little endian.
#define MINIZ_LITTLE_ENDIAN 1
#endif
#if MINIZ_X86_OR_X64_CPU
// Set MINIZ_USE_UNALIGNED_LOADS_AND_STORES to 1 on CPU's that permit efficient integer loads and stores from unaligned addresses.
#define MINIZ_USE_UNALIGNED_LOADS_AND_STORES 1
#endif
#if defined(_M_X64) || defined(_WIN64) || defined(__MINGW64__) || defined(_LP64) || defined(__LP64__) || defined(__ia64__) || defined(__x86_64__)
// Set MINIZ_HAS_64BIT_REGISTERS to 1 if operations on 64-bit integers are reasonably fast (and don't involve compiler generated calls to helper functions).
#define MINIZ_HAS_64BIT_REGISTERS 1
#endif
#ifdef __cplusplus
extern "C" {
#endif
// ------------------- zlib-style API Definitions.
// For more compatibility with zlib, miniz.c uses unsigned long for some parameters/struct members. Beware: mz_ulong can be either 32 or 64-bits!
typedef unsigned long mz_ulong;
// mz_free() internally uses the MZ_FREE() macro (which by default calls free() unless you've modified the MZ_MALLOC macro) to release a block allocated from the heap.
void mz_free(void *p);
#define MZ_ADLER32_INIT (1)
// mz_adler32() returns the initial adler-32 value to use when called with ptr==NULL.
mz_ulong mz_adler32(mz_ulong adler, const unsigned char *ptr, size_t buf_len);
#define MZ_CRC32_INIT (0)
// mz_crc32() returns the initial CRC-32 value to use when called with ptr==NULL.
mz_ulong mz_crc32(mz_ulong crc, const unsigned char *ptr, size_t buf_len);
// Compression strategies.
enum { MZ_DEFAULT_STRATEGY = 0, MZ_FILTERED = 1, MZ_HUFFMAN_ONLY = 2, MZ_RLE = 3, MZ_FIXED = 4 };
// Method
#define MZ_DEFLATED 8
#ifndef MINIZ_NO_ZLIB_APIS
// Heap allocation callbacks.
// Note that mz_alloc_func parameter types purpsosely differ from zlib's: items/size is size_t, not unsigned long.
typedef void *(*mz_alloc_func)(void *opaque, size_t items, size_t size);
typedef void (*mz_free_func)(void *opaque, void *address);
typedef void *(*mz_realloc_func)(void *opaque, void *address, size_t items, size_t size);
#define MZ_VERSION "9.1.15"
#define MZ_VERNUM 0x91F0
#define MZ_VER_MAJOR 9
#define MZ_VER_MINOR 1
#define MZ_VER_REVISION 15
#define MZ_VER_SUBREVISION 0
// Flush values. For typical usage you only need MZ_NO_FLUSH and MZ_FINISH. The other values are for advanced use (refer to the zlib docs).
enum { MZ_NO_FLUSH = 0, MZ_PARTIAL_FLUSH = 1, MZ_SYNC_FLUSH = 2, MZ_FULL_FLUSH = 3, MZ_FINISH = 4, MZ_BLOCK = 5 };
// Return status codes. MZ_PARAM_ERROR is non-standard.
enum { MZ_OK = 0, MZ_STREAM_END = 1, MZ_NEED_DICT = 2, MZ_ERRNO = -1, MZ_STREAM_ERROR = -2, MZ_DATA_ERROR = -3, MZ_MEM_ERROR = -4, MZ_BUF_ERROR = -5, MZ_VERSION_ERROR = -6, MZ_PARAM_ERROR = -10000 };
// Compression levels: 0-9 are the standard zlib-style levels, 10 is best possible compression (not zlib compatible, and may be very slow), MZ_DEFAULT_COMPRESSION=MZ_DEFAULT_LEVEL.
enum { MZ_NO_COMPRESSION = 0, MZ_BEST_SPEED = 1, MZ_BEST_COMPRESSION = 9, MZ_UBER_COMPRESSION = 10, MZ_DEFAULT_LEVEL = 6, MZ_DEFAULT_COMPRESSION = -1 };
// Window bits
#define MZ_DEFAULT_WINDOW_BITS 15
struct mz_internal_state;
// Compression/decompression stream struct.
typedef struct mz_stream_s {
const unsigned char *next_in; // pointer to next byte to read
unsigned int avail_in; // number of bytes available at next_in
mz_ulong total_in; // total number of bytes consumed so far
unsigned char *next_out; // pointer to next byte to write
unsigned int avail_out; // number of bytes that can be written to next_out
mz_ulong total_out; // total number of bytes produced so far
char *msg; // error msg (unused)
struct mz_internal_state *state; // internal state, allocated by zalloc/zfree
mz_alloc_func zalloc; // optional heap allocation function (defaults to malloc)
mz_free_func zfree; // optional heap free function (defaults to free)
void *opaque; // heap alloc function user pointer
int data_type; // data_type (unused)
mz_ulong adler; // adler32 of the source or uncompressed data
mz_ulong reserved; // not used
} mz_stream;
typedef mz_stream *mz_streamp;
// Returns the version string of miniz.c.
const char *mz_version(void);
// mz_deflateInit() initializes a compressor with default options:
// Parameters:
// pStream must point to an initialized mz_stream struct.
// level must be between [MZ_NO_COMPRESSION, MZ_BEST_COMPRESSION].
// level 1 enables a specially optimized compression function that's been optimized purely for performance, not ratio.
// (This special func. is currently only enabled when MINIZ_USE_UNALIGNED_LOADS_AND_STORES and MINIZ_LITTLE_ENDIAN are defined.)
// Return values:
// MZ_OK on success.
// MZ_STREAM_ERROR if the stream is bogus.
// MZ_PARAM_ERROR if the input parameters are bogus.
// MZ_MEM_ERROR on out of memory.
int mz_deflateInit(mz_streamp pStream, int level);
// mz_deflateInit2() is like mz_deflate(), except with more control:
// Additional parameters:
// method must be MZ_DEFLATED
// window_bits must be MZ_DEFAULT_WINDOW_BITS (to wrap the deflate stream with zlib header/adler-32 footer) or -MZ_DEFAULT_WINDOW_BITS (raw deflate/no header or footer)
// mem_level must be between [1, 9] (it's checked but ignored by miniz.c)
int mz_deflateInit2(mz_streamp pStream, int level, int method, int window_bits, int mem_level, int strategy);
// Quickly resets a compressor without having to reallocate anything. Same as calling mz_deflateEnd() followed by mz_deflateInit()/mz_deflateInit2().
int mz_deflateReset(mz_streamp pStream);
// mz_deflate() compresses the input to output, consuming as much of the input and producing as much output as possible.
// Parameters:
// pStream is the stream to read from and write to. You must initialize/update the next_in, avail_in, next_out, and avail_out members.
// flush may be MZ_NO_FLUSH, MZ_PARTIAL_FLUSH/MZ_SYNC_FLUSH, MZ_FULL_FLUSH, or MZ_FINISH.
// Return values:
// MZ_OK on success (when flushing, or if more input is needed but not available, and/or there's more output to be written but the output buffer is full).
// MZ_STREAM_END if all input has been consumed and all output bytes have been written. Don't call mz_deflate() on the stream anymore.
// MZ_STREAM_ERROR if the stream is bogus.
// MZ_PARAM_ERROR if one of the parameters is invalid.
// MZ_BUF_ERROR if no forward progress is possible because the input and/or output buffers are empty. (Fill up the input buffer or free up some output space and try again.)
int mz_deflate(mz_streamp pStream, int flush);
// mz_deflateEnd() deinitializes a compressor:
// Return values:
// MZ_OK on success.
// MZ_STREAM_ERROR if the stream is bogus.
int mz_deflateEnd(mz_streamp pStream);
// mz_deflateBound() returns a (very) conservative upper bound on the amount of data that could be generated by deflate(), assuming flush is set to only MZ_NO_FLUSH or MZ_FINISH.
mz_ulong mz_deflateBound(mz_streamp pStream, mz_ulong source_len);
// Single-call compression functions mz_compress() and mz_compress2():
// Returns MZ_OK on success, or one of the error codes from mz_deflate() on failure.
int mz_compress(unsigned char *pDest, mz_ulong *pDest_len, const unsigned char *pSource, mz_ulong source_len);
int mz_compress2(unsigned char *pDest, mz_ulong *pDest_len, const unsigned char *pSource, mz_ulong source_len, int level);
// mz_compressBound() returns a (very) conservative upper bound on the amount of data that could be generated by calling mz_compress().
mz_ulong mz_compressBound(mz_ulong source_len);
// Initializes a decompressor.
int mz_inflateInit(mz_streamp pStream);
// mz_inflateInit2() is like mz_inflateInit() with an additional option that controls the window size and whether or not the stream has been wrapped with a zlib header/footer:
// window_bits must be MZ_DEFAULT_WINDOW_BITS (to parse zlib header/footer) or -MZ_DEFAULT_WINDOW_BITS (raw deflate).
int mz_inflateInit2(mz_streamp pStream, int window_bits);
// Decompresses the input stream to the output, consuming only as much of the input as needed, and writing as much to the output as possible.
// Parameters:
// pStream is the stream to read from and write to. You must initialize/update the next_in, avail_in, next_out, and avail_out members.
// flush may be MZ_NO_FLUSH, MZ_SYNC_FLUSH, or MZ_FINISH.
// On the first call, if flush is MZ_FINISH it's assumed the input and output buffers are both sized large enough to decompress the entire stream in a single call (this is slightly faster).
// MZ_FINISH implies that there are no more source bytes available beside what's already in the input buffer, and that the output buffer is large enough to hold the rest of the decompressed data.
// Return values:
// MZ_OK on success. Either more input is needed but not available, and/or there's more output to be written but the output buffer is full.
// MZ_STREAM_END if all needed input has been consumed and all output bytes have been written. For zlib streams, the adler-32 of the decompressed data has also been verified.
// MZ_STREAM_ERROR if the stream is bogus.
// MZ_DATA_ERROR if the deflate stream is invalid.
// MZ_PARAM_ERROR if one of the parameters is invalid.
// MZ_BUF_ERROR if no forward progress is possible because the input buffer is empty but the inflater needs more input to continue, or if the output buffer is not large enough. Call mz_inflate() again
// with more input data, or with more room in the output buffer (except when using single call decompression, described above).
int mz_inflate(mz_streamp pStream, int flush);
// Deinitializes a decompressor.
int mz_inflateEnd(mz_streamp pStream);
// Single-call decompression.
// Returns MZ_OK on success, or one of the error codes from mz_inflate() on failure.
int mz_uncompress(unsigned char *pDest, mz_ulong *pDest_len, const unsigned char *pSource, mz_ulong source_len);
// Returns a string description of the specified error code, or NULL if the error code is invalid.
const char *mz_error(int err);
// Redefine zlib-compatible names to miniz equivalents, so miniz.c can be used as a drop-in replacement for the subset of zlib that miniz.c supports.
// Define MINIZ_NO_ZLIB_COMPATIBLE_NAMES to disable zlib-compatibility if you use zlib in the same project.
#ifndef MINIZ_NO_ZLIB_COMPATIBLE_NAMES
typedef unsigned char Byte;
typedef unsigned int uInt;
typedef mz_ulong uLong;
typedef Byte Bytef;
typedef uInt uIntf;
typedef char charf;
typedef int intf;
typedef void *voidpf;
typedef uLong uLongf;
typedef void *voidp;
typedef void *const voidpc;
#define Z_NULL 0
#define Z_NO_FLUSH MZ_NO_FLUSH
#define Z_PARTIAL_FLUSH MZ_PARTIAL_FLUSH
#define Z_SYNC_FLUSH MZ_SYNC_FLUSH
#define Z_FULL_FLUSH MZ_FULL_FLUSH
#define Z_FINISH MZ_FINISH
#define Z_BLOCK MZ_BLOCK
#define Z_OK MZ_OK
#define Z_STREAM_END MZ_STREAM_END
#define Z_NEED_DICT MZ_NEED_DICT
#define Z_ERRNO MZ_ERRNO
#define Z_STREAM_ERROR MZ_STREAM_ERROR
#define Z_DATA_ERROR MZ_DATA_ERROR
#define Z_MEM_ERROR MZ_MEM_ERROR
#define Z_BUF_ERROR MZ_BUF_ERROR
#define Z_VERSION_ERROR MZ_VERSION_ERROR
#define Z_PARAM_ERROR MZ_PARAM_ERROR
#define Z_NO_COMPRESSION MZ_NO_COMPRESSION
#define Z_BEST_SPEED MZ_BEST_SPEED
#define Z_BEST_COMPRESSION MZ_BEST_COMPRESSION
#define Z_DEFAULT_COMPRESSION MZ_DEFAULT_COMPRESSION
#define Z_DEFAULT_STRATEGY MZ_DEFAULT_STRATEGY
#define Z_FILTERED MZ_FILTERED
#define Z_HUFFMAN_ONLY MZ_HUFFMAN_ONLY
#define Z_RLE MZ_RLE
#define Z_FIXED MZ_FIXED
#define Z_DEFLATED MZ_DEFLATED
#define Z_DEFAULT_WINDOW_BITS MZ_DEFAULT_WINDOW_BITS
#define alloc_func mz_alloc_func
#define free_func mz_free_func
#define internal_state mz_internal_state
#define z_stream mz_stream
#define deflateInit mz_deflateInit
#define deflateInit2 mz_deflateInit2
#define deflateReset mz_deflateReset
#define deflate mz_deflate
#define deflateEnd mz_deflateEnd
#define deflateBound mz_deflateBound
#define compress mz_compress
#define compress2 mz_compress2
#define compressBound mz_compressBound
#define inflateInit mz_inflateInit
#define inflateInit2 mz_inflateInit2
#define inflate mz_inflate
#define inflateEnd mz_inflateEnd
#define uncompress mz_uncompress
#define crc32 mz_crc32
#define adler32 mz_adler32
#define MAX_WBITS 15
#define MAX_MEM_LEVEL 9
#define zError mz_error
#define ZLIB_VERSION MZ_VERSION
#define ZLIB_VERNUM MZ_VERNUM
#define ZLIB_VER_MAJOR MZ_VER_MAJOR
#define ZLIB_VER_MINOR MZ_VER_MINOR
#define ZLIB_VER_REVISION MZ_VER_REVISION
#define ZLIB_VER_SUBREVISION MZ_VER_SUBREVISION
#define zlibVersion mz_version
#define zlib_version mz_version()
#endif // #ifndef MINIZ_NO_ZLIB_COMPATIBLE_NAMES
#endif // MINIZ_NO_ZLIB_APIS
// ------------------- Types and macros
typedef unsigned char mz_uint8;
typedef signed short mz_int16;
typedef unsigned short mz_uint16;
typedef unsigned int mz_uint32;
typedef unsigned int mz_uint;
typedef long long mz_int64;
typedef unsigned long long mz_uint64;
typedef int mz_bool;
#define MZ_FALSE (0)
#define MZ_TRUE (1)
// An attempt to work around MSVC's spammy "warning C4127: conditional expression is constant" message.
#ifdef _MSC_VER
#define MZ_MACRO_END while (0, 0)
#else
#define MZ_MACRO_END while (0)
#endif
// ------------------- ZIP archive reading/writing
#ifndef MINIZ_NO_ARCHIVE_APIS
enum {
MZ_ZIP_MAX_IO_BUF_SIZE = 64 * 1024,
MZ_ZIP_MAX_ARCHIVE_FILENAME_SIZE = 260,
MZ_ZIP_MAX_ARCHIVE_FILE_COMMENT_SIZE = 256
};
typedef struct {
mz_uint32 m_file_index;
mz_uint32 m_central_dir_ofs;
mz_uint16 m_version_made_by;
mz_uint16 m_version_needed;
mz_uint16 m_bit_flag;
mz_uint16 m_method;
#ifndef MINIZ_NO_TIME
time_t m_time;
#endif
mz_uint32 m_crc32;
mz_uint64 m_comp_size;
mz_uint64 m_uncomp_size;
mz_uint16 m_internal_attr;
mz_uint32 m_external_attr;
mz_uint64 m_local_header_ofs;
mz_uint32 m_comment_size;
char m_filename[MZ_ZIP_MAX_ARCHIVE_FILENAME_SIZE];
char m_comment[MZ_ZIP_MAX_ARCHIVE_FILE_COMMENT_SIZE];
} mz_zip_archive_file_stat;
typedef size_t (*mz_file_read_func)(void *pOpaque, mz_uint64 file_ofs, void *pBuf, size_t n);
typedef size_t (*mz_file_write_func)(void *pOpaque, mz_uint64 file_ofs, const void *pBuf, size_t n);
struct mz_zip_internal_state_tag;
typedef struct mz_zip_internal_state_tag mz_zip_internal_state;
typedef enum {
MZ_ZIP_MODE_INVALID = 0,
MZ_ZIP_MODE_READING = 1,
MZ_ZIP_MODE_WRITING = 2,
MZ_ZIP_MODE_WRITING_HAS_BEEN_FINALIZED = 3
} mz_zip_mode;
typedef struct mz_zip_archive_tag {
mz_uint64 m_archive_size;
mz_uint64 m_central_directory_file_ofs;
mz_uint m_total_files;
mz_zip_mode m_zip_mode;
mz_uint m_file_offset_alignment;
mz_alloc_func m_pAlloc;
mz_free_func m_pFree;
mz_realloc_func m_pRealloc;
void *m_pAlloc_opaque;
mz_file_read_func m_pRead;
mz_file_write_func m_pWrite;
void *m_pIO_opaque;
mz_zip_internal_state *m_pState;
} mz_zip_archive;
typedef enum {
MZ_ZIP_FLAG_CASE_SENSITIVE = 0x0100,
MZ_ZIP_FLAG_IGNORE_PATH = 0x0200,
MZ_ZIP_FLAG_COMPRESSED_DATA = 0x0400,
MZ_ZIP_FLAG_DO_NOT_SORT_CENTRAL_DIRECTORY = 0x0800
} mz_zip_flags;
// ZIP archive reading
// Inits a ZIP archive reader.
// These functions read and validate the archive's central directory.
mz_bool mz_zip_reader_init(mz_zip_archive *pZip, mz_uint64 size, mz_uint32 flags);
mz_bool mz_zip_reader_init_mem(mz_zip_archive *pZip, const void *pMem, size_t size, mz_uint32 flags);
#ifndef MINIZ_NO_STDIO
mz_bool mz_zip_reader_init_file(mz_zip_archive *pZip, const char *pFilename, mz_uint32 flags);
#endif
// Returns the total number of files in the archive.
mz_uint mz_zip_reader_get_num_files(mz_zip_archive *pZip);
// Returns detailed information about an archive file entry.
mz_bool mz_zip_reader_file_stat(mz_zip_archive *pZip, mz_uint file_index, mz_zip_archive_file_stat *pStat);
// Determines if an archive file entry is a directory entry.
mz_bool mz_zip_reader_is_file_a_directory(mz_zip_archive *pZip, mz_uint file_index);
mz_bool mz_zip_reader_is_file_encrypted(mz_zip_archive *pZip, mz_uint file_index);
// Retrieves the filename of an archive file entry.
// Returns the number of bytes written to pFilename, or if filename_buf_size is 0 this function returns the number of bytes needed to fully store the filename.
mz_uint mz_zip_reader_get_filename(mz_zip_archive *pZip, mz_uint file_index, char *pFilename, mz_uint filename_buf_size);
// Attempts to locates a file in the archive's central directory.
// Valid flags: MZ_ZIP_FLAG_CASE_SENSITIVE, MZ_ZIP_FLAG_IGNORE_PATH
// Returns -1 if the file cannot be found.
int mz_zip_reader_locate_file(mz_zip_archive *pZip, const char *pName, const char *pComment, mz_uint flags);
// Extracts a archive file to a memory buffer using no memory allocation.
mz_bool mz_zip_reader_extract_to_mem_no_alloc(mz_zip_archive *pZip, mz_uint file_index, void *pBuf, size_t buf_size, mz_uint flags, void *pUser_read_buf, size_t user_read_buf_size);
mz_bool mz_zip_reader_extract_file_to_mem_no_alloc(mz_zip_archive *pZip, const char *pFilename, void *pBuf, size_t buf_size, mz_uint flags, void *pUser_read_buf, size_t user_read_buf_size);
// Extracts a archive file to a memory buffer.
mz_bool mz_zip_reader_extract_to_mem(mz_zip_archive *pZip, mz_uint file_index, void *pBuf, size_t buf_size, mz_uint flags);
mz_bool mz_zip_reader_extract_file_to_mem(mz_zip_archive *pZip, const char *pFilename, void *pBuf, size_t buf_size, mz_uint flags);
// Extracts a archive file to a dynamically allocated heap buffer.
void *mz_zip_reader_extract_to_heap(mz_zip_archive *pZip, mz_uint file_index, size_t *pSize, mz_uint flags);
void *mz_zip_reader_extract_file_to_heap(mz_zip_archive *pZip, const char *pFilename, size_t *pSize, mz_uint flags);
// Extracts a archive file using a callback function to output the file's data.
mz_bool mz_zip_reader_extract_to_callback(mz_zip_archive *pZip, mz_uint file_index, mz_file_write_func pCallback, void *pOpaque, mz_uint flags);
mz_bool mz_zip_reader_extract_file_to_callback(mz_zip_archive *pZip, const char *pFilename, mz_file_write_func pCallback, void *pOpaque, mz_uint flags);
#ifndef MINIZ_NO_STDIO
// Extracts a archive file to a disk file and sets its last accessed and modified times.
// This function only extracts files, not archive directory records.
mz_bool mz_zip_reader_extract_to_file(mz_zip_archive *pZip, mz_uint file_index, const char *pDst_filename, mz_uint flags);
mz_bool mz_zip_reader_extract_file_to_file(mz_zip_archive *pZip, const char *pArchive_filename, const char *pDst_filename, mz_uint flags);
#endif
// Ends archive reading, freeing all allocations, and closing the input archive file if mz_zip_reader_init_file() was used.
mz_bool mz_zip_reader_end(mz_zip_archive *pZip);
// ZIP archive writing
#ifndef MINIZ_NO_ARCHIVE_WRITING_APIS
// Inits a ZIP archive writer.
mz_bool mz_zip_writer_init(mz_zip_archive *pZip, mz_uint64 existing_size);
mz_bool mz_zip_writer_init_heap(mz_zip_archive *pZip, size_t size_to_reserve_at_beginning, size_t initial_allocation_size);
#ifndef MINIZ_NO_STDIO
mz_bool mz_zip_writer_init_file(mz_zip_archive *pZip, const char *pFilename, mz_uint64 size_to_reserve_at_beginning);
#endif
// Converts a ZIP archive reader object into a writer object, to allow efficient in-place file appends to occur on an existing archive.
// For archives opened using mz_zip_reader_init_file, pFilename must be the archive's filename so it can be reopened for writing. If the file can't be reopened, mz_zip_reader_end() will be called.
// For archives opened using mz_zip_reader_init_mem, the memory block must be growable using the realloc callback (which defaults to realloc unless you've overridden it).
// Finally, for archives opened using mz_zip_reader_init, the mz_zip_archive's user provided m_pWrite function cannot be NULL.
// Note: In-place archive modification is not recommended unless you know what you're doing, because if execution stops or something goes wrong before
// the archive is finalized the file's central directory will be hosed.
mz_bool mz_zip_writer_init_from_reader(mz_zip_archive *pZip, const char *pFilename);
// Adds the contents of a memory buffer to an archive. These functions record the current local time into the archive.
// To add a directory entry, call this method with an archive name ending in a forwardslash with empty buffer.
// level_and_flags - compression level (0-10, see MZ_BEST_SPEED, MZ_BEST_COMPRESSION, etc.) logically OR'd with zero or more mz_zip_flags, or just set to MZ_DEFAULT_COMPRESSION.
mz_bool mz_zip_writer_add_mem(mz_zip_archive *pZip, const char *pArchive_name, const void *pBuf, size_t buf_size, mz_uint level_and_flags);
mz_bool mz_zip_writer_add_mem_ex(mz_zip_archive *pZip, const char *pArchive_name, const void *pBuf, size_t buf_size, const void *pComment, mz_uint16 comment_size, mz_uint level_and_flags, mz_uint64 uncomp_size, mz_uint32 uncomp_crc32);
#ifndef MINIZ_NO_STDIO
// Adds the contents of a disk file to an archive. This function also records the disk file's modified time into the archive.
// level_and_flags - compression level (0-10, see MZ_BEST_SPEED, MZ_BEST_COMPRESSION, etc.) logically OR'd with zero or more mz_zip_flags, or just set to MZ_DEFAULT_COMPRESSION.
mz_bool mz_zip_writer_add_file(mz_zip_archive *pZip, const char *pArchive_name, const char *pSrc_filename, const void *pComment, mz_uint16 comment_size, mz_uint level_and_flags);
#endif
// Adds a file to an archive by fully cloning the data from another archive.
// This function fully clones the source file's compressed data (no recompression), along with its full filename, extra data, and comment fields.
mz_bool mz_zip_writer_add_from_zip_reader(mz_zip_archive *pZip, mz_zip_archive *pSource_zip, mz_uint file_index);
// Finalizes the archive by writing the central directory records followed by the end of central directory record.
// After an archive is finalized, the only valid call on the mz_zip_archive struct is mz_zip_writer_end().
// An archive must be manually finalized by calling this function for it to be valid.
mz_bool mz_zip_writer_finalize_archive(mz_zip_archive *pZip);
mz_bool mz_zip_writer_finalize_heap_archive(mz_zip_archive *pZip, void **pBuf, size_t *pSize);
// Ends archive writing, freeing all allocations, and closing the output file if mz_zip_writer_init_file() was used.
// Note for the archive to be valid, it must have been finalized before ending.
mz_bool mz_zip_writer_end(mz_zip_archive *pZip);
// Misc. high-level helper functions:
// mz_zip_add_mem_to_archive_file_in_place() efficiently (but not atomically) appends a memory blob to a ZIP archive.
// level_and_flags - compression level (0-10, see MZ_BEST_SPEED, MZ_BEST_COMPRESSION, etc.) logically OR'd with zero or more mz_zip_flags, or just set to MZ_DEFAULT_COMPRESSION.
mz_bool mz_zip_add_mem_to_archive_file_in_place(const char *pZip_filename, const char *pArchive_name, const void *pBuf, size_t buf_size, const void *pComment, mz_uint16 comment_size, mz_uint level_and_flags);
// Reads a single file from an archive into a heap block.
// Returns NULL on failure.
void *mz_zip_extract_archive_file_to_heap(const char *pZip_filename, const char *pArchive_name, size_t *pSize, mz_uint zip_flags);
#endif // #ifndef MINIZ_NO_ARCHIVE_WRITING_APIS
#endif // #ifndef MINIZ_NO_ARCHIVE_APIS
// ------------------- Low-level Decompression API Definitions
// Decompression flags used by tinfl_decompress().
// TINFL_FLAG_PARSE_ZLIB_HEADER: If set, the input has a valid zlib header and ends with an adler32 checksum (it's a valid zlib stream). Otherwise, the input is a raw deflate stream.
// TINFL_FLAG_HAS_MORE_INPUT: If set, there are more input bytes available beyond the end of the supplied input buffer. If clear, the input buffer contains all remaining input.
// TINFL_FLAG_USING_NON_WRAPPING_OUTPUT_BUF: If set, the output buffer is large enough to hold the entire decompressed stream. If clear, the output buffer is at least the size of the dictionary (typically 32KB).
// TINFL_FLAG_COMPUTE_ADLER32: Force adler-32 checksum computation of the decompressed bytes.
enum {
TINFL_FLAG_PARSE_ZLIB_HEADER = 1,
TINFL_FLAG_HAS_MORE_INPUT = 2,
TINFL_FLAG_USING_NON_WRAPPING_OUTPUT_BUF = 4,
TINFL_FLAG_COMPUTE_ADLER32 = 8
};
// High level decompression functions:
// tinfl_decompress_mem_to_heap() decompresses a block in memory to a heap block allocated via malloc().
// On entry:
// pSrc_buf, src_buf_len: Pointer and size of the Deflate or zlib source data to decompress.
// On return:
// Function returns a pointer to the decompressed data, or NULL on failure.
// *pOut_len will be set to the decompressed data's size, which could be larger than src_buf_len on uncompressible data.
// The caller must call mz_free() on the returned block when it's no longer needed.
void *tinfl_decompress_mem_to_heap(const void *pSrc_buf, size_t src_buf_len, size_t *pOut_len, int flags);
// tinfl_decompress_mem_to_mem() decompresses a block in memory to another block in memory.
// Returns TINFL_DECOMPRESS_MEM_TO_MEM_FAILED on failure, or the number of bytes written on success.
#define TINFL_DECOMPRESS_MEM_TO_MEM_FAILED ((size_t)(-1))
size_t tinfl_decompress_mem_to_mem(void *pOut_buf, size_t out_buf_len, const void *pSrc_buf, size_t src_buf_len, int flags);
// tinfl_decompress_mem_to_callback() decompresses a block in memory to an internal 32KB buffer, and a user provided callback function will be called to flush the buffer.
// Returns 1 on success or 0 on failure.
typedef int (*tinfl_put_buf_func_ptr)(const void *pBuf, int len, void *pUser);
int tinfl_decompress_mem_to_callback(const void *pIn_buf, size_t *pIn_buf_size, tinfl_put_buf_func_ptr pPut_buf_func, void *pPut_buf_user, int flags);
struct tinfl_decompressor_tag; typedef struct tinfl_decompressor_tag tinfl_decompressor;
// Max size of LZ dictionary.
#define TINFL_LZ_DICT_SIZE 32768
// Return status.
typedef enum {
TINFL_STATUS_BAD_PARAM = -3,
TINFL_STATUS_ADLER32_MISMATCH = -2,
TINFL_STATUS_FAILED = -1,
TINFL_STATUS_DONE = 0,
TINFL_STATUS_NEEDS_MORE_INPUT = 1,
TINFL_STATUS_HAS_MORE_OUTPUT = 2
} tinfl_status;
// Initializes the decompressor to its initial state.
#define tinfl_init(r) do { (r)->m_state = 0; } MZ_MACRO_END
#define tinfl_get_adler32(r) (r)->m_check_adler32
// Main low-level decompressor coroutine function. This is the only function actually needed for decompression. All the other functions are just high-level helpers for improved usability.
// This is a universal API, i.e. it can be used as a building block to build any desired higher level decompression API. In the limit case, it can be called once per every byte input or output.
tinfl_status tinfl_decompress(tinfl_decompressor *r, const mz_uint8 *pIn_buf_next, size_t *pIn_buf_size, mz_uint8 *pOut_buf_start, mz_uint8 *pOut_buf_next, size_t *pOut_buf_size, const mz_uint32 decomp_flags);
// Internal/private bits follow.
enum {
TINFL_MAX_HUFF_TABLES = 3, TINFL_MAX_HUFF_SYMBOLS_0 = 288, TINFL_MAX_HUFF_SYMBOLS_1 = 32, TINFL_MAX_HUFF_SYMBOLS_2 = 19,
TINFL_FAST_LOOKUP_BITS = 10, TINFL_FAST_LOOKUP_SIZE = 1 << TINFL_FAST_LOOKUP_BITS
};
typedef struct {
mz_uint8 m_code_size[TINFL_MAX_HUFF_SYMBOLS_0];
mz_int16 m_look_up[TINFL_FAST_LOOKUP_SIZE], m_tree[TINFL_MAX_HUFF_SYMBOLS_0 * 2];
} tinfl_huff_table;
#if MINIZ_HAS_64BIT_REGISTERS
#define TINFL_USE_64BIT_BITBUF 1
#endif
#if TINFL_USE_64BIT_BITBUF
typedef mz_uint64 tinfl_bit_buf_t;
#define TINFL_BITBUF_SIZE (64)
#else
typedef mz_uint32 tinfl_bit_buf_t;
#define TINFL_BITBUF_SIZE (32)
#endif
struct tinfl_decompressor_tag {
mz_uint32 m_state, m_num_bits, m_zhdr0, m_zhdr1, m_z_adler32, m_final, m_type, m_check_adler32, m_dist, m_counter, m_num_extra, m_table_sizes[TINFL_MAX_HUFF_TABLES];
tinfl_bit_buf_t m_bit_buf;
size_t m_dist_from_out_buf_start;
tinfl_huff_table m_tables[TINFL_MAX_HUFF_TABLES];
mz_uint8 m_raw_header[4], m_len_codes[TINFL_MAX_HUFF_SYMBOLS_0 + TINFL_MAX_HUFF_SYMBOLS_1 + 137];
};
// ------------------- Low-level Compression API Definitions
// Set TDEFL_LESS_MEMORY to 1 to use less memory (compression will be slightly slower, and raw/dynamic blocks will be output more frequently).
#define TDEFL_LESS_MEMORY 1
// tdefl_init() compression flags logically OR'd together (low 12 bits contain the max. number of probes per dictionary search):
// TDEFL_DEFAULT_MAX_PROBES: The compressor defaults to 128 dictionary probes per dictionary search. 0=Huffman only, 1=Huffman+LZ (fastest/crap compression), 4095=Huffman+LZ (slowest/best compression).
enum {
TDEFL_HUFFMAN_ONLY = 0, TDEFL_DEFAULT_MAX_PROBES = 128, TDEFL_MAX_PROBES_MASK = 0xFFF
};
// TDEFL_WRITE_ZLIB_HEADER: If set, the compressor outputs a zlib header before the deflate data, and the Adler-32 of the source data at the end. Otherwise, you'll get raw deflate data.
// TDEFL_COMPUTE_ADLER32: Always compute the adler-32 of the input data (even when not writing zlib headers).
// TDEFL_GREEDY_PARSING_FLAG: Set to use faster greedy parsing, instead of more efficient lazy parsing.
// TDEFL_NONDETERMINISTIC_PARSING_FLAG: Enable to decrease the compressor's initialization time to the minimum, but the output may vary from run to run given the same input (depending on the contents of memory).
// TDEFL_RLE_MATCHES: Only look for RLE matches (matches with a distance of 1)
// TDEFL_FILTER_MATCHES: Discards matches <= 5 chars if enabled.
// TDEFL_FORCE_ALL_STATIC_BLOCKS: Disable usage of optimized Huffman tables.
// TDEFL_FORCE_ALL_RAW_BLOCKS: Only use raw (uncompressed) deflate blocks.
// The low 12 bits are reserved to control the max # of hash probes per dictionary lookup (see TDEFL_MAX_PROBES_MASK).
enum {
TDEFL_WRITE_ZLIB_HEADER = 0x01000,
TDEFL_COMPUTE_ADLER32 = 0x02000,
TDEFL_GREEDY_PARSING_FLAG = 0x04000,
TDEFL_NONDETERMINISTIC_PARSING_FLAG = 0x08000,
TDEFL_RLE_MATCHES = 0x10000,
TDEFL_FILTER_MATCHES = 0x20000,
TDEFL_FORCE_ALL_STATIC_BLOCKS = 0x40000,
TDEFL_FORCE_ALL_RAW_BLOCKS = 0x80000
};
// High level compression functions:
// tdefl_compress_mem_to_heap() compresses a block in memory to a heap block allocated via malloc().
// On entry:
// pSrc_buf, src_buf_len: Pointer and size of source block to compress.
// flags: The max match finder probes (default is 128) logically OR'd against the above flags. Higher probes are slower but improve compression.
// On return:
// Function returns a pointer to the compressed data, or NULL on failure.
// *pOut_len will be set to the compressed data's size, which could be larger than src_buf_len on uncompressible data.
// The caller must free() the returned block when it's no longer needed.
void *tdefl_compress_mem_to_heap(const void *pSrc_buf, size_t src_buf_len, size_t *pOut_len, int flags);
// tdefl_compress_mem_to_mem() compresses a block in memory to another block in memory.
// Returns 0 on failure.
size_t tdefl_compress_mem_to_mem(void *pOut_buf, size_t out_buf_len, const void *pSrc_buf, size_t src_buf_len, int flags);
// Compresses an image to a compressed PNG file in memory.
// On entry:
// pImage, w, h, and num_chans describe the image to compress. num_chans may be 1, 2, 3, or 4.
// The image pitch in bytes per scanline will be w*num_chans. The leftmost pixel on the top scanline is stored first in memory.
// level may range from [0,10], use MZ_NO_COMPRESSION, MZ_BEST_SPEED, MZ_BEST_COMPRESSION, etc. or a decent default is MZ_DEFAULT_LEVEL
// If flip is true, the image will be flipped on the Y axis (useful for OpenGL apps).
// On return:
// Function returns a pointer to the compressed data, or NULL on failure.
// *pLen_out will be set to the size of the PNG image file.
// The caller must mz_free() the returned heap block (which will typically be larger than *pLen_out) when it's no longer needed.
void *tdefl_write_image_to_png_file_in_memory_ex(const void *pImage, int w, int h, int num_chans, size_t *pLen_out, mz_uint level, mz_bool flip);
void *tdefl_write_image_to_png_file_in_memory(const void *pImage, int w, int h, int num_chans, size_t *pLen_out);
// Output stream interface. The compressor uses this interface to write compressed data. It'll typically be called TDEFL_OUT_BUF_SIZE at a time.
typedef mz_bool (*tdefl_put_buf_func_ptr)(const void *pBuf, int len, void *pUser);
// tdefl_compress_mem_to_output() compresses a block to an output stream. The above helpers use this function internally.
mz_bool tdefl_compress_mem_to_output(const void *pBuf, size_t buf_len, tdefl_put_buf_func_ptr pPut_buf_func, void *pPut_buf_user, int flags);
enum { TDEFL_MAX_HUFF_TABLES = 3, TDEFL_MAX_HUFF_SYMBOLS_0 = 288, TDEFL_MAX_HUFF_SYMBOLS_1 = 32, TDEFL_MAX_HUFF_SYMBOLS_2 = 19, TDEFL_LZ_DICT_SIZE = 32768, TDEFL_LZ_DICT_SIZE_MASK = TDEFL_LZ_DICT_SIZE - 1, TDEFL_MIN_MATCH_LEN = 3, TDEFL_MAX_MATCH_LEN = 258 };
// TDEFL_OUT_BUF_SIZE MUST be large enough to hold a single entire compressed output block (using static/fixed Huffman codes).
#if TDEFL_LESS_MEMORY
enum { TDEFL_LZ_CODE_BUF_SIZE = 24 * 1024, TDEFL_OUT_BUF_SIZE = (TDEFL_LZ_CODE_BUF_SIZE * 13 ) / 10, TDEFL_MAX_HUFF_SYMBOLS = 288, TDEFL_LZ_HASH_BITS = 12, TDEFL_LEVEL1_HASH_SIZE_MASK = 4095, TDEFL_LZ_HASH_SHIFT = (TDEFL_LZ_HASH_BITS + 2) / 3, TDEFL_LZ_HASH_SIZE = 1 << TDEFL_LZ_HASH_BITS };
#else
enum { TDEFL_LZ_CODE_BUF_SIZE = 64 * 1024, TDEFL_OUT_BUF_SIZE = (TDEFL_LZ_CODE_BUF_SIZE * 13 ) / 10, TDEFL_MAX_HUFF_SYMBOLS = 288, TDEFL_LZ_HASH_BITS = 15, TDEFL_LEVEL1_HASH_SIZE_MASK = 4095, TDEFL_LZ_HASH_SHIFT = (TDEFL_LZ_HASH_BITS + 2) / 3, TDEFL_LZ_HASH_SIZE = 1 << TDEFL_LZ_HASH_BITS };
#endif
// The low-level tdefl functions below may be used directly if the above helper functions aren't flexible enough. The low-level functions don't make any heap allocations, unlike the above helper functions.
typedef enum {
TDEFL_STATUS_BAD_PARAM = -2,
TDEFL_STATUS_PUT_BUF_FAILED = -1,
TDEFL_STATUS_OKAY = 0,
TDEFL_STATUS_DONE = 1,
} tdefl_status;
// Must map to MZ_NO_FLUSH, MZ_SYNC_FLUSH, etc. enums
typedef enum {
TDEFL_NO_FLUSH = 0,
TDEFL_SYNC_FLUSH = 2,
TDEFL_FULL_FLUSH = 3,
TDEFL_FINISH = 4
} tdefl_flush;
// tdefl's compression state structure.
typedef struct {
tdefl_put_buf_func_ptr m_pPut_buf_func;
void *m_pPut_buf_user;
mz_uint m_flags, m_max_probes[2];
int m_greedy_parsing;
mz_uint m_adler32, m_lookahead_pos, m_lookahead_size, m_dict_size;
mz_uint8 *m_pLZ_code_buf, *m_pLZ_flags, *m_pOutput_buf, *m_pOutput_buf_end;
mz_uint m_num_flags_left, m_total_lz_bytes, m_lz_code_buf_dict_pos, m_bits_in, m_bit_buffer;
mz_uint m_saved_match_dist, m_saved_match_len, m_saved_lit, m_output_flush_ofs, m_output_flush_remaining, m_finished, m_block_index, m_wants_to_finish;
tdefl_status m_prev_return_status;
const void *m_pIn_buf;
void *m_pOut_buf;
size_t *m_pIn_buf_size, *m_pOut_buf_size;
tdefl_flush m_flush;
const mz_uint8 *m_pSrc;
size_t m_src_buf_left, m_out_buf_ofs;
mz_uint8 m_dict[TDEFL_LZ_DICT_SIZE + TDEFL_MAX_MATCH_LEN - 1];
mz_uint16 m_huff_count[TDEFL_MAX_HUFF_TABLES][TDEFL_MAX_HUFF_SYMBOLS];
mz_uint16 m_huff_codes[TDEFL_MAX_HUFF_TABLES][TDEFL_MAX_HUFF_SYMBOLS];
mz_uint8 m_huff_code_sizes[TDEFL_MAX_HUFF_TABLES][TDEFL_MAX_HUFF_SYMBOLS];
mz_uint8 m_lz_code_buf[TDEFL_LZ_CODE_BUF_SIZE];
mz_uint16 m_next[TDEFL_LZ_DICT_SIZE];
mz_uint16 m_hash[TDEFL_LZ_HASH_SIZE];
mz_uint8 m_output_buf[TDEFL_OUT_BUF_SIZE];
} tdefl_compressor;
// Initializes the compressor.
// There is no corresponding deinit() function because the tdefl API's do not dynamically allocate memory.
// pBut_buf_func: If **not** NULL, output data will be supplied to the specified callback. In this case, the user should call the tdefl_compress_buffer() API for compression.
// If pBut_buf_func is NULL the user should always call the tdefl_compress() API.
// flags: See the above enums (TDEFL_HUFFMAN_ONLY, TDEFL_WRITE_ZLIB_HEADER, etc.)
tdefl_status tdefl_init(tdefl_compressor *d, tdefl_put_buf_func_ptr pPut_buf_func, void *pPut_buf_user, int flags);
// Compresses a block of data, consuming as much of the specified input buffer as possible, and writing as much compressed data to the specified output buffer as possible.
tdefl_status tdefl_compress(tdefl_compressor *d, const void *pIn_buf, size_t *pIn_buf_size, void *pOut_buf, size_t *pOut_buf_size, tdefl_flush flush);
// tdefl_compress_buffer() is only usable when the tdefl_init() is called with a non-NULL tdefl_put_buf_func_ptr.
// tdefl_compress_buffer() always consumes the entire input buffer.
tdefl_status tdefl_compress_buffer(tdefl_compressor *d, const void *pIn_buf, size_t in_buf_size, tdefl_flush flush);
tdefl_status tdefl_get_prev_return_status(tdefl_compressor *d);
mz_uint32 tdefl_get_adler32(tdefl_compressor *d);
// Can't use tdefl_create_comp_flags_from_zip_params if MINIZ_NO_ZLIB_APIS isn't defined, because it uses some of its macros.
#ifndef MINIZ_NO_ZLIB_APIS
// Create tdefl_compress() flags given zlib-style compression parameters.
// level may range from [0,10] (where 10 is absolute max compression, but may be much slower on some files)
// window_bits may be -15 (raw deflate) or 15 (zlib)
// strategy may be either MZ_DEFAULT_STRATEGY, MZ_FILTERED, MZ_HUFFMAN_ONLY, MZ_RLE, or MZ_FIXED
mz_uint tdefl_create_comp_flags_from_zip_params(int level, int window_bits, int strategy);
#endif // #ifndef MINIZ_NO_ZLIB_APIS
#ifdef __cplusplus
}
#endif
#endif // MINIZ_HEADER_INCLUDED

86
tools/sdk/esp32/include/esp_rom/include/esp32c3/rom/rom_layout.h Normal file
View File

@ -0,0 +1,86 @@
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#pragma once
#include <stdint.h>
#ifdef __cplusplus
extern "C" {
#endif
#define SUPPORT_BTDM 1
#define SUPPORT_WIFI 1
/* Structure and functions for returning ROM global layout
*
* This is for address symbols defined in the linker script, which may change during ECOs.
*/
typedef struct {
void *dram0_stack_shared_mem_start;
void *dram0_rtos_reserved_start;
void *stack_sentry;
void *stack;
void *stack_sentry_app;
void *stack_app;
/* BTDM data */
void *data_start_btdm;
void *data_end_btdm;
void *bss_start_btdm;
void *bss_end_btdm;
void *data_start_btdm_rom;
void *data_end_btdm_rom;
void *data_start_interface_btdm;
void *data_end_interface_btdm;
void *bss_start_interface_btdm;
void *bss_end_interface_btdm;
/* Other DRAM ranges */
#if SUPPORT_BTDM || SUPPORT_WIFI
void *dram_start_phyrom;
void *dram_end_phyrom;
#endif
#if SUPPORT_WIFI
void *dram_start_coexist;
void *dram_end_coexist;
void *dram_start_net80211;
void *dram_end_net80211;
void *dram_start_pp;
void *dram_end_pp;
void *data_start_interface_coexist;
void *data_end_interface_coexist;
void *bss_start_interface_coexist;
void *bss_end_interface_coexist;
void *data_start_interface_net80211;
void *data_end_interface_net80211;
void *bss_start_interface_net80211;
void *bss_end_interface_net80211;
void *data_start_interface_pp;
void *data_end_interface_pp;
void *bss_start_interface_pp;
void *bss_end_interface_pp;
#endif
void *dram_start_usbdev_rom;
void *dram_end_usbdev_rom;
void *dram_start_uart_rom;
void *dram_end_uart_rom;
} ets_rom_layout_t;
extern const ets_rom_layout_t * const ets_rom_layout_p;
#ifdef __cplusplus
}
#endif

46
tools/sdk/esp32/include/esp_rom/include/esp32c3/rom/rsa_pss.h Normal file
View File

@ -0,0 +1,46 @@
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#ifndef _ROM_RSA_PSS_H_
#define _ROM_RSA_PSS_H_
#include <stdint.h>
#include <stdbool.h>
#include <stddef.h>
#ifdef __cplusplus
extern "C" {
#endif
#define ETS_SIG_LEN 384 /* Bytes */
#define ETS_DIGEST_LEN 32 /* SHA-256, bytes */
typedef struct {
uint8_t n[384]; /* Public key modulus */
uint32_t e; /* Public key exponent */
uint8_t rinv[384];
uint32_t mdash;
} ets_rsa_pubkey_t;
bool ets_rsa_pss_verify(const ets_rsa_pubkey_t *key, const uint8_t *sig, const uint8_t *digest, uint8_t *verified_digest);
void ets_mgf1_sha256(const uint8_t *mgfSeed, size_t seedLen, size_t maskLen, uint8_t *mask);
bool ets_emsa_pss_verify(const uint8_t *encoded_message, const uint8_t *mhash);
#ifdef __cplusplus
}
#endif
#endif

264
tools/sdk/esp32/include/esp_rom/include/esp32c3/rom/rtc.h Normal file
View File

@ -0,0 +1,264 @@
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#ifndef _ROM_RTC_H_
#define _ROM_RTC_H_
#include "ets_sys.h"
#include <stdbool.h>
#include <stdint.h>
#include "soc/soc.h"
#include "soc/rtc_cntl_reg.h"
#include "soc/reset_reasons.h"
#ifdef __cplusplus
extern "C" {
#endif
/** \defgroup rtc_apis, rtc registers and memory related apis
* @brief rtc apis
*/
/** @addtogroup rtc_apis
* @{
*/
/**************************************************************************************
* Note: *
* Some Rtc memory and registers are used, in ROM or in internal library. *
* Please do not use reserved or used rtc memory or registers. *
* *
*************************************************************************************
* RTC Memory & Store Register usage
*************************************************************************************
* rtc memory addr type size usage
* 0x3f421000(0x50000000) Slow SIZE_CP Co-Processor code/Reset Entry
* 0x3f421000+SIZE_CP Slow 8192-SIZE_CP
*
* 0x3ff80000(0x40070000) Fast 8192 deep sleep entry code
*
*************************************************************************************
* RTC store registers usage
* RTC_CNTL_STORE0_REG Reserved
* RTC_CNTL_STORE1_REG RTC_SLOW_CLK calibration value
* RTC_CNTL_STORE2_REG Boot time, low word
* RTC_CNTL_STORE3_REG Boot time, high word
* RTC_CNTL_STORE4_REG External XTAL frequency
* RTC_CNTL_STORE5_REG APB bus frequency
* RTC_CNTL_STORE6_REG FAST_RTC_MEMORY_ENTRY
* RTC_CNTL_STORE7_REG FAST_RTC_MEMORY_CRC
*************************************************************************************
*/
#define RTC_SLOW_CLK_CAL_REG RTC_CNTL_STORE1_REG
#define RTC_BOOT_TIME_LOW_REG RTC_CNTL_STORE2_REG
#define RTC_BOOT_TIME_HIGH_REG RTC_CNTL_STORE3_REG
#define RTC_XTAL_FREQ_REG RTC_CNTL_STORE4_REG
#define RTC_APB_FREQ_REG RTC_CNTL_STORE5_REG
#define RTC_ENTRY_ADDR_REG RTC_CNTL_STORE6_REG
#define RTC_RESET_CAUSE_REG RTC_CNTL_STORE6_REG
#define RTC_MEMORY_CRC_REG RTC_CNTL_STORE7_REG
#define RTC_DISABLE_ROM_LOG ((1 << 0) | (1 << 16)) //!< Disable logging from the ROM code.
typedef enum {
AWAKE = 0, //<CPU ON
LIGHT_SLEEP = BIT0, //CPU waiti, PLL ON. We don't need explicitly set this mode.
DEEP_SLEEP = BIT1 //CPU OFF, PLL OFF, only specific timer could wake up
} SLEEP_MODE;
typedef enum {
NO_MEAN = 0,
POWERON_RESET = 1, /**<1, Vbat power on reset*/
RTC_SW_SYS_RESET = 3, /**<3, Software reset digital core*/
DEEPSLEEP_RESET = 5, /**<5, Deep Sleep reset digital core*/
TG0WDT_SYS_RESET = 7, /**<7, Timer Group0 Watch dog reset digital core*/
TG1WDT_SYS_RESET = 8, /**<8, Timer Group1 Watch dog reset digital core*/
RTCWDT_SYS_RESET = 9, /**<9, RTC Watch dog Reset digital core*/
INTRUSION_RESET = 10, /**<10, Instrusion tested to reset CPU*/
TG0WDT_CPU_RESET = 11, /**<11, Time Group0 reset CPU*/
RTC_SW_CPU_RESET = 12, /**<12, Software reset CPU*/
RTCWDT_CPU_RESET = 13, /**<13, RTC Watch dog Reset CPU*/
RTCWDT_BROWN_OUT_RESET = 15, /**<15, Reset when the vdd voltage is not stable*/
RTCWDT_RTC_RESET = 16, /**<16, RTC Watch dog reset digital core and rtc module*/
TG1WDT_CPU_RESET = 17, /**<17, Time Group1 reset CPU*/
SUPER_WDT_RESET = 18, /**<18, super watchdog reset digital core and rtc module*/
GLITCH_RTC_RESET = 19, /**<19, glitch reset digital core and rtc module*/
EFUSE_RESET = 20, /**<20, efuse reset digital core*/
USB_UART_CHIP_RESET = 21, /**<21, usb uart reset digital core */
USB_JTAG_CHIP_RESET = 22, /**<22, usb jtag reset digital core */
POWER_GLITCH_RESET = 23, /**<23, power glitch reset digital core and rtc module*/
} RESET_REASON;
// Check if the reset reason defined in ROM is compatible with soc/reset_reasons.h
_Static_assert((soc_reset_reason_t)POWERON_RESET == RESET_REASON_CHIP_POWER_ON, "POWERON_RESET != RESET_REASON_CHIP_POWER_ON");
_Static_assert((soc_reset_reason_t)RTC_SW_SYS_RESET == RESET_REASON_CORE_SW, "RTC_SW_SYS_RESET != RESET_REASON_CORE_SW");
_Static_assert((soc_reset_reason_t)DEEPSLEEP_RESET == RESET_REASON_CORE_DEEP_SLEEP, "DEEPSLEEP_RESET != RESET_REASON_CORE_DEEP_SLEEP");
_Static_assert((soc_reset_reason_t)TG0WDT_SYS_RESET == RESET_REASON_CORE_MWDT0, "TG0WDT_SYS_RESET != RESET_REASON_CORE_MWDT0");
_Static_assert((soc_reset_reason_t)TG1WDT_SYS_RESET == RESET_REASON_CORE_MWDT1, "TG1WDT_SYS_RESET != RESET_REASON_CORE_MWDT1");
_Static_assert((soc_reset_reason_t)RTCWDT_SYS_RESET == RESET_REASON_CORE_RTC_WDT, "RTCWDT_SYS_RESET != RESET_REASON_CORE_RTC_WDT");
_Static_assert((soc_reset_reason_t)TG0WDT_CPU_RESET == RESET_REASON_CPU0_MWDT0, "TG0WDT_CPU_RESET != RESET_REASON_CPU0_MWDT0");
_Static_assert((soc_reset_reason_t)RTC_SW_CPU_RESET == RESET_REASON_CPU0_SW, "RTC_SW_CPU_RESET != RESET_REASON_CPU0_SW");
_Static_assert((soc_reset_reason_t)RTCWDT_CPU_RESET == RESET_REASON_CPU0_RTC_WDT, "RTCWDT_CPU_RESET != RESET_REASON_CPU0_RTC_WDT");
_Static_assert((soc_reset_reason_t)RTCWDT_BROWN_OUT_RESET == RESET_REASON_SYS_BROWN_OUT, "RTCWDT_BROWN_OUT_RESET != RESET_REASON_SYS_BROWN_OUT");
_Static_assert((soc_reset_reason_t)RTCWDT_RTC_RESET == RESET_REASON_SYS_RTC_WDT, "RTCWDT_RTC_RESET != RESET_REASON_SYS_RTC_WDT");
_Static_assert((soc_reset_reason_t)TG1WDT_CPU_RESET == RESET_REASON_CPU0_MWDT1, "TG1WDT_CPU_RESET != RESET_REASON_CPU0_MWDT1");
_Static_assert((soc_reset_reason_t)SUPER_WDT_RESET == RESET_REASON_SYS_SUPER_WDT, "SUPER_WDT_RESET != RESET_REASON_SYS_SUPER_WDT");
_Static_assert((soc_reset_reason_t)GLITCH_RTC_RESET == RESET_REASON_SYS_CLK_GLITCH, "GLITCH_RTC_RESET != RESET_REASON_SYS_CLK_GLITCH");
_Static_assert((soc_reset_reason_t)EFUSE_RESET == RESET_REASON_CORE_EFUSE_CRC, "EFUSE_RESET != RESET_REASON_CORE_EFUSE_CRC");
_Static_assert((soc_reset_reason_t)USB_UART_CHIP_RESET == RESET_REASON_CORE_USB_UART, "USB_UART_CHIP_RESET != RESET_REASON_CORE_USB_UART");
_Static_assert((soc_reset_reason_t)USB_JTAG_CHIP_RESET == RESET_REASON_CORE_USB_JTAG, "USB_JTAG_CHIP_RESET != RESET_REASON_CORE_USB_JTAG");
_Static_assert((soc_reset_reason_t)POWER_GLITCH_RESET == RESET_REASON_CORE_PWR_GLITCH, "POWER_GLITCH_RESET != RESET_REASON_CORE_PWR_GLITCH");
typedef enum {
NO_SLEEP = 0,
EXT_EVENT0_TRIG = BIT0,
EXT_EVENT1_TRIG = BIT1,
GPIO_TRIG = BIT2,
TIMER_EXPIRE = BIT3,
SDIO_TRIG = BIT4,
MAC_TRIG = BIT5,
UART0_TRIG = BIT6,
UART1_TRIG = BIT7,
TOUCH_TRIG = BIT8,
SAR_TRIG = BIT9,
BT_TRIG = BIT10,
RISCV_TRIG = BIT11,
XTAL_DEAD_TRIG = BIT12,
RISCV_TRAP_TRIG = BIT13,
USB_TRIG = BIT14
} WAKEUP_REASON;
typedef enum {
DISEN_WAKEUP = NO_SLEEP,
EXT_EVENT0_TRIG_EN = EXT_EVENT0_TRIG,
EXT_EVENT1_TRIG_EN = EXT_EVENT1_TRIG,
GPIO_TRIG_EN = GPIO_TRIG,
TIMER_EXPIRE_EN = TIMER_EXPIRE,
SDIO_TRIG_EN = SDIO_TRIG,
MAC_TRIG_EN = MAC_TRIG,
UART0_TRIG_EN = UART0_TRIG,
UART1_TRIG_EN = UART1_TRIG,
TOUCH_TRIG_EN = TOUCH_TRIG,
SAR_TRIG_EN = SAR_TRIG,
BT_TRIG_EN = BT_TRIG,
RISCV_TRIG_EN = RISCV_TRIG,
XTAL_DEAD_TRIG_EN = XTAL_DEAD_TRIG,
RISCV_TRAP_TRIG_EN = RISCV_TRAP_TRIG,
USB_TRIG_EN = USB_TRIG
} WAKEUP_ENABLE;
/**
* @brief Get the reset reason for CPU.
*
* @param int cpu_no : CPU no.
*
* @return RESET_REASON
*/
RESET_REASON rtc_get_reset_reason(int cpu_no);
/**
* @brief Get the wakeup cause for CPU.
*
* @param int cpu_no : CPU no.
*
* @return WAKEUP_REASON
*/
WAKEUP_REASON rtc_get_wakeup_cause(void);
/**
* @brief Get CRC for Fast RTC Memory.
*
* @param uint32_t start_addr : 0 - 0x7ff for Fast RTC Memory.
*
* @param uint32_t crc_len : 0 - 0x7ff, 0 for 4 byte, 0x7ff for 0x2000 byte.
*
* @return uint32_t : CRC32 result
*/
uint32_t calc_rtc_memory_crc(uint32_t start_addr, uint32_t crc_len);
/**
* @brief Suppress ROM log by setting specific RTC control register.
* @note This is not a permanent disable of ROM logging since the RTC register can not retain after chip reset.
*
* @param None
*
* @return None
*/
static inline void rtc_suppress_rom_log(void)
{
/* To disable logging in the ROM, only the least significant bit of the register is used,
* but since this register is also used to store the frequency of the main crystal (RTC_XTAL_FREQ_REG),
* you need to write to this register in the same format.
* Namely, the upper 16 bits and lower should be the same.
*/
REG_SET_BIT(RTC_CNTL_STORE4_REG, RTC_DISABLE_ROM_LOG);
}
/**
* @brief Set CRC of Fast RTC memory 0-0x7ff into RTC STORE7.
*
* @param None
*
* @return None
*/
void set_rtc_memory_crc(void);
/**
* @brief Fetch entry from RTC memory and RTC STORE reg
*
* @param uint32_t * entry_addr : the address to save entry
*
* @param RESET_REASON reset_reason : reset reason this time
*
* @return None
*/
void rtc_boot_control(uint32_t *entry_addr, RESET_REASON reset_reason);
/**
* @brief Software Reset digital core.
*
* It is not recommended to use this function in esp-idf, use
* esp_restart() instead.
*
* @param None
*
* @return None
*/
void software_reset(void);
/**
* @brief Software Reset digital core.
*
* It is not recommended to use this function in esp-idf, use
* esp_restart() instead.
*
* @param int cpu_no : The CPU to reset, 0 for PRO CPU, 1 for APP CPU.
*
* @return None
*/
void software_reset_cpu(int cpu_no);
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* _ROM_RTC_H_ */

117
tools/sdk/esp32/include/esp_rom/include/esp32c3/rom/secure_boot.h Normal file
View File

@ -0,0 +1,117 @@
/*
* SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
#include <stdint.h>
#include <stdbool.h>
#include "ets_sys.h"
#include "rsa_pss.h"
#ifdef __cplusplus
extern "C" {
#endif
typedef struct ets_secure_boot_sig_block ets_secure_boot_sig_block_t;
typedef struct ets_secure_boot_signature ets_secure_boot_signature_t;
typedef struct ets_secure_boot_key_digests ets_secure_boot_key_digests_t;
/* Anti-FI measure: use full words for success/fail, instead of
0/non-zero
*/
typedef enum {
SB_SUCCESS = 0x3A5A5AA5,
SB_FAILED = 0x7533885E,
} ets_secure_boot_status_t;
/* Verify and stage-load the bootloader image
(reconfigures cache to map, loads trusted key digests from efuse,
copies the bootloader into the staging buffer.)
If allow_key_revoke is true and aggressive revoke efuse is set,
any failed signature has its associated key revoked in efuse.
If result is SB_SUCCESS, the "simple hash" of the bootloader
is copied into verified_hash.
*/
ets_secure_boot_status_t ets_secure_boot_verify_stage_bootloader(uint8_t *verified_hash, bool allow_key_revoke);
/* Verify bootloader image (reconfigures cache to map),
with key digests provided as parameters.)
Can be used to verify secure boot status before enabling
secure boot permanently.
If stage_load parameter is true, bootloader is copied into staging
buffer in RAM at the same time.
If result is SB_SUCCESS, the "simple hash" of the bootloader is
copied into verified_hash.
*/
ets_secure_boot_status_t ets_secure_boot_verify_bootloader_with_keys(uint8_t *verified_hash, const ets_secure_boot_key_digests_t *trusted_keys, bool stage_load);
/* Read key digests from efuse. Any revoked/missing digests will be
marked as NULL
*/
ETS_STATUS ets_secure_boot_read_key_digests(ets_secure_boot_key_digests_t *trusted_keys);
/* Verify supplied signature against supplied digest, using
supplied trusted key digests.
Doesn't reconfigure cache or any other hardware access except for RSA peripheral.
If result is SB_SUCCESS, the image_digest value is copied into verified_digest.
*/
ets_secure_boot_status_t ets_secure_boot_verify_signature(const ets_secure_boot_signature_t *sig, const uint8_t *image_digest, const ets_secure_boot_key_digests_t *trusted_keys, uint8_t *verified_digest);
/* Revoke a public key digest in efuse.
@param index Digest to revoke. Must be 0, 1 or 2.
*/
void ets_secure_boot_revoke_public_key_digest(int index);
#define CRC_SIGN_BLOCK_LEN 1196
#define SIG_BLOCK_PADDING 4096
#define ETS_SECURE_BOOT_V2_SIGNATURE_MAGIC 0xE7
/* Secure Boot V2 signature block
(Up to 3 in a signature sector are appended to the image)
*/
struct ets_secure_boot_sig_block {
uint8_t magic_byte;
uint8_t version;
uint8_t _reserved1;
uint8_t _reserved2;
uint8_t image_digest[32];
ets_rsa_pubkey_t key;
uint8_t signature[384];
uint32_t block_crc;
uint8_t _padding[16];
};
_Static_assert(sizeof(ets_secure_boot_sig_block_t) == 1216, "invalid sig block size");
#define SECURE_BOOT_NUM_BLOCKS 3
/* V2 Secure boot signature sector (up to 3 blocks) */
struct ets_secure_boot_signature {
ets_secure_boot_sig_block_t block[SECURE_BOOT_NUM_BLOCKS];
uint8_t _padding[4096 - (sizeof(ets_secure_boot_sig_block_t) * SECURE_BOOT_NUM_BLOCKS)];
};
_Static_assert(sizeof(ets_secure_boot_signature_t) == 4096, "invalid sig sector size");
#define MAX_KEY_DIGESTS 3
struct ets_secure_boot_key_digests {
const void *key_digests[MAX_KEY_DIGESTS];
bool allow_key_revoke;
};
#ifdef __cplusplus
}
#endif

61
tools/sdk/esp32/include/esp_rom/include/esp32c3/rom/sha.h Normal file
View File

@ -0,0 +1,61 @@
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#ifndef _ROM_SHA_H_
#define _ROM_SHA_H_
#include <stdint.h>
#include <stdbool.h>
#include "ets_sys.h"
#ifdef __cplusplus
extern "C" {
#endif
typedef enum {
SHA1 = 0,
SHA2_224,
SHA2_256,
SHA_TYPE_MAX
} SHA_TYPE;
typedef struct SHAContext {
bool start;
bool in_hardware; // Is this context currently in peripheral? Needs to be manually cleared if multiple SHAs are interleaved
SHA_TYPE type;
uint32_t state[16]; // For SHA1/SHA224/SHA256, used 8, other used 16
unsigned char buffer[128]; // For SHA1/SHA224/SHA256, used 64, other used 128
uint32_t total_bits[4];
} SHA_CTX;
void ets_sha_enable(void);
void ets_sha_disable(void);
ets_status_t ets_sha_init(SHA_CTX *ctx, SHA_TYPE type);
ets_status_t ets_sha_starts(SHA_CTX *ctx, uint16_t sha512_t);
void ets_sha_get_state(SHA_CTX *ctx);
void ets_sha_process(SHA_CTX *ctx, const unsigned char *input);
void ets_sha_update(SHA_CTX *ctx, const unsigned char *input, uint32_t input_bytes, bool update_ctx);
ets_status_t ets_sha_finish(SHA_CTX *ctx, unsigned char *output);
#ifdef __cplusplus
}
#endif
#endif /* _ROM_SHA_H_ */

570
tools/sdk/esp32/include/esp_rom/include/esp32c3/rom/spi_flash.h Normal file
View File

@ -0,0 +1,570 @@
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#ifndef _ROM_SPI_FLASH_H_
#define _ROM_SPI_FLASH_H_
#include <stdint.h>
#include <stdbool.h>
#include "esp_attr.h"
#ifdef __cplusplus
extern "C" {
#endif
/** \defgroup spi_flash_apis, spi flash operation related apis
* @brief spi_flash apis
*/
/** @addtogroup spi_flash_apis
* @{
*/
#define PERIPHS_SPI_FLASH_CMD SPI_MEM_CMD_REG(1)
#define PERIPHS_SPI_FLASH_ADDR SPI_MEM_ADDR_REG(1)
#define PERIPHS_SPI_FLASH_CTRL SPI_MEM_CTRL_REG(1)
#define PERIPHS_SPI_FLASH_CTRL1 SPI_MEM_CTRL1_REG(1)
#define PERIPHS_SPI_FLASH_STATUS SPI_MEM_RD_STATUS_REG(1)
#define PERIPHS_SPI_FLASH_USRREG SPI_MEM_USER_REG(1)
#define PERIPHS_SPI_FLASH_USRREG1 SPI_MEM_USER1_REG(1)
#define PERIPHS_SPI_FLASH_USRREG2 SPI_MEM_USER2_REG(1)
#define PERIPHS_SPI_FLASH_C0 SPI_MEM_W0_REG(1)
#define PERIPHS_SPI_FLASH_C1 SPI_MEM_W1_REG(1)
#define PERIPHS_SPI_FLASH_C2 SPI_MEM_W2_REG(1)
#define PERIPHS_SPI_FLASH_C3 SPI_MEM_W3_REG(1)
#define PERIPHS_SPI_FLASH_C4 SPI_MEM_W4_REG(1)
#define PERIPHS_SPI_FLASH_C5 SPI_MEM_W5_REG(1)
#define PERIPHS_SPI_FLASH_C6 SPI_MEM_W6_REG(1)
#define PERIPHS_SPI_FLASH_C7 SPI_MEM_W7_REG(1)
#define PERIPHS_SPI_FLASH_TX_CRC SPI_MEM_TX_CRC_REG(1)
#define SPI0_R_QIO_DUMMY_CYCLELEN 5
#define SPI0_R_QIO_ADDR_BITSLEN 23
#define SPI0_R_FAST_DUMMY_CYCLELEN 7
#define SPI0_R_DIO_DUMMY_CYCLELEN 3
#define SPI0_R_FAST_ADDR_BITSLEN 23
#define SPI0_R_SIO_ADDR_BITSLEN 23
#define SPI1_R_QIO_DUMMY_CYCLELEN 5
#define SPI1_R_QIO_ADDR_BITSLEN 23
#define SPI1_R_FAST_DUMMY_CYCLELEN 7
#define SPI1_R_DIO_DUMMY_CYCLELEN 3
#define SPI1_R_DIO_ADDR_BITSLEN 23
#define SPI1_R_FAST_ADDR_BITSLEN 23
#define SPI1_R_SIO_ADDR_BITSLEN 23
#define ESP_ROM_SPIFLASH_W_SIO_ADDR_BITSLEN 23
#define ESP_ROM_SPIFLASH_TWO_BYTE_STATUS_EN SPI_MEM_WRSR_2B
//SPI address register
#define ESP_ROM_SPIFLASH_BYTES_LEN 24
#define ESP_ROM_SPIFLASH_BUFF_BYTE_WRITE_NUM 32
#define ESP_ROM_SPIFLASH_BUFF_BYTE_READ_NUM 16
#define ESP_ROM_SPIFLASH_BUFF_BYTE_READ_BITS 0xf
//SPI status register
#define ESP_ROM_SPIFLASH_BUSY_FLAG BIT0
#define ESP_ROM_SPIFLASH_WRENABLE_FLAG BIT1
#define ESP_ROM_SPIFLASH_BP0 BIT2
#define ESP_ROM_SPIFLASH_BP1 BIT3
#define ESP_ROM_SPIFLASH_BP2 BIT4
#define ESP_ROM_SPIFLASH_WR_PROTECT (ESP_ROM_SPIFLASH_BP0|ESP_ROM_SPIFLASH_BP1|ESP_ROM_SPIFLASH_BP2)
#define ESP_ROM_SPIFLASH_QE BIT9
#define FLASH_ID_GD25LQ32C 0xC86016
typedef enum {
ESP_ROM_SPIFLASH_QIO_MODE = 0,
ESP_ROM_SPIFLASH_QOUT_MODE,
ESP_ROM_SPIFLASH_DIO_MODE,
ESP_ROM_SPIFLASH_DOUT_MODE,
ESP_ROM_SPIFLASH_FASTRD_MODE,
ESP_ROM_SPIFLASH_SLOWRD_MODE
} esp_rom_spiflash_read_mode_t;
typedef enum {
ESP_ROM_SPIFLASH_RESULT_OK,
ESP_ROM_SPIFLASH_RESULT_ERR,
ESP_ROM_SPIFLASH_RESULT_TIMEOUT
} esp_rom_spiflash_result_t;
typedef struct {
uint32_t device_id;
uint32_t chip_size; // chip size in bytes
uint32_t block_size;
uint32_t sector_size;
uint32_t page_size;
uint32_t status_mask;
} esp_rom_spiflash_chip_t;
typedef struct {
uint8_t data_length;
uint8_t read_cmd0;
uint8_t read_cmd1;
uint8_t write_cmd;
uint16_t data_mask;
uint16_t data;
} esp_rom_spiflash_common_cmd_t;
/**
* @brief Fix the bug in SPI hardware communication with Flash/Ext-SRAM in High Speed.
* Please do not call this function in SDK.
*
* @param uint8_t spi: 0 for SPI0(Cache Access), 1 for SPI1(Flash read/write).
*
* @param uint8_t freqdiv: Pll is 80M, 4 for 20M, 3 for 26.7M, 2 for 40M, 1 for 80M.
*
* @return None
*/
void esp_rom_spiflash_fix_dummylen(uint8_t spi, uint8_t freqdiv);
/**
* @brief Select SPI Flash to QIO mode when WP pad is read from Flash.
* Please do not call this function in SDK.
*
* @param uint8_t wp_gpio_num: WP gpio number.
*
* @param uint32_t ishspi: 0 for spi, 1 for hspi, flash pad decided by strapping
* else, bit[5:0] spiclk, bit[11:6] spiq, bit[17:12] spid, bit[23:18] spics0, bit[29:24] spihd
*
* @return None
*/
void esp_rom_spiflash_select_qiomode(uint8_t wp_gpio_num, uint32_t ishspi);
/**
* @brief Set SPI Flash pad drivers.
* Please do not call this function in SDK.
*
* @param uint8_t wp_gpio_num: WP gpio number.
*
* @param uint32_t ishspi: 0 for spi, 1 for hspi, flash pad decided by strapping
* else, bit[5:0] spiclk, bit[11:6] spiq, bit[17:12] spid, bit[23:18] spics0, bit[29:24] spihd
*
* @param uint8_t *drvs: drvs[0]-bit[3:0] for cpiclk, bit[7:4] for spiq, drvs[1]-bit[3:0] for spid, drvs[1]-bit[7:4] for spid
* drvs[2]-bit[3:0] for spihd, drvs[2]-bit[7:4] for spiwp.
* Values usually read from falsh by rom code, function usually callde by rom code.
* if value with bit(3) set, the value is valid, bit[2:0] is the real value.
*
* @return None
*/
void esp_rom_spiflash_set_drvs(uint8_t wp_gpio_num, uint32_t ishspi, uint8_t *drvs);
/**
* @brief Select SPI Flash function for pads.
* Please do not call this function in SDK.
*
* @param uint32_t ishspi: 0 for spi, 1 for hspi, flash pad decided by strapping
* else, bit[5:0] spiclk, bit[11:6] spiq, bit[17:12] spid, bit[23:18] spics0, bit[29:24] spihd
*
* @return None
*/
void esp_rom_spiflash_select_padsfunc(uint32_t ishspi);
/**
* @brief SPI Flash init, clock divisor is 4, use 1 line Slow read mode.
* Please do not call this function in SDK.
*
* @param uint32_t ishspi: 0 for spi, 1 for hspi, flash pad decided by strapping
* else, bit[5:0] spiclk, bit[11:6] spiq, bit[17:12] spid, bit[23:18] spics0, bit[29:24] spihd
*
* @param uint8_t legacy: In legacy mode, more SPI command is used in line.
*
* @return None
*/
void esp_rom_spiflash_attach(uint32_t ishspi, bool legacy);
/**
* @brief SPI Read Flash status register. We use CMD 0x05 (RDSR).
* Please do not call this function in SDK.
*
* @param esp_rom_spiflash_chip_t *spi : The information for Flash, which is exported from ld file.
*
* @param uint32_t *status : The pointer to which to return the Flash status value.
*
* @return ESP_ROM_SPIFLASH_RESULT_OK : read OK.
* ESP_ROM_SPIFLASH_RESULT_ERR : read error.
* ESP_ROM_SPIFLASH_RESULT_TIMEOUT : read timeout.
*/
esp_rom_spiflash_result_t esp_rom_spiflash_read_status(esp_rom_spiflash_chip_t *spi, uint32_t *status);
/**
* @brief SPI Read Flash status register bits 8-15. We use CMD 0x35 (RDSR2).
* Please do not call this function in SDK.
*
* @param esp_rom_spiflash_chip_t *spi : The information for Flash, which is exported from ld file.
*
* @param uint32_t *status : The pointer to which to return the Flash status value.
*
* @return ESP_ROM_SPIFLASH_RESULT_OK : read OK.
* ESP_ROM_SPIFLASH_RESULT_ERR : read error.
* ESP_ROM_SPIFLASH_RESULT_TIMEOUT : read timeout.
*/
esp_rom_spiflash_result_t esp_rom_spiflash_read_statushigh(esp_rom_spiflash_chip_t *spi, uint32_t *status);
/**
* @brief Write status to Falsh status register.
* Please do not call this function in SDK.
*
* @param esp_rom_spiflash_chip_t *spi : The information for Flash, which is exported from ld file.
*
* @param uint32_t status_value : Value to .
*
* @return ESP_ROM_SPIFLASH_RESULT_OK : write OK.
* ESP_ROM_SPIFLASH_RESULT_ERR : write error.
* ESP_ROM_SPIFLASH_RESULT_TIMEOUT : write timeout.
*/
esp_rom_spiflash_result_t esp_rom_spiflash_write_status(esp_rom_spiflash_chip_t *spi, uint32_t status_value);
/**
* @brief Use a command to Read Flash status register.
* Please do not call this function in SDK.
*
* @param esp_rom_spiflash_chip_t *spi : The information for Flash, which is exported from ld file.
*
* @param uint32_t*status : The pointer to which to return the Flash status value.
*
* @return ESP_ROM_SPIFLASH_RESULT_OK : read OK.
* ESP_ROM_SPIFLASH_RESULT_ERR : read error.
* ESP_ROM_SPIFLASH_RESULT_TIMEOUT : read timeout.
*/
esp_rom_spiflash_result_t esp_rom_spiflash_read_user_cmd(uint32_t *status, uint8_t cmd);
/**
* @brief Config SPI Flash read mode when init.
* Please do not call this function in SDK.
*
* @param esp_rom_spiflash_read_mode_t mode : QIO/QOUT/DIO/DOUT/FastRD/SlowRD.
*
* This function does not try to set the QIO Enable bit in the status register, caller is responsible for this.
*
* @return ESP_ROM_SPIFLASH_RESULT_OK : config OK.
* ESP_ROM_SPIFLASH_RESULT_ERR : config error.
* ESP_ROM_SPIFLASH_RESULT_TIMEOUT : config timeout.
*/
esp_rom_spiflash_result_t esp_rom_spiflash_config_readmode(esp_rom_spiflash_read_mode_t mode);
/**
* @brief Config SPI Flash clock divisor.
* Please do not call this function in SDK.
*
* @param uint8_t freqdiv: clock divisor.
*
* @param uint8_t spi: 0 for SPI0, 1 for SPI1.
*
* @return ESP_ROM_SPIFLASH_RESULT_OK : config OK.
* ESP_ROM_SPIFLASH_RESULT_ERR : config error.
* ESP_ROM_SPIFLASH_RESULT_TIMEOUT : config timeout.
*/
esp_rom_spiflash_result_t esp_rom_spiflash_config_clk(uint8_t freqdiv, uint8_t spi);
/**
* @brief Send CommonCmd to Flash so that is can go into QIO mode, some Flash use different CMD.
* Please do not call this function in SDK.
*
* @param esp_rom_spiflash_common_cmd_t *cmd : A struct to show the action of a command.
*
* @return uint16_t 0 : do not send command any more.
* 1 : go to the next command.
* n > 1 : skip (n - 1) commands.
*/
uint16_t esp_rom_spiflash_common_cmd(esp_rom_spiflash_common_cmd_t *cmd);
/**
* @brief Unlock SPI write protect.
* Please do not call this function in SDK.
*
* @param None.
*
* @return ESP_ROM_SPIFLASH_RESULT_OK : Unlock OK.
* ESP_ROM_SPIFLASH_RESULT_ERR : Unlock error.
* ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Unlock timeout.
*/
esp_rom_spiflash_result_t esp_rom_spiflash_unlock(void);
/**
* @brief SPI write protect.
* Please do not call this function in SDK.
*
* @param None.
*
* @return ESP_ROM_SPIFLASH_RESULT_OK : Lock OK.
* ESP_ROM_SPIFLASH_RESULT_ERR : Lock error.
* ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Lock timeout.
*/
esp_rom_spiflash_result_t esp_rom_spiflash_lock(void);
/**
* @brief Update SPI Flash parameter.
* Please do not call this function in SDK.
*
* @param uint32_t deviceId : Device ID read from SPI, the low 32 bit.
*
* @param uint32_t chip_size : The Flash size.
*
* @param uint32_t block_size : The Flash block size.
*
* @param uint32_t sector_size : The Flash sector size.
*
* @param uint32_t page_size : The Flash page size.
*
* @param uint32_t status_mask : The Mask used when read status from Flash(use single CMD).
*
* @return ESP_ROM_SPIFLASH_RESULT_OK : Update OK.
* ESP_ROM_SPIFLASH_RESULT_ERR : Update error.
* ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Update timeout.
*/
esp_rom_spiflash_result_t esp_rom_spiflash_config_param(uint32_t deviceId, uint32_t chip_size, uint32_t block_size,
uint32_t sector_size, uint32_t page_size, uint32_t status_mask);
/**
* @brief Erase whole flash chip.
* Please do not call this function in SDK.
*
* @param None
*
* @return ESP_ROM_SPIFLASH_RESULT_OK : Erase OK.
* ESP_ROM_SPIFLASH_RESULT_ERR : Erase error.
* ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Erase timeout.
*/
esp_rom_spiflash_result_t esp_rom_spiflash_erase_chip(void);
/**
* @brief Erase a 64KB block of flash
* Uses SPI flash command D8H.
* Please do not call this function in SDK.
*
* @param uint32_t block_num : Which block to erase.
*
* @return ESP_ROM_SPIFLASH_RESULT_OK : Erase OK.
* ESP_ROM_SPIFLASH_RESULT_ERR : Erase error.
* ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Erase timeout.
*/
esp_rom_spiflash_result_t esp_rom_spiflash_erase_block(uint32_t block_num);
/**
* @brief Erase a sector of flash.
* Uses SPI flash command 20H.
* Please do not call this function in SDK.
*
* @param uint32_t sector_num : Which sector to erase.
*
* @return ESP_ROM_SPIFLASH_RESULT_OK : Erase OK.
* ESP_ROM_SPIFLASH_RESULT_ERR : Erase error.
* ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Erase timeout.
*/
esp_rom_spiflash_result_t esp_rom_spiflash_erase_sector(uint32_t sector_num);
/**
* @brief Erase some sectors.
* Please do not call this function in SDK.
*
* @param uint32_t start_addr : Start addr to erase, should be sector aligned.
*
* @param uint32_t area_len : Length to erase, should be sector aligned.
*
* @return ESP_ROM_SPIFLASH_RESULT_OK : Erase OK.
* ESP_ROM_SPIFLASH_RESULT_ERR : Erase error.
* ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Erase timeout.
*/
esp_rom_spiflash_result_t esp_rom_spiflash_erase_area(uint32_t start_addr, uint32_t area_len);
/**
* @brief Write Data to Flash, you should Erase it yourself if need.
* Please do not call this function in SDK.
*
* @param uint32_t dest_addr : Address to write, should be 4 bytes aligned.
*
* @param const uint32_t *src : The pointer to data which is to write.
*
* @param uint32_t len : Length to write, should be 4 bytes aligned.
*
* @return ESP_ROM_SPIFLASH_RESULT_OK : Write OK.
* ESP_ROM_SPIFLASH_RESULT_ERR : Write error.
* ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Write timeout.
*/
esp_rom_spiflash_result_t esp_rom_spiflash_write(uint32_t dest_addr, const uint32_t *src, int32_t len);
/**
* @brief Read Data from Flash, you should Erase it yourself if need.
* Please do not call this function in SDK.
*
* @param uint32_t src_addr : Address to read, should be 4 bytes aligned.
*
* @param uint32_t *dest : The buf to read the data.
*
* @param uint32_t len : Length to read, should be 4 bytes aligned.
*
* @return ESP_ROM_SPIFLASH_RESULT_OK : Read OK.
* ESP_ROM_SPIFLASH_RESULT_ERR : Read error.
* ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Read timeout.
*/
esp_rom_spiflash_result_t esp_rom_spiflash_read(uint32_t src_addr, uint32_t *dest, int32_t len);
/**
* @brief SPI1 go into encrypto mode.
* Please do not call this function in SDK.
*
* @param None
*
* @return None
*/
void esp_rom_spiflash_write_encrypted_enable(void);
/**
* @brief Prepare 32 Bytes data to encrpto writing, you should Erase it yourself if need.
* Please do not call this function in SDK.
*
* @param uint32_t flash_addr : Address to write, should be 32 bytes aligned.
*
* @param uint32_t *data : The pointer to data which is to write.
*
* @return ESP_ROM_SPIFLASH_RESULT_OK : Prepare OK.
* ESP_ROM_SPIFLASH_RESULT_ERR : Prepare error.
* ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Prepare timeout.
*/
esp_rom_spiflash_result_t esp_rom_spiflash_prepare_encrypted_data(uint32_t flash_addr, uint32_t *data);
/**
* @brief SPI1 go out of encrypto mode.
* Please do not call this function in SDK.
*
* @param None
*
* @return None
*/
void esp_rom_spiflash_write_encrypted_disable(void);
/**
* @brief Write data to flash with transparent encryption.
* @note Sectors to be written should already be erased.
*
* @note Please do not call this function in SDK.
*
* @param uint32_t flash_addr : Address to write, should be 32 byte aligned.
*
* @param uint32_t *data : The pointer to data to write. Note, this pointer must
* be 32 bit aligned and the content of the data will be
* modified by the encryption function.
*
* @param uint32_t len : Length to write, should be 32 bytes aligned.
*
* @return ESP_ROM_SPIFLASH_RESULT_OK : Data written successfully.
* ESP_ROM_SPIFLASH_RESULT_ERR : Encryption write error.
* ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Encrypto write timeout.
*/
esp_rom_spiflash_result_t esp_rom_spiflash_write_encrypted(uint32_t flash_addr, uint32_t *data, uint32_t len);
/* TODO: figure out how to map these to their new names */
typedef enum {
SPI_ENCRYPT_DESTINATION_FLASH,
} SpiEncryptDest;
typedef esp_rom_spiflash_result_t SpiFlashOpResult;
SpiFlashOpResult SPI_Encrypt_Write(uint32_t flash_addr, const void *data, uint32_t len);
SpiFlashOpResult SPI_Encrypt_Write_Dest(SpiEncryptDest dest, uint32_t flash_addr, const void *data, uint32_t len);
void SPI_Write_Encrypt_Enable(void);
void SPI_Write_Encrypt_Disable(void);
/** @brief Wait until SPI flash write operation is complete
*
* @note Please do not call this function in SDK.
*
* Reads the Write In Progress bit of the SPI flash status register,
* repeats until this bit is zero (indicating write complete).
*
* @return ESP_ROM_SPIFLASH_RESULT_OK : Write is complete
* ESP_ROM_SPIFLASH_RESULT_ERR : Error while reading status.
*/
esp_rom_spiflash_result_t esp_rom_spiflash_wait_idle(esp_rom_spiflash_chip_t *spi);
/** @brief Enable Quad I/O pin functions
*
* @note Please do not call this function in SDK.
*
* Sets the HD & WP pin functions for Quad I/O modes, based on the
* efuse SPI pin configuration.
*
* @param wp_gpio_num - Number of the WP pin to reconfigure for quad I/O.
*
* @param spiconfig - Pin configuration, as returned from ets_efuse_get_spiconfig().
* - If this parameter is 0, default SPI pins are used and wp_gpio_num parameter is ignored.
* - If this parameter is 1, default HSPI pins are used and wp_gpio_num parameter is ignored.
* - For other values, this parameter encodes the HD pin number and also the CLK pin number. CLK pin selection is used
* to determine if HSPI or SPI peripheral will be used (use HSPI if CLK pin is the HSPI clock pin, otherwise use SPI).
* Both HD & WP pins are configured via GPIO matrix to map to the selected peripheral.
*/
void esp_rom_spiflash_select_qio_pins(uint8_t wp_gpio_num, uint32_t spiconfig);
typedef void (* spi_flash_func_t)(void);
typedef SpiFlashOpResult (* spi_flash_op_t)(void);
typedef SpiFlashOpResult (* spi_flash_erase_t)(uint32_t);
typedef SpiFlashOpResult (* spi_flash_rd_t)(uint32_t, uint32_t*, int);
typedef SpiFlashOpResult (* spi_flash_wr_t)(uint32_t, const uint32_t*, int);
typedef SpiFlashOpResult (* spi_flash_ewr_t)(uint32_t, const void*, uint32_t);
typedef SpiFlashOpResult (* spi_flash_wren_t)(void*);
typedef struct {
uint32_t read_sub_len;
uint32_t write_sub_len;
spi_flash_op_t unlock;
spi_flash_erase_t erase_sector;
spi_flash_erase_t erase_block;
spi_flash_rd_t read;
spi_flash_wr_t write;
spi_flash_ewr_t encrypt_write;
spi_flash_func_t check_sus;
spi_flash_wren_t wren;
spi_flash_op_t wait_idle;
} spiflash_legacy_funcs_t;
extern const spiflash_legacy_funcs_t *rom_spiflash_legacy_funcs;
/** @brief Global ROM spiflash data, as used by legacy
SPI flash functions
*/
typedef struct {
esp_rom_spiflash_chip_t chip;
uint8_t dummy_len_plus[3];
uint8_t sig_matrix;
} spiflash_legacy_data_t;
extern spiflash_legacy_data_t *rom_spiflash_legacy_data;
/* Defines to make the C3 ROM legacvy data access compatible with previous chips */
#define g_rom_flashchip (rom_spiflash_legacy_data->chip)
#define g_rom_spiflash_dummy_len_plus (rom_spiflash_legacy_data->dummy_len_plus)
/**
* @brief Clear WEL bit unconditionally.
*
* @return always ESP_ROM_SPIFLASH_RESULT_OK
*/
esp_rom_spiflash_result_t esp_rom_spiflash_write_disable(void);
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* _ROM_SPI_FLASH_H_ */

99
tools/sdk/esp32/include/esp_rom/include/esp32c3/rom/tjpgd.h Normal file
View File

@ -0,0 +1,99 @@
/*----------------------------------------------------------------------------/
/ TJpgDec - Tiny JPEG Decompressor include file (C)ChaN, 2012
/----------------------------------------------------------------------------*/
#ifndef _TJPGDEC
#define _TJPGDEC
/*---------------------------------------------------------------------------*/
/* System Configurations */
#define JD_SZBUF 512 /* Size of stream input buffer */
#define JD_FORMAT 0 /* Output pixel format 0:RGB888 (3 BYTE/pix), 1:RGB565 (1 WORD/pix) */
#define JD_USE_SCALE 1 /* Use descaling feature for output */
#define JD_TBLCLIP 1 /* Use table for saturation (might be a bit faster but increases 1K bytes of code size) */
/*---------------------------------------------------------------------------*/
#ifdef __cplusplus
extern "C" {
#endif
/* These types must be 16-bit, 32-bit or larger integer */
typedef int INT;
typedef unsigned int UINT;
/* These types must be 8-bit integer */
typedef char CHAR;
typedef unsigned char UCHAR;
typedef unsigned char BYTE;
/* These types must be 16-bit integer */
typedef short SHORT;
typedef unsigned short USHORT;
typedef unsigned short WORD;
typedef unsigned short WCHAR;
/* These types must be 32-bit integer */
typedef long LONG;
typedef unsigned long ULONG;
typedef unsigned long DWORD;
/* Error code */
typedef enum {
JDR_OK = 0, /* 0: Succeeded */
JDR_INTR, /* 1: Interrupted by output function */
JDR_INP, /* 2: Device error or wrong termination of input stream */
JDR_MEM1, /* 3: Insufficient memory pool for the image */
JDR_MEM2, /* 4: Insufficient stream input buffer */
JDR_PAR, /* 5: Parameter error */
JDR_FMT1, /* 6: Data format error (may be damaged data) */
JDR_FMT2, /* 7: Right format but not supported */
JDR_FMT3 /* 8: Not supported JPEG standard */
} JRESULT;
/* Rectangular structure */
typedef struct {
WORD left, right, top, bottom;
} JRECT;
/* Decompressor object structure */
typedef struct JDEC JDEC;
struct JDEC {
UINT dctr; /* Number of bytes available in the input buffer */
BYTE *dptr; /* Current data read ptr */
BYTE *inbuf; /* Bit stream input buffer */
BYTE dmsk; /* Current bit in the current read byte */
BYTE scale; /* Output scaling ratio */
BYTE msx, msy; /* MCU size in unit of block (width, height) */
BYTE qtid[3]; /* Quantization table ID of each component */
SHORT dcv[3]; /* Previous DC element of each component */
WORD nrst; /* Restart inverval */
UINT width, height; /* Size of the input image (pixel) */
BYTE *huffbits[2][2]; /* Huffman bit distribution tables [id][dcac] */
WORD *huffcode[2][2]; /* Huffman code word tables [id][dcac] */
BYTE *huffdata[2][2]; /* Huffman decoded data tables [id][dcac] */
LONG *qttbl[4]; /* Dequaitizer tables [id] */
void *workbuf; /* Working buffer for IDCT and RGB output */
BYTE *mcubuf; /* Working buffer for the MCU */
void *pool; /* Pointer to available memory pool */
UINT sz_pool; /* Size of momory pool (bytes available) */
UINT (*infunc)(JDEC *, BYTE *, UINT); /* Pointer to jpeg stream input function */
void *device; /* Pointer to I/O device identifiler for the session */
};
/* TJpgDec API functions */
JRESULT jd_prepare (JDEC *, UINT(*)(JDEC *, BYTE *, UINT), void *, UINT, void *);
JRESULT jd_decomp (JDEC *, UINT(*)(JDEC *, void *, JRECT *), BYTE);
#ifdef __cplusplus
}
#endif
#endif /* _TJPGDEC */

440
tools/sdk/esp32/include/esp_rom/include/esp32c3/rom/uart.h Normal file
View File

@ -0,0 +1,440 @@
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#ifndef _ROM_UART_H_
#define _ROM_UART_H_
#include "esp_types.h"
#include "esp_attr.h"
#include "ets_sys.h"
#include "soc/soc.h"
#include "soc/uart_reg.h"
#ifdef __cplusplus
extern "C" {
#endif
/** \defgroup uart_apis, uart configuration and communication related apis
* @brief uart apis
*/
/** @addtogroup uart_apis
* @{
*/
#define RX_BUFF_SIZE 0x400
#define TX_BUFF_SIZE 100
//uart int enalbe register ctrl bits
#define UART_RCV_INTEN BIT0
#define UART_TRX_INTEN BIT1
#define UART_LINE_STATUS_INTEN BIT2
//uart int identification ctrl bits
#define UART_INT_FLAG_MASK 0x0E
//uart fifo ctrl bits
#define UART_CLR_RCV_FIFO BIT1
#define UART_CLR_TRX_FIFO BIT2
#define UART_RCVFIFO_TRG_LVL_BITS BIT6
//uart line control bits
#define UART_DIV_LATCH_ACCESS_BIT BIT7
//uart line status bits
#define UART_RCV_DATA_RDY_FLAG BIT0
#define UART_RCV_OVER_FLOW_FLAG BIT1
#define UART_RCV_PARITY_ERR_FLAG BIT2
#define UART_RCV_FRAME_ERR_FLAG BIT3
#define UART_BRK_INT_FLAG BIT4
#define UART_TRX_FIFO_EMPTY_FLAG BIT5
#define UART_TRX_ALL_EMPTY_FLAG BIT6 // include fifo and shift reg
#define UART_RCV_ERR_FLAG BIT7
//send and receive message frame head
#define FRAME_FLAG 0x7E
typedef enum {
UART_LINE_STATUS_INT_FLAG = 0x06,
UART_RCV_FIFO_INT_FLAG = 0x04,
UART_RCV_TMOUT_INT_FLAG = 0x0C,
UART_TXBUFF_EMPTY_INT_FLAG = 0x02
} UartIntType; //consider bit0 for int_flag
typedef enum {
RCV_ONE_BYTE = 0x0,
RCV_FOUR_BYTE = 0x1,
RCV_EIGHT_BYTE = 0x2,
RCV_FOURTEEN_BYTE = 0x3
} UartRcvFifoTrgLvl;
typedef enum {
FIVE_BITS = 0x0,
SIX_BITS = 0x1,
SEVEN_BITS = 0x2,
EIGHT_BITS = 0x3
} UartBitsNum4Char;
typedef enum {
ONE_STOP_BIT = 1,
ONE_HALF_STOP_BIT = 2,
TWO_STOP_BIT = 3
} UartStopBitsNum;
typedef enum {
NONE_BITS = 0,
ODD_BITS = 2,
EVEN_BITS = 3
} UartParityMode;
typedef enum {
STICK_PARITY_DIS = 0,
STICK_PARITY_EN = 2
} UartExistParity;
typedef enum {
BIT_RATE_9600 = 9600,
BIT_RATE_19200 = 19200,
BIT_RATE_38400 = 38400,
BIT_RATE_57600 = 57600,
BIT_RATE_115200 = 115200,
BIT_RATE_230400 = 230400,
BIT_RATE_460800 = 460800,
BIT_RATE_921600 = 921600
} UartBautRate;
typedef enum {
NONE_CTRL,
HARDWARE_CTRL,
XON_XOFF_CTRL
} UartFlowCtrl;
typedef enum {
EMPTY,
UNDER_WRITE,
WRITE_OVER
} RcvMsgBuffState;
typedef struct {
uint8_t *pRcvMsgBuff;
uint8_t *pWritePos;
uint8_t *pReadPos;
uint8_t TrigLvl;
RcvMsgBuffState BuffState;
} RcvMsgBuff;
typedef struct {
uint32_t TrxBuffSize;
uint8_t *pTrxBuff;
} TrxMsgBuff;
typedef enum {
BAUD_RATE_DET,
WAIT_SYNC_FRM,
SRCH_MSG_HEAD,
RCV_MSG_BODY,
RCV_ESC_CHAR,
} RcvMsgState;
typedef struct {
UartBautRate baut_rate;
UartBitsNum4Char data_bits;
UartExistParity exist_parity;
UartParityMode parity; // chip size in byte
UartStopBitsNum stop_bits;
UartFlowCtrl flow_ctrl;
uint8_t buff_uart_no; //indicate which uart use tx/rx buffer
RcvMsgBuff rcv_buff;
// TrxMsgBuff trx_buff;
RcvMsgState rcv_state;
int received;
} UartDevice;
/**
* @brief Init uart device struct value and reset uart0/uart1 rx.
* Please do not call this function in SDK.
*
* @param rxBuffer, must be a pointer to RX_BUFF_SIZE bytes or NULL
*
* @return None
*/
void uartAttach(void *rxBuffer);
/**
* @brief Init uart0 or uart1 for UART download booting mode.
* Please do not call this function in SDK.
*
* @param uint8_t uart_no : 0 for UART0, else for UART1.
*
* @param uint32_t clock : clock used by uart module, to adjust baudrate.
*
* @return None
*/
void Uart_Init(uint8_t uart_no, uint32_t clock);
/**
* @brief Modify uart baudrate.
* This function will reset RX/TX fifo for uart.
*
* @param uint8_t uart_no : 0 for UART0, 1 for UART1.
*
* @param uint32_t DivLatchValue : (clock << 4)/baudrate.
*
* @return None
*/
void uart_div_modify(uint8_t uart_no, uint32_t DivLatchValue);
/**
* @brief Init uart0 or uart1 for UART download booting mode.
* Please do not call this function in SDK.
*
* @param uint8_t uart_no : 0 for UART0, 1 for UART1.
*
* @param uint8_t is_sync : 0, only one UART module, easy to detect, wait until detected;
* 1, two UART modules, hard to detect, detect and return.
*
* @return None
*/
int uart_baudrate_detect(uint8_t uart_no, uint8_t is_sync);
/**
* @brief Switch printf channel of uart_tx_one_char.
* Please do not call this function when printf.
*
* @param uint8_t uart_no : 0 for UART0, 1 for UART1.
*
* @return None
*/
void uart_tx_switch(uint8_t uart_no);
/**
* @brief Switch message exchange channel for UART download booting.
* Please do not call this function in SDK.
*
* @param uint8_t uart_no : 0 for UART0, 1 for UART1.
*
* @return None
*/
void uart_buff_switch(uint8_t uart_no);
/**
* @brief Output a char to printf channel, wait until fifo not full.
*
* @param None
*
* @return OK.
*/
STATUS uart_tx_one_char(uint8_t TxChar);
/**
* @brief Output a char to message exchange channel, wait until fifo not full.
* Please do not call this function in SDK.
*
* @param None
*
* @return OK.
*/
STATUS uart_tx_one_char2(uint8_t TxChar);
/**
* @brief Wait until uart tx full empty.
*
* @param uint8_t uart_no : 0 for UART0, 1 for UART1.
*
* @return None.
*/
void uart_tx_flush(uint8_t uart_no);
/**
* @brief Wait until uart tx full empty and the last char send ok.
*
* @param uart_no : 0 for UART0, 1 for UART1
*
* The function defined in ROM code has a bug, so we define the correct version
* here for compatibility.
*/
void uart_tx_wait_idle(uint8_t uart_no);
/**
* @brief Get an input char from message channel.
* Please do not call this function in SDK.
*
* @param uint8_t *pRxChar : the pointer to store the char.
*
* @return OK for successful.
* FAIL for failed.
*/
STATUS uart_rx_one_char(uint8_t *pRxChar);
/**
* @brief Get an input char from message channel, wait until successful.
* Please do not call this function in SDK.
*
* @param None
*
* @return char : input char value.
*/
char uart_rx_one_char_block(void);
/**
* @brief Get an input string line from message channel.
* Please do not call this function in SDK.
*
* @param uint8_t *pString : the pointer to store the string.
*
* @param uint8_t MaxStrlen : the max string length, incude '\0'.
*
* @return OK.
*/
STATUS UartRxString(uint8_t *pString, uint8_t MaxStrlen);
/**
* @brief Process uart recevied information in the interrupt handler.
* Please do not call this function in SDK.
*
* @param void *para : the message receive buffer.
*
* @return None
*/
void uart_rx_intr_handler(void *para);
/**
* @brief Get an char from receive buffer.
* Please do not call this function in SDK.
*
* @param RcvMsgBuff *pRxBuff : the pointer to the struct that include receive buffer.
*
* @param uint8_t *pRxByte : the pointer to store the char.
*
* @return OK for successful.
* FAIL for failed.
*/
STATUS uart_rx_readbuff( RcvMsgBuff *pRxBuff, uint8_t *pRxByte);
/**
* @brief Get all chars from receive buffer.
* Please do not call this function in SDK.
*
* @param uint8_t *pCmdLn : the pointer to store the string.
*
* @return OK for successful.
* FAIL for failed.
*/
STATUS UartGetCmdLn(uint8_t *pCmdLn);
/**
* @brief Get uart configuration struct.
* Please do not call this function in SDK.
*
* @param None
*
* @return UartDevice * : uart configuration struct pointer.
*/
UartDevice *GetUartDevice(void);
/**
* @brief Send an packet to download tool, with SLIP escaping.
* Please do not call this function in SDK.
*
* @param uint8_t *p : the pointer to output string.
*
* @param int len : the string length.
*
* @return None.
*/
void send_packet(uint8_t *p, int len);
/**
* @brief Receive an packet from download tool, with SLIP escaping.
* Please do not call this function in SDK.
*
* @param uint8_t *p : the pointer to input string.
*
* @param int len : If string length > len, the string will be truncated.
*
* @param uint8_t is_sync : 0, only one UART module;
* 1, two UART modules.
*
* @return int : the length of the string.
*/
int recv_packet(uint8_t *p, int len, uint8_t is_sync);
/**
* @brief Send an packet to download tool, with SLIP escaping.
* Please do not call this function in SDK.
*
* @param uint8_t *pData : the pointer to input string.
*
* @param uint16_t DataLen : the string length.
*
* @return OK for successful.
* FAIL for failed.
*/
STATUS SendMsg(uint8_t *pData, uint16_t DataLen);
/**
* @brief Receive an packet from download tool, with SLIP escaping.
* Please do not call this function in SDK.
*
* @param uint8_t *pData : the pointer to input string.
*
* @param uint16_t MaxDataLen : If string length > MaxDataLen, the string will be truncated.
*
* @param uint8_t is_sync : 0, only one UART module;
* 1, two UART modules.
*
* @return OK for successful.
* FAIL for failed.
*/
STATUS RcvMsg(uint8_t *pData, uint16_t MaxDataLen, uint8_t is_sync);
/**
* @brief Check if this UART is in download connection.
* Please do not call this function in SDK.
*
* @param uint8_t uart_no : 0 for UART0, 1 for UART1.
*
* @return ETS_NO_BOOT = 0 for no.
* SEL_UART_BOOT = BIT(1) for yes.
*/
uint8_t UartConnCheck(uint8_t uart_no);
/**
* @brief Initialize the USB ACM UART
* Needs to be fed a buffer of at least 128 bytes, plus any rx buffer you may want to have.
*
* @param cdc_acm_work_mem Pointer to work mem for CDC-ACM code
* @param cdc_acm_work_mem_len Length of work mem
*/
void Uart_Init_USB(void *cdc_acm_work_mem, int cdc_acm_work_mem_len);
/**
* @brief Install handler to reset the chip when a RTS change has been detected on the CDC-ACM 'UART'.
*/
void uart_usb_enable_reset_on_rts(void);
extern UartDevice UartDev;
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* _ROM_UART_H_ */

58
tools/sdk/esp32/include/esp_rom/include/esp32h2/rom/aes.h Normal file
View File

@ -0,0 +1,58 @@
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#ifndef _ROM_AES_H_
#define _ROM_AES_H_
#include <stdint.h>
#include <stdbool.h>
#ifdef __cplusplus
extern "C" {
#endif
#define AES_BLOCK_SIZE 16
enum AES_TYPE {
AES_ENC,
AES_DEC,
};
enum AES_BITS {
AES128,
AES192,
AES256
};
void ets_aes_enable(void);
void ets_aes_disable(void);
void ets_aes_set_endian(bool key_word_swap, bool key_byte_swap,
bool in_word_swap, bool in_byte_swap,
bool out_word_swap, bool out_byte_swap);
int ets_aes_setkey(enum AES_TYPE type, const void *key, enum AES_BITS bits);
int ets_aes_setkey_enc(const void *key, enum AES_BITS bits);
int ets_aes_setkey_dec(const void *key, enum AES_BITS bits);
void ets_aes_block(const void *input, void *output);
#ifdef __cplusplus
}
#endif
#endif /* _ROM_AES_H_ */

25
tools/sdk/esp32/include/esp_rom/include/esp32h2/rom/apb_backup_dma.h Normal file
View File

@ -0,0 +1,25 @@
// Copyright 2010-2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#pragma once
#ifdef __cplusplus
extern "C" {
#endif
void ets_apb_backup_init_lock_func(void(* _apb_backup_lock)(void), void(* _apb_backup_unlock)(void));
#ifdef __cplusplus
}
#endif

43
tools/sdk/esp32/include/esp_rom/include/esp32h2/rom/bigint.h Normal file
View File

@ -0,0 +1,43 @@
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#ifndef _ROM_BIGINT_H_
#define _ROM_BIGINT_H_
#include <stdint.h>
#include <stdbool.h>
#ifdef __cplusplus
extern "C" {
#endif
void ets_bigint_enable(void);
void ets_bigint_disable(void);
int ets_bigint_multiply(const uint32_t *x, const uint32_t *y, uint32_t len_words);
int ets_bigint_modmult(const uint32_t *x, const uint32_t *y, const uint32_t *m, uint32_t m_dash, const uint32_t *rb, uint32_t len_words);
int ets_bigint_modexp(const uint32_t *x, const uint32_t *y, const uint32_t *m, uint32_t m_dash, const uint32_t *rb, bool constant_time, uint32_t len_words);
void ets_bigint_wait_finish(void);
int ets_bigint_getz(uint32_t *z, uint32_t len_words);
#ifdef __cplusplus
}
#endif
#endif /* _ROM_BIGINT_H_ */

796
tools/sdk/esp32/include/esp_rom/include/esp32h2/rom/cache.h Normal file
View File

@ -0,0 +1,796 @@
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#ifndef _ROM_CACHE_H_
#define _ROM_CACHE_H_
#include <stdint.h>
#include "esp_bit_defs.h"
#ifdef __cplusplus
extern "C" {
#endif
/** \defgroup cache_apis, cache operation related apis
* @brief cache apis
*/
/** @addtogroup cache_apis
* @{
*/
#define MIN_ICACHE_SIZE 16384
#define MAX_ICACHE_SIZE 16384
#define MIN_ICACHE_WAYS 8
#define MAX_ICACHE_WAYS 8
#define MAX_CACHE_WAYS 8
#define MIN_CACHE_LINE_SIZE 32
#define TAG_SIZE 4
#define MIN_ICACHE_BANK_NUM 1
#define MAX_ICACHE_BANK_NUM 1
#define CACHE_MEMORY_BANK_NUM 1
#define CACHE_MEMORY_IBANK_SIZE 0x4000
#define MAX_ITAG_BANK_ITEMS (MAX_ICACHE_SIZE / MAX_ICACHE_BANK_NUM / MIN_CACHE_LINE_SIZE)
#define MAX_ITAG_BLOCK_ITEMS (MAX_ICACHE_SIZE / MAX_ICACHE_BANK_NUM / MAX_ICACHE_WAYS / MIN_CACHE_LINE_SIZE)
#define MAX_ITAG_BANK_SIZE (MAX_ITAG_BANK_ITEMS * TAG_SIZE)
#define MAX_ITAG_BLOCK_SIZE (MAX_ITAG_BLOCK_ITEMS * TAG_SIZE)
typedef enum {
CACHE_DCACHE = 0,
CACHE_ICACHE0 = 1,
CACHE_ICACHE1 = 2,
} cache_t;
typedef enum {
CACHE_MEMORY_INVALID = 0,
CACHE_MEMORY_IBANK0 = BIT(0),
CACHE_MEMORY_IBANK1 = BIT(1),
CACHE_MEMORY_IBANK2 = BIT(2),
CACHE_MEMORY_IBANK3 = BIT(3),
CACHE_MEMORY_DBANK0 = BIT(0),
CACHE_MEMORY_DBANK1 = BIT(1),
CACHE_MEMORY_DBANK2 = BIT(2),
CACHE_MEMORY_DBANK3 = BIT(3),
} cache_array_t;
#define ICACHE_SIZE_16KB CACHE_SIZE_HALF
#define ICACHE_SIZE_32KB CACHE_SIZE_FULL
#define DCACHE_SIZE_32KB CACHE_SIZE_HALF
#define DCACHE_SIZE_64KB CACHE_SIZE_FULL
typedef enum {
CACHE_SIZE_HALF = 0, /*!< 8KB for icache and dcache */
CACHE_SIZE_FULL = 1, /*!< 16KB for icache and dcache */
} cache_size_t;
typedef enum {
CACHE_4WAYS_ASSOC = 0, /*!< 4 way associated cache */
CACHE_8WAYS_ASSOC = 1, /*!< 8 way associated cache */
} cache_ways_t;
typedef enum {
CACHE_LINE_SIZE_16B = 0, /*!< 16 Byte cache line size */
CACHE_LINE_SIZE_32B = 1, /*!< 32 Byte cache line size */
CACHE_LINE_SIZE_64B = 2, /*!< 64 Byte cache line size */
} cache_line_size_t;
typedef enum {
CACHE_AUTOLOAD_POSITIVE = 0, /*!< cache autoload step is positive */
CACHE_AUTOLOAD_NEGATIVE = 1, /*!< cache autoload step is negative */
} cache_autoload_order_t;
#define CACHE_AUTOLOAD_STEP(i) ((i) - 1)
typedef enum {
CACHE_AUTOLOAD_MISS_TRIGGER = 0, /*!< autoload only triggered by cache miss */
CACHE_AUTOLOAD_HIT_TRIGGER = 1, /*!< autoload only triggered by cache hit */
CACHE_AUTOLOAD_BOTH_TRIGGER = 2, /*!< autoload triggered both by cache miss and hit */
} cache_autoload_trigger_t;
typedef enum {
CACHE_FREEZE_ACK_BUSY = 0, /*!< in this mode, cache ack busy to CPU if a cache miss happens*/
CACHE_FREEZE_ACK_ERROR = 1, /*!< in this mode, cache ack wrong data to CPU and trigger an error if a cache miss happens */
} cache_freeze_mode_t;
struct cache_mode {
uint32_t cache_size; /*!< cache size in byte */
uint16_t cache_line_size; /*!< cache line size in byte */
uint8_t cache_ways; /*!< cache ways, always 4 */
uint8_t ibus; /*!< the cache index, 0 for dcache, 1 for icache */
};
struct icache_tag_item {
uint32_t valid:1; /*!< the tag item is valid or not */
uint32_t lock:1; /*!< the cache line is locked or not */
uint32_t fifo_cnt:3; /*!< fifo cnt, 0 ~ 3 for 4 ways cache */
uint32_t tag:13; /*!< the tag is the high part of the cache address, however is only 16MB (8MB Ibus + 8MB Dbus) range, and without low part */
uint32_t reserved:14;
};
struct autoload_config {
uint8_t order; /*!< autoload step is positive or negative */
uint8_t trigger; /*!< autoload trigger */
uint8_t ena0; /*!< autoload region0 enable */
uint8_t ena1; /*!< autoload region1 enable */
uint32_t addr0; /*!< autoload region0 start address */
uint32_t size0; /*!< autoload region0 size */
uint32_t addr1; /*!< autoload region1 start address */
uint32_t size1; /*!< autoload region1 size */
};
struct tag_group_info {
struct cache_mode mode; /*!< cache and cache mode */
uint32_t filter_addr; /*!< the address that used to generate the struct */
uint32_t vaddr_offset; /*!< virtual address offset of the cache ways */
uint32_t tag_addr[MAX_CACHE_WAYS]; /*!< tag memory address, only [0~mode.ways-1] is valid to use */
uint32_t cache_memory_offset[MAX_CACHE_WAYS]; /*!< cache memory address, only [0~mode.ways-1] is valid to use */
};
struct lock_config {
uint32_t addr; /*!< manual lock address*/
uint16_t size; /*!< manual lock size*/
uint16_t group; /*!< manual lock group, 0 or 1*/
};
struct cache_internal_stub_table {
uint32_t (* icache_line_size)(void);
uint32_t (* icache_addr)(uint32_t addr);
uint32_t (* dcache_addr)(uint32_t addr);
void (* invalidate_icache_items)(uint32_t addr, uint32_t items);
void (* lock_icache_items)(uint32_t addr, uint32_t items);
void (* unlock_icache_items)(uint32_t addr, uint32_t items);
uint32_t (* suspend_icache_autoload)(void);
void (* resume_icache_autoload)(uint32_t autoload);
void (* freeze_icache_enable)(cache_freeze_mode_t mode);
void (* freeze_icache_disable)(void);
int (* op_addr)(uint32_t start_addr, uint32_t size, uint32_t cache_line_size, uint32_t max_sync_num, void(* cache_Iop)(uint32_t, uint32_t));
};
/* Defined in the interface file, default value is rom_default_cache_internal_table */
extern const struct cache_internal_stub_table* rom_cache_internal_table_ptr;
typedef void (* cache_op_start)(void);
typedef void (* cache_op_end)(void);
typedef struct {
cache_op_start start;
cache_op_end end;
} cache_op_cb_t;
/* Defined in the interface file, default value is NULL */
extern const cache_op_cb_t* rom_cache_op_cb;
#define ESP_ROM_ERR_INVALID_ARG 1
#define MMU_SET_ADDR_ALIGNED_ERROR 2
#define MMU_SET_PASE_SIZE_ERROR 3
#define MMU_SET_VADDR_OUT_RANGE 4
#define CACHE_OP_ICACHE_Y 1
#define CACHE_OP_ICACHE_N 0
/**
* @brief Initialise cache mmu, mark all entries as invalid.
* Please do not call this function in your SDK application.
*
* @param None
*
* @return None
*/
void Cache_MMU_Init(void);
/**
* @brief Set ICache mmu mapping.
* Please do not call this function in your SDK application.
*
* @param uint32_t ext_ram : DPORT_MMU_ACCESS_FLASH for flash, DPORT_MMU_INVALID for invalid. In
* esp32h2, external memory is always flash
*
* @param uint32_t vaddr : virtual address in CPU address space.
* Can be Iram0,Iram1,Irom0,Drom0 and AHB buses address.
* Should be aligned by psize.
*
* @param uint32_t paddr : physical address in external memory.
* Should be aligned by psize.
*
* @param uint32_t psize : page size of ICache, in kilobytes. Should be 64 here.
*
* @param uint32_t num : pages to be set.
*
* @param uint32_t fixed : 0 for physical pages grow with virtual pages, other for virtual pages map to same physical page.
*
* @return uint32_t: error status
* 0 : mmu set success
* 2 : vaddr or paddr is not aligned
* 3 : psize error
* 4 : vaddr is out of range
*/
int Cache_Ibus_MMU_Set(uint32_t ext_ram, uint32_t vaddr, uint32_t paddr, uint32_t psize, uint32_t num, uint32_t fixed);
/**
* @brief Set DCache mmu mapping.
* Please do not call this function in your SDK application.
*
* @param uint32_t ext_ram : DPORT_MMU_ACCESS_FLASH for flash, DPORT_MMU_INVALID for invalid. In
* esp32h2, external memory is always flash
*
* @param uint32_t vaddr : virtual address in CPU address space.
* Can be DRam0, DRam1, DRom0, DPort and AHB buses address.
* Should be aligned by psize.
*
* @param uint32_t paddr : physical address in external memory.
* Should be aligned by psize.
*
* @param uint32_t psize : page size of DCache, in kilobytes. Should be 64 here.
*
* @param uint32_t num : pages to be set.
* @param uint32_t fixed : 0 for physical pages grow with virtual pages, other for virtual pages map to same physical page.
*
* @return uint32_t: error status
* 0 : mmu set success
* 2 : vaddr or paddr is not aligned
* 3 : psize error
* 4 : vaddr is out of range
*/
int Cache_Dbus_MMU_Set(uint32_t ext_ram, uint32_t vaddr, uint32_t paddr, uint32_t psize, uint32_t num, uint32_t fixed);
/**
* @brief Count the pages in the bus room address which map to Flash.
* Please do not call this function in your SDK application.
*
* @param uint32_t bus : the bus to count with.
*
* @param uint32_t * page0_mapped : value should be initial by user, 0 for not mapped, other for mapped count.
*
* return uint32_t : the number of pages which map to Flash.
*/
uint32_t Cache_Count_Flash_Pages(uint32_t bus, uint32_t * page0_mapped);
/**
* @brief allocate memory to used by ICache.
* Please do not call this function in your SDK application.
*
* @param cache_array_t icache_low : the data array bank used by icache low part. Due to timing constraint, can only be CACHE_MEMORY_INVALID, CACHE_MEMORY_IBANK0
*
* return none
*/
void Cache_Occupy_ICache_MEMORY(cache_array_t icache_low);
/**
* @brief Get cache mode of ICache or DCache.
* Please do not call this function in your SDK application.
*
* @param struct cache_mode * mode : the pointer of cache mode struct, caller should set the icache field
*
* return none
*/
void Cache_Get_Mode(struct cache_mode * mode);
/**
* @brief set ICache modes: cache size, associate ways and cache line size.
* Please do not call this function in your SDK application.
*
* @param cache_size_t cache_size : the cache size, can be CACHE_SIZE_HALF and CACHE_SIZE_FULL
*
* @param cache_ways_t ways : the associate ways of cache, can be CACHE_4WAYS_ASSOC and CACHE_8WAYS_ASSOC
*
* @param cache_line_size_t cache_line_size : the cache line size, can be CACHE_LINE_SIZE_16B, CACHE_LINE_SIZE_32B and CACHE_LINE_SIZE_64B
*
* return none
*/
void Cache_Set_ICache_Mode(cache_size_t cache_size, cache_ways_t ways, cache_line_size_t cache_line_size);
/**
* @brief set DCache modes: cache size, associate ways and cache line size.
* Please do not call this function in your SDK application.
*
* @param cache_size_t cache_size : the cache size, can be CACHE_SIZE_8KB and CACHE_SIZE_16KB
*
* @param cache_ways_t ways : the associate ways of cache, can be CACHE_4WAYS_ASSOC and CACHE_8WAYS_ASSOC
*
* @param cache_line_size_t cache_line_size : the cache line size, can be CACHE_LINE_SIZE_16B, CACHE_LINE_SIZE_32B and CACHE_LINE_SIZE_64B
*
* return none
*/
void Cache_Set_DCache_Mode(cache_size_t cache_size, cache_ways_t ways, cache_line_size_t cache_line_size);
/**
* @brief check if the address is accessed through ICache.
* Please do not call this function in your SDK application.
*
* @param uint32_t addr : the address to check.
*
* @return 1 if the address is accessed through ICache, 0 if not.
*/
uint32_t Cache_Address_Through_ICache(uint32_t addr);
/**
* @brief check if the address is accessed through DCache.
* Please do not call this function in your SDK application.
*
* @param uint32_t addr : the address to check.
*
* @return 1 if the address is accessed through DCache, 0 if not.
*/
uint32_t Cache_Address_Through_DCache(uint32_t addr);
/**
* @brief Init mmu owner register to make i/d cache use half mmu entries.
*
* @param None
*
* @return None
*/
void Cache_Owner_Init(void);
/**
* @brief Invalidate the cache items for ICache.
* Operation will be done CACHE_LINE_SIZE aligned.
* If the region is not in ICache addr room, nothing will be done.
* Please do not call this function in your SDK application.
*
* @param uint32_t addr: start address to invalidate
*
* @param uint32_t items: cache lines to invalidate, items * cache_line_size should not exceed the bus address size(16MB/32MB/64MB)
*
* @return None
*/
void Cache_Invalidate_ICache_Items(uint32_t addr, uint32_t items);
/**
* @brief Invalidate the Cache items in the region from ICache or DCache.
* If the region is not in Cache addr room, nothing will be done.
* Please do not call this function in your SDK application.
*
* @param uint32_t addr : invalidated region start address.
*
* @param uint32_t size : invalidated region size.
*
* @return 0 for success
* 1 for invalid argument
*/
int Cache_Invalidate_Addr(uint32_t addr, uint32_t size);
/**
* @brief Invalidate all cache items in ICache.
* Please do not call this function in your SDK application.
*
* @param None
*
* @return None
*/
void Cache_Invalidate_ICache_All(void);
/**
* @brief Mask all buses through ICache and DCache.
* Please do not call this function in your SDK application.
*
* @param None
*
* @return None
*/
void Cache_Mask_All(void);
/**
* @brief Suspend ICache auto preload operation, then you can resume it after some ICache operations.
* Please do not call this function in your SDK application.
*
* @param None
*
* @return uint32_t : 0 for ICache not auto preload before suspend.
*/
uint32_t Cache_Suspend_ICache_Autoload(void);
/**
* @brief Resume ICache auto preload operation after some ICache operations.
* Please do not call this function in your SDK application.
*
* @param uint32_t autoload : 0 for ICache not auto preload before suspend.
*
* @return None.
*/
void Cache_Resume_ICache_Autoload(uint32_t autoload);
/**
* @brief Start an ICache manual preload, will suspend auto preload of ICache.
* Please do not call this function in your SDK application.
*
* @param uint32_t addr : start address of the preload region.
*
* @param uint32_t size : size of the preload region, should not exceed the size of ICache.
*
* @param uint32_t order : the preload order, 0 for positive, other for negative
*
* @return uint32_t : 0 for ICache not auto preload before manual preload.
*/
uint32_t Cache_Start_ICache_Preload(uint32_t addr, uint32_t size, uint32_t order);
/**
* @brief Return if the ICache manual preload done.
* Please do not call this function in your SDK application.
*
* @param None
*
* @return uint32_t : 0 for ICache manual preload not done.
*/
uint32_t Cache_ICache_Preload_Done(void);
/**
* @brief End the ICache manual preload to resume auto preload of ICache.
* Please do not call this function in your SDK application.
*
* @param uint32_t autoload : 0 for ICache not auto preload before manual preload.
*
* @return None
*/
void Cache_End_ICache_Preload(uint32_t autoload);
/**
* @brief Config autoload parameters of ICache.
* Please do not call this function in your SDK application.
*
* @param struct autoload_config * config : autoload parameters.
*
* @return None
*/
void Cache_Config_ICache_Autoload(const struct autoload_config * config);
/**
* @brief Enable auto preload for ICache.
* Please do not call this function in your SDK application.
*
* @param None
*
* @return None
*/
void Cache_Enable_ICache_Autoload(void);
/**
* @brief Disable auto preload for ICache.
* Please do not call this function in your SDK application.
*
* @param None
*
* @return None
*/
void Cache_Disable_ICache_Autoload(void);
/**
* @brief Config a group of prelock parameters of ICache.
* Please do not call this function in your SDK application.
*
* @param struct lock_config * config : a group of lock parameters.
*
* @return None
*/
void Cache_Enable_ICache_PreLock(const struct lock_config *config);
/**
* @brief Disable a group of prelock parameters for ICache.
* However, the locked data will not be released.
* Please do not call this function in your SDK application.
*
* @param uint16_t group : 0 for group0, 1 for group1.
*
* @return None
*/
void Cache_Disable_ICache_PreLock(uint16_t group);
/**
* @brief Lock the cache items for ICache.
* Operation will be done CACHE_LINE_SIZE aligned.
* If the region is not in ICache addr room, nothing will be done.
* Please do not call this function in your SDK application.
*
* @param uint32_t addr: start address to lock
*
* @param uint32_t items: cache lines to lock, items * cache_line_size should not exceed the bus address size(16MB/32MB/64MB)
*
* @return None
*/
void Cache_Lock_ICache_Items(uint32_t addr, uint32_t items);
/**
* @brief Unlock the cache items for ICache.
* Operation will be done CACHE_LINE_SIZE aligned.
* If the region is not in ICache addr room, nothing will be done.
* Please do not call this function in your SDK application.
*
* @param uint32_t addr: start address to unlock
*
* @param uint32_t items: cache lines to unlock, items * cache_line_size should not exceed the bus address size(16MB/32MB/64MB)
*
* @return None
*/
void Cache_Unlock_ICache_Items(uint32_t addr, uint32_t items);
/**
* @brief Lock the cache items in tag memory for ICache or DCache.
* Please do not call this function in your SDK application.
*
* @param uint32_t addr : start address of lock region.
*
* @param uint32_t size : size of lock region.
*
* @return 0 for success
* 1 for invalid argument
*/
int Cache_Lock_Addr(uint32_t addr, uint32_t size);
/**
* @brief Unlock the cache items in tag memory for ICache or DCache.
* Please do not call this function in your SDK application.
*
* @param uint32_t addr : start address of unlock region.
*
* @param uint32_t size : size of unlock region.
*
* @return 0 for success
* 1 for invalid argument
*/
int Cache_Unlock_Addr(uint32_t addr, uint32_t size);
/**
* @brief Disable ICache access for the cpu.
* This operation will make all ICache tag memory invalid, CPU can't access ICache, ICache will keep idle.
* Please do not call this function in your SDK application.
*
* @return uint32_t : auto preload enabled before
*/
uint32_t Cache_Disable_ICache(void);
/**
* @brief Enable ICache access for the cpu.
* Please do not call this function in your SDK application.
*
* @param uint32_t autoload : ICache will preload then.
*
* @return None
*/
void Cache_Enable_ICache(uint32_t autoload);
/**
* @brief Suspend ICache access for the cpu.
* The ICache tag memory is still there, CPU can't access ICache, ICache will keep idle.
* Please do not change MMU, cache mode or tag memory(tag memory can be changed in some special case).
* Please do not call this function in your SDK application.
*
* @param None
*
* @return uint32_t : auto preload enabled before
*/
uint32_t Cache_Suspend_ICache(void);
/**
* @brief Resume ICache access for the cpu.
* Please do not call this function in your SDK application.
*
* @param uint32_t autoload : ICache will preload then.
*
* @return None
*/
void Cache_Resume_ICache(uint32_t autoload);
/**
* @brief Get ICache cache line size
*
* @param None
*
* @return uint32_t: 16, 32, 64 Byte
*/
uint32_t Cache_Get_ICache_Line_Size(void);
/**
* @brief Set default mode from boot, 8KB ICache, 16Byte cache line size.
*
* @param None
*
* @return None
*/
void Cache_Set_Default_Mode(void);
/**
* @brief Set default mode from boot, 8KB ICache, 16Byte cache line size.
*
* @param None
*
* @return None
*/
void Cache_Enable_Defalut_ICache_Mode(void);
/**
* @brief Enable freeze for ICache.
* Any miss request will be rejected, including cpu miss and preload/autoload miss.
* Please do not call this function in your SDK application.
*
* @param cache_freeze_mode_t mode : 0 for assert busy 1 for assert hit
*
* @return None
*/
void Cache_Freeze_ICache_Enable(cache_freeze_mode_t mode);
/**
* @brief Disable freeze for ICache.
* Please do not call this function in your SDK application.
*
* @return None
*/
void Cache_Freeze_ICache_Disable(void);
/**
* @brief Travel tag memory to run a call back function.
* ICache and DCache are suspend when doing this.
* The callback will get the parameter tag_group_info, which will include a group of tag memory addresses and cache memory addresses.
* Please do not call this function in your SDK application.
*
* @param struct cache_mode * mode : the cache to check and the cache mode.
*
* @param uint32_t filter_addr : only the cache lines which may include the filter_address will be returned to the call back function.
* 0 for do not filter, all cache lines will be returned.
*
* @param void (* process)(struct tag_group_info *) : call back function, which may be called many times, a group(the addresses in the group are in the same position in the cache ways) a time.
*
* @return None
*/
void Cache_Travel_Tag_Memory(struct cache_mode * mode, uint32_t filter_addr, void (* process)(struct tag_group_info *));
/**
* @brief Get the virtual address from cache mode, cache tag and the virtual address offset of cache ways.
* Please do not call this function in your SDK application.
*
* @param struct cache_mode * mode : the cache to calculate the virtual address and the cache mode.
*
* @param uint32_t tag : the tag part fo a tag item, 12-14 bits.
*
* @param uint32_t addr_offset : the virtual address offset of the cache ways.
*
* @return uint32_t : the virtual address.
*/
uint32_t Cache_Get_Virtual_Addr(struct cache_mode *mode, uint32_t tag, uint32_t vaddr_offset);
/**
* @brief Get cache memory block base address.
* Please do not call this function in your SDK application.
*
* @param uint32_t icache : 0 for dcache, other for icache.
*
* @param uint32_t bank_no : 0 ~ 3 bank.
*
* @return uint32_t : the cache memory block base address, 0 if the block not used.
*/
uint32_t Cache_Get_Memory_BaseAddr(uint32_t icache, uint32_t bank_no);
/**
* @brief Get the cache memory address from cache mode, cache memory offset and the virtual address offset of cache ways.
* Please do not call this function in your SDK application.
*
* @param struct cache_mode * mode : the cache to calculate the virtual address and the cache mode.
*
* @param uint32_t cache_memory_offset : the cache memory offset of the whole cache (ICache or DCache) for the cache line.
*
* @param uint32_t addr_offset : the virtual address offset of the cache ways.
*
* @return uint32_t : the virtual address.
*/
uint32_t Cache_Get_Memory_Addr(struct cache_mode *mode, uint32_t cache_memory_offset, uint32_t vaddr_offset);
/**
* @brief Get the cache memory value by DRAM address.
* Please do not call this function in your SDK application.
*
* @param uint32_t cache_memory_addr : DRAM address for the cache memory, should be 4 byte aligned for IBus address.
*
* @return uint32_t : the word value of the address.
*/
uint32_t Cache_Get_Memory_value(uint32_t cache_memory_addr);
/**
* @}
*/
/**
* @brief Get the cache MMU IROM end address.
* Please do not call this function in your SDK application.
*
* @param void
*
* @return uint32_t : the word value of the address.
*/
uint32_t Cache_Get_IROM_MMU_End(void);
/**
* @brief Get the cache MMU DROM end address.
* Please do not call this function in your SDK application.
*
* @param void
*
* @return uint32_t : the word value of the address.
*/
uint32_t Cache_Get_DROM_MMU_End(void);
/**
* @brief Lock the permission control section configuration. After lock, any
* configuration modification will be bypass. Digital reset will clear the lock!
* Please do not call this function in your SDK application.
*
* @param int ibus : 1 for lock ibus pms, 0 for lock dbus pms
*
* @return None
*/
void Cache_Pms_Lock(int ibus);
/**
* @brief Set three ibus pms boundary address, which will determine pms reject section and section 1/2.
* Please do not call this function in your SDK application.
*
* @param uint32_t ibus_boundary0_addr : vaddress for split line0
*
* @param uint32_t ibus_boundary1_addr : vaddress for split line1
*
* @param uint32_t ibus_boundary2_addr : vaddress for split line2
*
* @return int : ESP_ROM_ERR_INVALID_ARG for invalid address, 0 for success
*/
int Cache_Ibus_Pms_Set_Addr(uint32_t ibus_boundary0_addr, uint32_t ibus_boundary1_addr, uint32_t ibus_boundary2_addr);
/**
* @brief Set three ibus pms attribute, which will determine pms in different section and world.
* Please do not call this function in your SDK application.
*
* @param uint32_t ibus_pms_sct2_attr : attr for section2
*
* @param uint32_t ibus_pms_sct1_attr : attr for section1
*
* @return None
*/
void Cache_Ibus_Pms_Set_Attr(uint32_t ibus_pms_sct2_attr, uint32_t ibus_pms_sct1_attr);
/**
* @brief Set three dbus pms boundary address, which will determine pms reject section and section 1/2.
* Please do not call this function in your SDK application.
*
* @param uint32_t dbus_boundary0_addr : vaddress for split line0
*
* @param uint32_t dbus_boundary1_addr : vaddress for split line1
*
* @param uint32_t dbus_boundary2_addr : vaddress for split line2
*
* @return int : ESP_ROM_ERR_INVALID_ARG for invalid address, 0 for success
*/
int Cache_Dbus_Pms_Set_Addr(uint32_t dbus_boundary0_addr, uint32_t dbus_boundary1_addr, uint32_t dbus_boundary2_addr);
/**
* @brief Set three dbus pms attribute, which will determine pms in different section and world.
* Please do not call this function in your SDK application.
*
* @param uint32_t dbus_pms_sct2_attr : attr for section2
*
* @param uint32_t dbus_pms_sct1_attr : attr for section1
*
* @return None
*/
void Cache_Dbus_Pms_Set_Attr(uint32_t dbus_pms_sct2_attr, uint32_t dbus_pms_sct1_attr);
/**
* @brief Used by SPI flash mmap
*
*/
uint32_t flash_instr_rodata_start_page(uint32_t bus);
uint32_t flash_instr_rodata_end_page(uint32_t bus);
#ifdef __cplusplus
}
#endif
#endif /* _ROM_CACHE_H_ */

127
tools/sdk/esp32/include/esp_rom/include/esp32h2/rom/crc.h Normal file
View File

@ -0,0 +1,127 @@
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#ifndef ROM_CRC_H
#define ROM_CRC_H
#include <stdint.h>
#ifdef __cplusplus
extern "C" {
#endif
/** \defgroup crc_apis, uart configuration and communication related apis
* @brief crc apis
*/
/** @addtogroup crc_apis
* @{
*/
/* Standard CRC8/16/32 algorithms. */
// CRC-8 x8+x2+x1+1 0x07
// CRC16-CCITT x16+x12+x5+1 1021 ISO HDLC, ITU X.25, V.34/V.41/V.42, PPP-FCS
// CRC32:
//G(x) = x32 +x26 + x23 + x22 + x16 + x12 + x11 + x10 + x8 + x7 + x5 + x4 + x2 + x1 + 1
//If your buf is not continuous, you can use the first result to be the second parameter.
/**
* @brief Crc32 value that is in little endian.
*
* @param uint32_t crc : init crc value, use 0 at the first use.
*
* @param uint8_t const *buf : buffer to start calculate crc.
*
* @param uint32_t len : buffer length in byte.
*
* @return None
*/
uint32_t crc32_le(uint32_t crc, uint8_t const *buf, uint32_t len);
/**
* @brief Crc32 value that is in big endian.
*
* @param uint32_t crc : init crc value, use 0 at the first use.
*
* @param uint8_t const *buf : buffer to start calculate crc.
*
* @param uint32_t len : buffer length in byte.
*
* @return None
*/
uint32_t crc32_be(uint32_t crc, uint8_t const *buf, uint32_t len);
/**
* @brief Crc16 value that is in little endian.
*
* @param uint16_t crc : init crc value, use 0 at the first use.
*
* @param uint8_t const *buf : buffer to start calculate crc.
*
* @param uint32_t len : buffer length in byte.
*
* @return None
*/
uint16_t crc16_le(uint16_t crc, uint8_t const *buf, uint32_t len);
/**
* @brief Crc16 value that is in big endian.
*
* @param uint16_t crc : init crc value, use 0 at the first use.
*
* @param uint8_t const *buf : buffer to start calculate crc.
*
* @param uint32_t len : buffer length in byte.
*
* @return None
*/
uint16_t crc16_be(uint16_t crc, uint8_t const *buf, uint32_t len);
/**
* @brief Crc8 value that is in little endian.
*
* @param uint8_t crc : init crc value, use 0 at the first use.
*
* @param uint8_t const *buf : buffer to start calculate crc.
*
* @param uint32_t len : buffer length in byte.
*
* @return None
*/
uint8_t crc8_le(uint8_t crc, uint8_t const *buf, uint32_t len);
/**
* @brief Crc8 value that is in big endian.
*
* @param uint32_t crc : init crc value, use 0 at the first use.
*
* @param uint8_t const *buf : buffer to start calculate crc.
*
* @param uint32_t len : buffer length in byte.
*
* @return None
*/
uint8_t crc8_be(uint8_t crc, uint8_t const *buf, uint32_t len);
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif

150
tools/sdk/esp32/include/esp_rom/include/esp32h2/rom/digital_signature.h Normal file
View File

@ -0,0 +1,150 @@
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#pragma once
#ifdef __cplusplus
extern "C" {
#endif
#include <stdint.h>
#include <stdbool.h>
#define ETS_DS_MAX_BITS 3072
#define ETS_DS_IV_LEN 16
/* Length of parameter 'C' stored in flash (not including IV)
Comprises encrypted Y, M, rinv, md (32), mprime (4), length (4), padding (8)
Note that if ETS_DS_MAX_BITS<4096, 'C' needs to be split up when writing to hardware
*/
#define ETS_DS_C_LEN ((ETS_DS_MAX_BITS * 3 / 8) + 32 + 8 + 8)
/* Encrypted ETS data. Recommended to store in flash in this format.
*/
typedef struct {
/* RSA LENGTH register parameters
* (number of words in RSA key & operands, minus one).
*
*
* This value must match the length field encrypted and stored in 'c',
* or invalid results will be returned. (The DS peripheral will
* always use the value in 'c', not this value, so an attacker can't
* alter the DS peripheral results this way, it will just truncate or
* extend the message and the resulting signature in software.)
*/
unsigned rsa_length;
/* IV value used to encrypt 'c' */
uint8_t iv[ETS_DS_IV_LEN];
/* Encrypted Digital Signature parameters. Result of AES-CBC encryption
of plaintext values. Includes an encrypted message digest.
*/
uint8_t c[ETS_DS_C_LEN];
} ets_ds_data_t;
typedef enum {
ETS_DS_OK,
ETS_DS_INVALID_PARAM, /* Supplied parameters are invalid */
ETS_DS_INVALID_KEY, /* HMAC peripheral failed to supply key */
ETS_DS_INVALID_PADDING, /* 'c' decrypted with invalid padding */
ETS_DS_INVALID_DIGEST, /* 'c' decrypted with invalid digest */
} ets_ds_result_t;
void ets_ds_enable(void);
void ets_ds_disable(void);
/*
* @brief Start signing a message (or padded message digest) using the Digital Signature peripheral
*
* - @param message Pointer to message (or padded digest) containing the message to sign. Should be
* (data->rsa_length + 1)*4 bytes long. @param data Pointer to DS data. Can be a pointer to data
* in flash.
*
* Caller must have already called ets_ds_enable() and ets_hmac_calculate_downstream() before calling
* this function, and is responsible for calling ets_ds_finish_sign() and then
* ets_hmac_invalidate_downstream() afterwards.
*
* @return ETS_DS_OK if signature is in progress, ETS_DS_INVALID_PARAM if param is invalid,
* EST_DS_INVALID_KEY if key or HMAC peripheral is configured incorrectly.
*/
ets_ds_result_t ets_ds_start_sign(const void *message, const ets_ds_data_t *data);
/*
* @brief Returns true if the DS peripheral is busy following a call to ets_ds_start_sign()
*
* A result of false indicates that a call to ets_ds_finish_sign() will not block.
*
* Only valid if ets_ds_enable() has been called.
*/
bool ets_ds_is_busy(void);
/* @brief Finish signing a message using the Digital Signature peripheral
*
* Must be called after ets_ds_start_sign(). Can use ets_ds_busy() to wait until
* peripheral is no longer busy.
*
* - @param signature Pointer to buffer to contain the signature. Should be
* (data->rsa_length + 1)*4 bytes long.
* - @param data Should match the 'data' parameter passed to ets_ds_start_sign()
*
* @param ETS_DS_OK if signing succeeded, ETS_DS_INVALID_PARAM if param is invalid,
* ETS_DS_INVALID_DIGEST or ETS_DS_INVALID_PADDING if there is a problem with the
* encrypted data digest or padding bytes (in case of ETS_DS_INVALID_PADDING, a
* digest is produced anyhow.)
*/
ets_ds_result_t ets_ds_finish_sign(void *signature, const ets_ds_data_t *data);
/* Plaintext parameters used by Digital Signature.
Not used for signing with DS peripheral, but can be encrypted
in-device by calling ets_ds_encrypt_params()
*/
typedef struct {
uint32_t Y[ETS_DS_MAX_BITS / 32];
uint32_t M[ETS_DS_MAX_BITS / 32];
uint32_t Rb[ETS_DS_MAX_BITS / 32];
uint32_t M_prime;
uint32_t length;
} ets_ds_p_data_t;
typedef enum {
ETS_DS_KEY_HMAC, /* The HMAC key (as stored in efuse) */
ETS_DS_KEY_AES, /* The AES key (as derived from HMAC key by HMAC peripheral in downstream mode) */
} ets_ds_key_t;
/* @brief Encrypt DS parameters suitable for storing and later use with DS peripheral
*
* @param data Output buffer to store encrypted data, suitable for later use generating signatures.
* @param iv Pointer to 16 byte IV buffer, will be copied into 'data'. Should be randomly generated bytes each time.
* @param p_data Pointer to input plaintext key data. The expectation is this data will be deleted after this process is done and 'data' is stored.
* @param key Pointer to 32 bytes of key data. Type determined by key_type parameter. The expectation is the corresponding HMAC key will be stored to efuse and then permanently erased.
* @param key_type Type of key stored in 'key' (either the AES-256 DS key, or an HMAC DS key from which the AES DS key is derived using HMAC peripheral)
*
* @return ETS_DS_INVALID_PARAM if any parameter is invalid, or ETS_DS_OK if 'data' is successfully generated from the input parameters.
*/
ets_ds_result_t ets_ds_encrypt_params(ets_ds_data_t *data, const void *iv, const ets_ds_p_data_t *p_data, const void *key, ets_ds_key_t key_type);
#ifdef __cplusplus
}
#endif

384
tools/sdk/esp32/include/esp_rom/include/esp32h2/rom/efuse.h Normal file
View File

@ -0,0 +1,384 @@
/*
* SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef _ROM_EFUSE_H_
#define _ROM_EFUSE_H_
#ifdef __cplusplus
extern "C" {
#endif
#include <stdint.h>
#include <stddef.h>
#include <stdbool.h>
/** \defgroup efuse_APIs efuse APIs
* @brief ESP32 efuse read/write APIs
* @attention
*
*/
/** @addtogroup efuse_APIs
* @{
*/
typedef enum {
ETS_EFUSE_KEY_PURPOSE_USER = 0,
ETS_EFUSE_KEY_PURPOSE_RESERVED = 1,
ETS_EFUSE_KEY_PURPOSE_XTS_AES_128_KEY = 4,
ETS_EFUSE_KEY_PURPOSE_HMAC_DOWN_ALL = 5,
ETS_EFUSE_KEY_PURPOSE_HMAC_DOWN_JTAG = 6,
ETS_EFUSE_KEY_PURPOSE_HMAC_DOWN_DIGITAL_SIGNATURE = 7,
ETS_EFUSE_KEY_PURPOSE_HMAC_UP = 8,
ETS_EFUSE_KEY_PURPOSE_SECURE_BOOT_DIGEST0 = 9,
ETS_EFUSE_KEY_PURPOSE_SECURE_BOOT_DIGEST1 = 10,
ETS_EFUSE_KEY_PURPOSE_SECURE_BOOT_DIGEST2 = 11,
ETS_EFUSE_KEY_PURPOSE_MAX,
} ets_efuse_purpose_t;
typedef enum {
ETS_EFUSE_BLOCK0 = 0,
ETS_EFUSE_MAC_SPI_SYS_0 = 1,
ETS_EFUSE_BLOCK_SYS_DATA = 2,
ETS_EFUSE_BLOCK_USR_DATA = 3,
ETS_EFUSE_BLOCK_KEY0 = 4,
ETS_EFUSE_BLOCK_KEY1 = 5,
ETS_EFUSE_BLOCK_KEY2 = 6,
ETS_EFUSE_BLOCK_KEY3 = 7,
ETS_EFUSE_BLOCK_KEY4 = 8,
ETS_EFUSE_BLOCK_KEY5 = 9,
ETS_EFUSE_BLOCK_KEY6 = 10,
ETS_EFUSE_BLOCK_MAX,
} ets_efuse_block_t;
/**
* @brief set timing accroding the apb clock, so no read error or write error happens.
*
* @param clock: apb clock in HZ, only accept 5M(in FPGA), 10M(in FPGA), 20M, 40M, 80M.
*
* @return : 0 if success, others if clock not accepted
*/
int ets_efuse_set_timing(uint32_t clock);
/**
* @brief Enable efuse subsystem. Called after reset. Doesn't need to be called again.
*/
void ets_efuse_start(void);
/**
* @brief Efuse read operation: copies data from physical efuses to efuse read registers.
*
* @param null
*
* @return : 0 if success, others if apb clock is not accepted
*/
int ets_efuse_read(void);
/**
* @brief Efuse write operation: Copies data from efuse write registers to efuse. Operates on a single block of efuses at a time.
*
* @note This function does not update read efuses, call ets_efuse_read() once all programming is complete.
*
* @return : 0 if success, others if apb clock is not accepted
*/
int ets_efuse_program(ets_efuse_block_t block);
/**
* @brief Set all Efuse program registers to zero.
*
* Call this before writing new data to the program registers.
*/
void ets_efuse_clear_program_registers(void);
/**
* @brief Program a block of key data to an efuse block
*
* @param key_block Block to read purpose for. Must be in range ETS_EFUSE_BLOCK_KEY0 to ETS_EFUSE_BLOCK_KEY6. Key block must be unused (@ref ets_efuse_key_block_unused).
* @param purpose Purpose to set for this key. Purpose must be already unset.
* @param data Pointer to data to write.
* @param data_len Length of data to write.
*
* @note This function also calls ets_efuse_program() for the specified block, and for block 0 (setting the purpose)
*/
int ets_efuse_write_key(ets_efuse_block_t key_block, ets_efuse_purpose_t purpose, const void *data, size_t data_len);
/* @brief Return the address of a particular efuse block's first read register
*
* @param block Index of efuse block to look up
*
* @return 0 if block is invalid, otherwise a numeric read register address
* of the first word in the block.
*/
uint32_t ets_efuse_get_read_register_address(ets_efuse_block_t block);
/**
* @brief Return the current purpose set for an efuse key block
*
* @param key_block Block to read purpose for. Must be in range ETS_EFUSE_BLOCK_KEY0 to ETS_EFUSE_BLOCK_KEY6.
*/
ets_efuse_purpose_t ets_efuse_get_key_purpose(ets_efuse_block_t key_block);
/**
* @brief Find a key block with the particular purpose set
*
* @param purpose Purpose to search for.
* @param[out] key_block Pointer which will be set to the key block if found. Can be NULL, if only need to test the key block exists.
* @return true if found, false if not found. If false, value at key_block pointer is unchanged.
*/
bool ets_efuse_find_purpose(ets_efuse_purpose_t purpose, ets_efuse_block_t *key_block);
/**
* Return true if the key block is unused, false otherwise.
*
* An unused key block is all zero content, not read or write protected,
* and has purpose 0 (ETS_EFUSE_KEY_PURPOSE_USER)
*
* @param key_block key block to check.
*
* @return true if key block is unused, false if key block or used
* or the specified block index is not a key block.
*/
bool ets_efuse_key_block_unused(ets_efuse_block_t key_block);
/**
* @brief Search for an unused key block and return the first one found.
*
* See @ref ets_efuse_key_block_unused for a description of an unused key block.
*
* @return First unused key block, or ETS_EFUSE_BLOCK_MAX if no unused key block is found.
*/
ets_efuse_block_t ets_efuse_find_unused_key_block(void);
/**
* @brief Return the number of unused efuse key blocks (0-6)
*/
unsigned ets_efuse_count_unused_key_blocks(void);
/**
* @brief Calculate Reed-Solomon Encoding values for a block of efuse data.
*
* @param data Pointer to data buffer (length 32 bytes)
* @param rs_values Pointer to write encoded data to (length 12 bytes)
*/
void ets_efuse_rs_calculate(const void *data, void *rs_values);
/**
* @brief Read spi flash pads configuration from Efuse
*
* @return
* - 0 for default SPI pins.
* - 1 for default HSPI pins.
* - Other values define a custom pin configuration mask. Pins are encoded as per the EFUSE_SPICONFIG_RET_SPICLK,
* EFUSE_SPICONFIG_RET_SPIQ, EFUSE_SPICONFIG_RET_SPID, EFUSE_SPICONFIG_RET_SPICS0, EFUSE_SPICONFIG_RET_SPIHD macros.
* WP pin (for quad I/O modes) is not saved in efuse and not returned by this function.
*/
uint32_t ets_efuse_get_spiconfig(void);
/**
* @brief Read spi flash wp pad from Efuse
*
* @return
* - 0x3f for invalid.
* - 0~46 is valid.
*/
uint32_t ets_efuse_get_wp_pad(void);
/**
* @brief Read opi flash pads configuration from Efuse
*
* @return
* - 0 for default SPI pins.
* - Other values define a custom pin configuration mask. From the LSB, every 6 bits represent a GPIO number which stand for:
* DQS, D4, D5, D6, D7 accordingly.
*/
uint32_t ets_efuse_get_opiconfig(void);
/**
* @brief Read if download mode disabled from Efuse
*
* @return
* - true for efuse disable download mode.
* - false for efuse doesn't disable download mode.
*/
bool ets_efuse_download_modes_disabled(void);
/**
* @brief Read if legacy spi flash boot mode disabled from Efuse
*
* @return
* - true for efuse disable legacy spi flash boot mode.
* - false for efuse doesn't disable legacy spi flash boot mode.
*/
bool ets_efuse_legacy_spi_boot_mode_disabled(void);
/**
* @brief Read if uart print control value from Efuse
*
* @return
* - 0 for uart force print.
* - 1 for uart print when GPIO8 is low when digital reset.
* 2 for uart print when GPIO8 is high when digital reset.
* 3 for uart force slient
*/
uint32_t ets_efuse_get_uart_print_control(void);
/**
* @brief Read if USB-Serial-JTAG print during rom boot is disabled from Efuse
*
* @return
* - 1 for efuse disable USB-Serial-JTAG print during rom boot.
* - 0 for efuse doesn't disable USB-Serial-JTAG print during rom boot.
*/
uint32_t ets_efuse_usb_serial_jtag_print_is_disabled(void);
/**
* @brief Read if usb download mode disabled from Efuse
*
* (Also returns true if security download mode is enabled, as this mode
* disables USB download.)
*
* @return
* - true for efuse disable usb download mode.
* - false for efuse doesn't disable usb download mode.
*/
bool ets_efuse_usb_download_mode_disabled(void);
/**
* @brief Read if tiny basic mode disabled from Efuse
*
* @return
* - true for efuse disable tiny basic mode.
* - false for efuse doesn't disable tiny basic mode.
*/
bool ets_efuse_tiny_basic_mode_disabled(void);
/**
* @brief Read if usb module disabled from Efuse
*
* @return
* - true for efuse disable usb module.
* - false for efuse doesn't disable usb module.
*/
bool ets_efuse_usb_module_disabled(void);
/**
* @brief Read if security download modes enabled from Efuse
*
* @return
* - true for efuse enable security download mode.
* - false for efuse doesn't enable security download mode.
*/
bool ets_efuse_security_download_modes_enabled(void);
/**
* @brief Return true if secure boot is enabled in EFuse
*/
bool ets_efuse_secure_boot_enabled(void);
/**
* @brief Return true if secure boot aggressive revoke is enabled in EFuse
*/
bool ets_efuse_secure_boot_aggressive_revoke_enabled(void);
/**
* @brief Return true if cache encryption (flash, etc) is enabled from boot via EFuse
*/
bool ets_efuse_cache_encryption_enabled(void);
/**
* @brief Return true if EFuse indicates an external phy needs to be used for USB
*/
bool ets_efuse_usb_use_ext_phy(void);
/**
* @brief Return true if EFuse indicates USB device persistence is disabled
*/
bool ets_efuse_usb_force_nopersist(void);
/**
* @brief Return true if OPI pins GPIO33-37 are powered by VDDSPI, otherwise by VDD33CPU
*/
bool ets_efuse_flash_opi_5pads_power_sel_vddspi(void);
/**
* @brief Return true if EFuse indicates an opi flash is attached.
*/
bool ets_efuse_flash_opi_mode(void);
/**
* @brief Return true if EFuse indicates to send a flash resume command.
*/
bool ets_efuse_force_send_resume(void);
/**
* @brief return the time in us ROM boot need wait flash to power on from Efuse
*
* @return
* - uint32_t the time in us.
*/
uint32_t ets_efuse_get_flash_delay_us(void);
#define EFUSE_SPICONFIG_SPI_DEFAULTS 0
#define EFUSE_SPICONFIG_HSPI_DEFAULTS 1
#define EFUSE_SPICONFIG_RET_SPICLK_MASK 0x3f
#define EFUSE_SPICONFIG_RET_SPICLK_SHIFT 0
#define EFUSE_SPICONFIG_RET_SPICLK(ret) (((ret) >> EFUSE_SPICONFIG_RET_SPICLK_SHIFT) & EFUSE_SPICONFIG_RET_SPICLK_MASK)
#define EFUSE_SPICONFIG_RET_SPIQ_MASK 0x3f
#define EFUSE_SPICONFIG_RET_SPIQ_SHIFT 6
#define EFUSE_SPICONFIG_RET_SPIQ(ret) (((ret) >> EFUSE_SPICONFIG_RET_SPIQ_SHIFT) & EFUSE_SPICONFIG_RET_SPIQ_MASK)
#define EFUSE_SPICONFIG_RET_SPID_MASK 0x3f
#define EFUSE_SPICONFIG_RET_SPID_SHIFT 12
#define EFUSE_SPICONFIG_RET_SPID(ret) (((ret) >> EFUSE_SPICONFIG_RET_SPID_SHIFT) & EFUSE_SPICONFIG_RET_SPID_MASK)
#define EFUSE_SPICONFIG_RET_SPICS0_MASK 0x3f
#define EFUSE_SPICONFIG_RET_SPICS0_SHIFT 18
#define EFUSE_SPICONFIG_RET_SPICS0(ret) (((ret) >> EFUSE_SPICONFIG_RET_SPICS0_SHIFT) & EFUSE_SPICONFIG_RET_SPICS0_MASK)
#define EFUSE_SPICONFIG_RET_SPIHD_MASK 0x3f
#define EFUSE_SPICONFIG_RET_SPIHD_SHIFT 24
#define EFUSE_SPICONFIG_RET_SPIHD(ret) (((ret) >> EFUSE_SPICONFIG_RET_SPIHD_SHIFT) & EFUSE_SPICONFIG_RET_SPIHD_MASK)
/**
* @brief Enable JTAG temporarily by writing a JTAG HMAC "key" into
* the JTAG_CTRL registers.
*
* Works if JTAG has been "soft" disabled by burning the EFUSE_SOFT_DIS_JTAG efuse.
*
* Will enable the HMAC module to generate a "downstream" HMAC value from a key already saved in efuse, and then write the JTAG HMAC "key" which will enable JTAG if the two keys match.
*
* @param jtag_hmac_key Pointer to a 32 byte array containing a valid key. Supplied by user.
* @param key_block Index of a key block containing the source for this key.
*
* @return ETS_FAILED if HMAC operation fails or invalid parameter, ETS_OK otherwise. ETS_OK doesn't necessarily mean that JTAG was enabled.
*/
int ets_jtag_enable_temporarily(const uint8_t *jtag_hmac_key, ets_efuse_block_t key_block);
/**
* @brief A crc8 algorithm used for MAC addresses in efuse
*
* @param unsigned char const *p : Pointer to original data.
*
* @param unsigned int len : Data length in byte.
*
* @return unsigned char: Crc value.
*/
unsigned char esp_crc8(unsigned char const *p, unsigned int len);
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* _ROM_EFUSE_H_ */

54
tools/sdk/esp32/include/esp_rom/include/esp32h2/rom/esp_flash.h Normal file
View File

@ -0,0 +1,54 @@
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#pragma once
#include "esp_err.h"
#ifdef __cplusplus
extern "C" {
#endif
/* Note: Most of esp_flash APIs in ROM are compatible with headers in ESP-IDF, this function
just adds ROM-specific parts
*/
struct spi_flash_chip_t;
typedef struct esp_flash_t esp_flash_t;
/* Structure to wrap "global" data used by esp_flash in ROM */
typedef struct {
/* Default SPI flash chip, ie main chip attached to the MCU
This chip is used if the 'chip' argument passed to esp_flash_xxx API functions is ever NULL
*/
esp_flash_t *default_chip;
/* Global API OS notification start/end/chip_check functions
These are used by ROM if no other host functions are configured.
*/
struct {
esp_err_t (*start)(esp_flash_t *chip);
esp_err_t (*end)(esp_flash_t *chip, esp_err_t err);
esp_err_t (*chip_check)(esp_flash_t **inout_chip);
} api_funcs;
} esp_flash_rom_global_data_t;
/** Access a pointer to the global data used by the ROM spi_flash driver
*/
esp_flash_rom_global_data_t *esp_flash_get_rom_global_data(void);
#ifdef __cplusplus
}
#endif

563
tools/sdk/esp32/include/esp_rom/include/esp32h2/rom/ets_sys.h Normal file
View File

@ -0,0 +1,563 @@
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#ifndef _ROM_ETS_SYS_H_
#define _ROM_ETS_SYS_H_
#include <stdint.h>
#include <stdbool.h>
#ifdef __cplusplus
extern "C" {
#endif
/** \defgroup ets_sys_apis, ets system related apis
* @brief ets system apis
*/
/** @addtogroup ets_sys_apis
* @{
*/
/************************************************************************
* NOTE
* Many functions in this header files can't be run in FreeRTOS.
* Please see the comment of the Functions.
* There are also some functions that doesn't work on FreeRTOS
* without listed in the header, such as:
* xtos functions start with "_xtos_" in ld file.
*
***********************************************************************
*/
/** \defgroup ets_apis, Espressif Task Scheduler related apis
* @brief ets apis
*/
/** @addtogroup ets_apis
* @{
*/
typedef enum {
ETS_OK = 0, /**< return successful in ets*/
ETS_FAILED = 1 /**< return failed in ets*/
} ETS_STATUS;
typedef ETS_STATUS ets_status_t;
typedef uint32_t ETSSignal;
typedef uint32_t ETSParam;
typedef struct ETSEventTag ETSEvent; /**< Event transmit/receive in ets*/
struct ETSEventTag {
ETSSignal sig; /**< Event signal, in same task, different Event with different signal*/
ETSParam par; /**< Event parameter, sometimes without usage, then will be set as 0*/
};
typedef void (*ETSTask)(ETSEvent *e); /**< Type of the Task processer*/
typedef void (* ets_idle_cb_t)(void *arg); /**< Type of the system idle callback*/
/**
* @brief Start the Espressif Task Scheduler, which is an infinit loop. Please do not add code after it.
*
* @param none
*
* @return none
*/
void ets_run(void);
/**
* @brief Set the Idle callback, when Tasks are processed, will call the callback before CPU goto sleep.
*
* @param ets_idle_cb_t func : The callback function.
*
* @param void *arg : Argument of the callback.
*
* @return None
*/
void ets_set_idle_cb(ets_idle_cb_t func, void *arg);
/**
* @brief Init a task with processer, priority, queue to receive Event, queue length.
*
* @param ETSTask task : The task processer.
*
* @param uint8_t prio : Task priority, 0-31, bigger num with high priority, one priority with one task.
*
* @param ETSEvent *queue : Queue belongs to the task, task always receives Events, Queue is circular used.
*
* @param uint8_t qlen : Queue length.
*
* @return None
*/
void ets_task(ETSTask task, uint8_t prio, ETSEvent *queue, uint8_t qlen);
/**
* @brief Post an event to an Task.
*
* @param uint8_t prio : Priority of the Task.
*
* @param ETSSignal sig : Event signal.
*
* @param ETSParam par : Event parameter
*
* @return ETS_OK : post successful
* @return ETS_FAILED : post failed
*/
ETS_STATUS ets_post(uint8_t prio, ETSSignal sig, ETSParam par);
/**
* @}
*/
/** \defgroup ets_boot_apis, Boot routing related apis
* @brief ets boot apis
*/
/** @addtogroup ets_apis
* @{
*/
extern const char *const exc_cause_table[40]; ///**< excption cause that defined by the core.*/
/**
* @brief Set Pro cpu Entry code, code can be called in PRO CPU when booting is not completed.
* When Pro CPU booting is completed, Pro CPU will call the Entry code if not NULL.
*
* @param uint32_t start : the PRO Entry code address value in uint32_t
*
* @return None
*/
void ets_set_user_start(uint32_t start);
/**
* @brief Set Pro cpu Startup code, code can be called when booting is not completed, or in Entry code.
* When Entry code completed, CPU will call the Startup code if not NULL, else call ets_run.
*
* @param uint32_t callback : the Startup code address value in uint32_t
*
* @return None : post successful
*/
void ets_set_startup_callback(uint32_t callback);
/**
* @brief Set App cpu Entry code, code can be called in PRO CPU.
* When APP booting is completed, APP CPU will call the Entry code if not NULL.
*
* @param uint32_t start : the APP Entry code address value in uint32_t, stored in register APPCPU_CTRL_REG_D.
*
* @return None
*/
void ets_set_appcpu_boot_addr(uint32_t start);
/**
* @}
*/
/** \defgroup ets_printf_apis, ets_printf related apis used in ets
* @brief ets printf apis
*/
/** @addtogroup ets_printf_apis
* @{
*/
/**
* @brief Printf the strings to uart or other devices, similar with printf, simple than printf.
* Can not print float point data format, or longlong data format.
* So we maybe only use this in ROM.
*
* @param const char *fmt : See printf.
*
* @param ... : See printf.
*
* @return int : the length printed to the output device.
*/
int ets_printf(const char *fmt, ...);
/**
* @brief Set the uart channel of ets_printf(uart_tx_one_char).
* ROM will set it base on the efuse and gpio setting, however, this can be changed after booting.
*
* @param uart_no : 0 for UART0, 1 for UART1, 2 for UART2.
*
* @return None
*/
void ets_set_printf_channel(uint8_t uart_no);
/**
* @brief Get the uart channel of ets_printf(uart_tx_one_char).
*
* @return uint8_t uart channel used by ets_printf(uart_tx_one_char).
*/
uint8_t ets_get_printf_channel(void);
/**
* @brief Output a char to uart, which uart to output(which is in uart module in ROM) is not in scope of the function.
* Can not print float point data format, or longlong data format
*
* @param char c : char to output.
*
* @return None
*/
void ets_write_char_uart(char c);
/**
* @brief Ets_printf have two output functions： putc1 and putc2, both of which will be called if need ouput.
* To install putc1, which is defaulted installed as ets_write_char_uart in none silent boot mode, as NULL in silent mode.
*
* @param void (*)(char) p: Output function to install.
*
* @return None
*/
void ets_install_putc1(void (*p)(char c));
/**
* @brief Ets_printf have two output functions： putc1 and putc2, both of which will be called if need ouput.
* To install putc2, which is defaulted installed as NULL.
*
* @param void (*)(char) p: Output function to install.
*
* @return None
*/
void ets_install_putc2(void (*p)(char c));
/**
* @brief Install putc1 as ets_write_char_uart.
* In silent boot mode(to void interfere the UART attached MCU), we can call this function, after booting ok.
*
* @param None
*
* @return None
*/
void ets_install_uart_printf(void);
#define ETS_PRINTF(...) ets_printf(...)
#define ETS_ASSERT(v) do { \
if (!(v)) { \
ets_printf("%s %u \n", __FILE__, __LINE__); \
while (1) {}; \
} \
} while (0);
/**
* @}
*/
/** \defgroup ets_timer_apis, ets_timer related apis used in ets
* @brief ets timer apis
*/
/** @addtogroup ets_timer_apis
* @{
*/
typedef void ETSTimerFunc(void *timer_arg);/**< timer handler*/
typedef struct _ETSTIMER_ {
struct _ETSTIMER_ *timer_next; /**< timer linker*/
uint32_t timer_expire; /**< abstruct time when timer expire*/
uint32_t timer_period; /**< timer period, 0 means timer is not periodic repeated*/
ETSTimerFunc *timer_func; /**< timer handler*/
void *timer_arg; /**< timer handler argument*/
} ETSTimer;
/**
* @brief Init ets timer, this timer range is 640 us to 429496 ms
* In FreeRTOS, please call FreeRTOS apis, never call this api.
*
* @param None
*
* @return None
*/
void ets_timer_init(void);
/**
* @brief In FreeRTOS, please call FreeRTOS apis, never call this api.
*
* @param None
*
* @return None
*/
void ets_timer_deinit(void);
/**
* @brief Arm an ets timer, this timer range is 640 us to 429496 ms.
* In FreeRTOS, please call FreeRTOS apis, never call this api.
*
* @param ETSTimer *timer : Timer struct pointer.
*
* @param uint32_t tmout : Timer value in ms, range is 1 to 429496.
*
* @param bool repeat : Timer is periodic repeated.
*
* @return None
*/
void ets_timer_arm(ETSTimer *timer, uint32_t tmout, bool repeat);
/**
* @brief Arm an ets timer, this timer range is 640 us to 429496 ms.
* In FreeRTOS, please call FreeRTOS apis, never call this api.
*
* @param ETSTimer *timer : Timer struct pointer.
*
* @param uint32_t tmout : Timer value in us, range is 1 to 429496729.
*
* @param bool repeat : Timer is periodic repeated.
*
* @return None
*/
void ets_timer_arm_us(ETSTimer *ptimer, uint32_t us, bool repeat);
/**
* @brief Disarm an ets timer.
* In FreeRTOS, please call FreeRTOS apis, never call this api.
*
* @param ETSTimer *timer : Timer struct pointer.
*
* @return None
*/
void ets_timer_disarm(ETSTimer *timer);
/**
* @brief Set timer callback and argument.
* In FreeRTOS, please call FreeRTOS apis, never call this api.
*
* @param ETSTimer *timer : Timer struct pointer.
*
* @param ETSTimerFunc *pfunction : Timer callback.
*
* @param void *parg : Timer callback argument.
*
* @return None
*/
void ets_timer_setfn(ETSTimer *ptimer, ETSTimerFunc *pfunction, void *parg);
/**
* @brief Unset timer callback and argument to NULL.
* In FreeRTOS, please call FreeRTOS apis, never call this api.
*
* @param ETSTimer *timer : Timer struct pointer.
*
* @return None
*/
void ets_timer_done(ETSTimer *ptimer);
/**
* @brief CPU do while loop for some time.
* In FreeRTOS task, please call FreeRTOS apis.
*
* @param uint32_t us : Delay time in us.
*
* @return None
*/
void ets_delay_us(uint32_t us);
/**
* @brief Set the real CPU ticks per us to the ets, so that ets_delay_us will be accurate.
* Call this function when CPU frequency is changed.
*
* @param uint32_t ticks_per_us : CPU ticks per us.
*
* @return None
*/
void ets_update_cpu_frequency(uint32_t ticks_per_us);
/**
* @brief Set the real CPU ticks per us to the ets, so that ets_delay_us will be accurate.
*
* @note This function only sets the tick rate for the current CPU. It is located in ROM,
* so the deep sleep stub can use it even if IRAM is not initialized yet.
*
* @param uint32_t ticks_per_us : CPU ticks per us.
*
* @return None
*/
void ets_update_cpu_frequency_rom(uint32_t ticks_per_us);
/**
* @brief Get the real CPU ticks per us to the ets.
* This function do not return real CPU ticks per us, just the record in ets. It can be used to check with the real CPU frequency.
*
* @param None
*
* @return uint32_t : CPU ticks per us record in ets.
*/
uint32_t ets_get_cpu_frequency(void);
/**
* @brief Get xtal_freq value, If value not stored in RTC_STORE5, than store.
*
* @param None
*
* @return uint32_t : if stored in efuse(not 0)
* clock = ets_efuse_get_xtal_freq() * 1000000;
* else if analog_8M in efuse
* clock = ets_get_xtal_scale() * 625 / 16 * ets_efuse_get_8M_clock();
* else clock = 40M.
*/
uint32_t ets_get_xtal_freq(void);
/**
* @brief Get the apb divior by xtal frequency.
* When any types of reset happen, the default value is 2.
*
* @param None
*
* @return uint32_t : 1 or 2.
*/
uint32_t ets_get_xtal_div(void);
/**
* @brief Get apb_freq value, If value not stored in RTC_STORE5, than store.
*
* @param None
*
* @return uint32_t : if rtc store the value (RTC_STORE5 high 16 bits and low 16 bits with same value), read from rtc register.
* clock = (REG_READ(RTC_STORE5) & 0xffff) << 12;
* else store ets_get_detected_xtal_freq() in.
*/
uint32_t ets_get_apb_freq(void);
/**
* @}
*/
/** \defgroup ets_intr_apis, ets interrupt configure related apis
* @brief ets intr apis
*/
/** @addtogroup ets_intr_apis
* @{
*/
typedef void (* ets_isr_t)(void *);/**< interrupt handler type*/
/**
* @brief Attach a interrupt handler to a CPU interrupt number.
* This function equals to _xtos_set_interrupt_handler_arg(i, func, arg).
* In FreeRTOS, please call FreeRTOS apis, never call this api.
*
* @param int i : CPU interrupt number.
*
* @param ets_isr_t func : Interrupt handler.
*
* @param void *arg : argument of the handler.
*
* @return None
*/
void ets_isr_attach(int i, ets_isr_t func, void *arg);
/**
* @brief Mask the interrupts which show in mask bits.
* This function equals to _xtos_ints_off(mask).
* In FreeRTOS, please call FreeRTOS apis, never call this api.
*
* @param uint32_t mask : BIT(i) means mask CPU interrupt number i.
*
* @return None
*/
void ets_isr_mask(uint32_t mask);
/**
* @brief Unmask the interrupts which show in mask bits.
* This function equals to _xtos_ints_on(mask).
* In FreeRTOS, please call FreeRTOS apis, never call this api.
*
* @param uint32_t mask : BIT(i) means mask CPU interrupt number i.
*
* @return None
*/
void ets_isr_unmask(uint32_t unmask);
/**
* @brief Lock the interrupt to level 2.
* This function direct set the CPU registers.
* In FreeRTOS, please call FreeRTOS apis, never call this api.
*
* @param None
*
* @return None
*/
void ets_intr_lock(void);
/**
* @brief Unlock the interrupt to level 0.
* This function direct set the CPU registers.
* In FreeRTOS, please call FreeRTOS apis, never call this api.
*
* @param None
*
* @return None
*/
void ets_intr_unlock(void);
/**
* @brief Unlock the interrupt to level 0, and CPU will go into power save mode(wait interrupt).
* This function direct set the CPU registers.
* In FreeRTOS, please call FreeRTOS apis, never call this api.
*
* @param None
*
* @return None
*/
void ets_waiti0(void);
/**
* @brief Attach an CPU interrupt to a hardware source.
* We have 4 steps to use an interrupt:
* 1.Attach hardware interrupt source to CPU. intr_matrix_set(0, ETS_WIFI_MAC_INTR_SOURCE, ETS_WMAC_INUM);
* 2.Set interrupt handler. xt_set_interrupt_handler(ETS_WMAC_INUM, func, NULL);
* 3.Enable interrupt for CPU. xt_ints_on(1 << ETS_WMAC_INUM);
* 4.Enable interrupt in the module.
*
* @param int cpu_no : The CPU which the interrupt number belongs.
*
* @param uint32_t model_num : The interrupt hardware source number, please see the interrupt hardware source table.
*
* @param uint32_t intr_num : The interrupt number CPU, please see the interrupt cpu using table.
*
* @return None
*/
void intr_matrix_set(int cpu_no, uint32_t model_num, uint32_t intr_num);
/**
* @}
*/
#ifndef MAC2STR
#define MAC2STR(a) (a)[0], (a)[1], (a)[2], (a)[3], (a)[4], (a)[5]
#define MACSTR "%02x:%02x:%02x:%02x:%02x:%02x"
#endif
#define ETS_MEM_BAR() asm volatile ( "" : : : "memory" )
typedef enum {
OK = 0,
FAIL,
PENDING,
BUSY,
CANCEL,
} STATUS;
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* _ROM_ETS_SYS_H_ */

311
tools/sdk/esp32/include/esp_rom/include/esp32h2/rom/gpio.h Normal file
View File

@ -0,0 +1,311 @@
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#ifndef _ROM_GPIO_H_
#define _ROM_GPIO_H_
#include <stdint.h>
#include <stdbool.h>
#include "esp_attr.h"
#include "soc/gpio_reg.h"
#ifdef __cplusplus
extern "C" {
#endif
/** \defgroup gpio_apis, uart configuration and communication related apis
* @brief gpio apis
*/
/** @addtogroup gpio_apis
* @{
*/
#define GPIO_REG_READ(reg) READ_PERI_REG(reg)
#define GPIO_REG_WRITE(reg, val) WRITE_PERI_REG(reg, val)
#define GPIO_ID_PIN0 0
#define GPIO_ID_PIN(n) (GPIO_ID_PIN0+(n))
#define GPIO_PIN_ADDR(i) (GPIO_PIN0_REG + i*4)
#define GPIO_FUNC_IN_HIGH 0x38
#define GPIO_FUNC_IN_LOW 0x3C
#define GPIO_ID_IS_PIN_REGISTER(reg_id) \
((reg_id >= GPIO_ID_PIN0) && (reg_id <= GPIO_ID_PIN(GPIO_PIN_COUNT-1)))
#define GPIO_REGID_TO_PINIDX(reg_id) ((reg_id) - GPIO_ID_PIN0)
typedef enum {
GPIO_PIN_INTR_DISABLE = 0,
GPIO_PIN_INTR_POSEDGE = 1,
GPIO_PIN_INTR_NEGEDGE = 2,
GPIO_PIN_INTR_ANYEDGE = 3,
GPIO_PIN_INTR_LOLEVEL = 4,
GPIO_PIN_INTR_HILEVEL = 5
} GPIO_INT_TYPE;
#define GPIO_OUTPUT_SET(gpio_no, bit_value) \
((gpio_no < 32) ? gpio_output_set(bit_value<<gpio_no, (bit_value ? 0 : 1)<<gpio_no, 1<<gpio_no,0) : \
gpio_output_set_high(bit_value<<(gpio_no - 32), (bit_value ? 0 : 1)<<(gpio_no - 32), 1<<(gpio_no -32),0))
#define GPIO_DIS_OUTPUT(gpio_no) ((gpio_no < 32) ? gpio_output_set(0,0,0, 1<<gpio_no) : gpio_output_set_high(0,0,0, 1<<(gpio_no - 32)))
#define GPIO_INPUT_GET(gpio_no) ((gpio_no < 32) ? ((gpio_input_get()>>gpio_no)&BIT0) : ((gpio_input_get_high()>>(gpio_no - 32))&BIT0))
/* GPIO interrupt handler, registered through gpio_intr_handler_register */
typedef void (* gpio_intr_handler_fn_t)(uint32_t intr_mask, bool high, void *arg);
/**
* @brief Initialize GPIO. This includes reading the GPIO Configuration DataSet
* to initialize "output enables" and pin configurations for each gpio pin.
* Please do not call this function in SDK.
*
* @param None
*
* @return None
*/
void gpio_init(void);
/**
* @brief Change GPIO(0-31) pin output by setting, clearing, or disabling pins, GPIO0<->BIT(0).
* There is no particular ordering guaranteed; so if the order of writes is significant,
* calling code should divide a single call into multiple calls.
*
* @param uint32_t set_mask : the gpios that need high level.
*
* @param uint32_t clear_mask : the gpios that need low level.
*
* @param uint32_t enable_mask : the gpios that need be changed.
*
* @param uint32_t disable_mask : the gpios that need diable output.
*
* @return None
*/
void gpio_output_set(uint32_t set_mask, uint32_t clear_mask, uint32_t enable_mask, uint32_t disable_mask);
/**
* @brief Change GPIO(32-39) pin output by setting, clearing, or disabling pins, GPIO32<->BIT(0).
* There is no particular ordering guaranteed; so if the order of writes is significant,
* calling code should divide a single call into multiple calls.
*
* @param uint32_t set_mask : the gpios that need high level.
*
* @param uint32_t clear_mask : the gpios that need low level.
*
* @param uint32_t enable_mask : the gpios that need be changed.
*
* @param uint32_t disable_mask : the gpios that need diable output.
*
* @return None
*/
void gpio_output_set_high(uint32_t set_mask, uint32_t clear_mask, uint32_t enable_mask, uint32_t disable_mask);
/**
* @brief Sample the value of GPIO input pins(0-31) and returns a bitmask.
*
* @param None
*
* @return uint32_t : bitmask for GPIO input pins, BIT(0) for GPIO0.
*/
uint32_t gpio_input_get(void);
/**
* @brief Sample the value of GPIO input pins(32-39) and returns a bitmask.
*
* @param None
*
* @return uint32_t : bitmask for GPIO input pins, BIT(0) for GPIO32.
*/
uint32_t gpio_input_get_high(void);
/**
* @brief Register an application-specific interrupt handler for GPIO pin interrupts.
* Once the interrupt handler is called, it will not be called again until after a call to gpio_intr_ack.
* Please do not call this function in SDK.
*
* @param gpio_intr_handler_fn_t fn : gpio application-specific interrupt handler
*
* @param void *arg : gpio application-specific interrupt handler argument.
*
* @return None
*/
void gpio_intr_handler_register(gpio_intr_handler_fn_t fn, void *arg);
/**
* @brief Get gpio interrupts which happens but not processed.
* Please do not call this function in SDK.
*
* @param None
*
* @return uint32_t : bitmask for GPIO pending interrupts, BIT(0) for GPIO0.
*/
uint32_t gpio_intr_pending(void);
/**
* @brief Get gpio interrupts which happens but not processed.
* Please do not call this function in SDK.
*
* @param None
*
* @return uint32_t : bitmask for GPIO pending interrupts, BIT(0) for GPIO32.
*/
uint32_t gpio_intr_pending_high(void);
/**
* @brief Ack gpio interrupts to process pending interrupts.
* Please do not call this function in SDK.
*
* @param uint32_t ack_mask: bitmask for GPIO ack interrupts, BIT(0) for GPIO0.
*
* @return None
*/
void gpio_intr_ack(uint32_t ack_mask);
/**
* @brief Ack gpio interrupts to process pending interrupts.
* Please do not call this function in SDK.
*
* @param uint32_t ack_mask: bitmask for GPIO ack interrupts, BIT(0) for GPIO32.
*
* @return None
*/
void gpio_intr_ack_high(uint32_t ack_mask);
/**
* @brief Set GPIO to wakeup the ESP32.
* Please do not call this function in SDK.
*
* @param uint32_t i: gpio number.
*
* @param GPIO_INT_TYPE intr_state : only GPIO_PIN_INTR_LOLEVEL\GPIO_PIN_INTR_HILEVEL can be used
*
* @return None
*/
void gpio_pin_wakeup_enable(uint32_t i, GPIO_INT_TYPE intr_state);
/**
* @brief disable GPIOs to wakeup the ESP32.
* Please do not call this function in SDK.
*
* @param None
*
* @return None
*/
void gpio_pin_wakeup_disable(void);
/**
* @brief set gpio input to a signal, one gpio can input to several signals.
*
* @param uint32_t gpio : gpio number, 0~0x2f
* gpio == 0x3C, input 0 to signal
* gpio == 0x3A, input nothing to signal
* gpio == 0x38, input 1 to signal
*
* @param uint32_t signal_idx : signal index.
*
* @param bool inv : the signal is inv or not
*
* @return None
*/
void gpio_matrix_in(uint32_t gpio, uint32_t signal_idx, bool inv);
/**
* @brief set signal output to gpio, one signal can output to several gpios.
*
* @param uint32_t gpio : gpio number, 0~0x2f
*
* @param uint32_t signal_idx : signal index.
* signal_idx == 0x100, cancel output put to the gpio
*
* @param bool out_inv : the signal output is invert or not
*
* @param bool oen_inv : the signal output enable is invert or not
*
* @return None
*/
void gpio_matrix_out(uint32_t gpio, uint32_t signal_idx, bool out_inv, bool oen_inv);
/**
* @brief Select pad as a gpio function from IOMUX.
*
* @param uint32_t gpio_num : gpio number, 0~0x2f
*
* @return None
*/
void gpio_pad_select_gpio(uint32_t gpio_num);
/**
* @brief Set pad driver capability.
*
* @param uint32_t gpio_num : gpio number, 0~0x2f
*
* @param uint32_t drv : 0-3
*
* @return None
*/
void gpio_pad_set_drv(uint32_t gpio_num, uint32_t drv);
/**
* @brief Pull up the pad from gpio number.
*
* @param uint32_t gpio_num : gpio number, 0~0x2f
*
* @return None
*/
void gpio_pad_pullup(uint32_t gpio_num);
/**
* @brief Pull down the pad from gpio number.
*
* @param uint32_t gpio_num : gpio number, 0~0x2f
*
* @return None
*/
void gpio_pad_pulldown(uint32_t gpio_num);
/**
* @brief Unhold the pad from gpio number.
*
* @param uint32_t gpio_num : gpio number, 0~0x2f
*
* @return None
*/
void gpio_pad_unhold(uint32_t gpio_num);
/**
* @brief Hold the pad from gpio number.
*
* @param uint32_t gpio_num : gpio number, 0~0x2f
*
* @return None
*/
void gpio_pad_hold(uint32_t gpio_num);
/**
* @brief enable gpio pad input.
*
* @param uint32_t gpio_num : gpio number, 0~0x2f
*
* @return None
*/
void gpio_pad_input_enable(uint32_t gpio_num);
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* _ROM_GPIO_H_ */

63
tools/sdk/esp32/include/esp_rom/include/esp32h2/rom/hmac.h Normal file
View File

@ -0,0 +1,63 @@
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#ifndef _ROM_HMAC_H_
#define _ROM_HMAC_H_
#ifdef __cplusplus
extern "C" {
#endif
#include <stdint.h>
#include <stdlib.h>
#include "efuse.h"
void ets_hmac_enable(void);
void ets_hmac_disable(void);
/* Use the "upstream" HMAC key (ETS_EFUSE_KEY_PURPOSE_HMAC_UP)
to digest a message.
*/
int ets_hmac_calculate_message(ets_efuse_block_t key_block, const void *message, size_t message_len, uint8_t *hmac);
/* Calculate a downstream HMAC message to temporarily enable JTAG, or
to generate a Digital Signature data decryption key.
- purpose must be ETS_EFUSE_KEY_PURPOSE_HMAC_DOWN_DIGITAL_SIGNATURE
or ETS_EFUSE_KEY_PURPOSE_HMAC_DOWN_JTAG
- key_block must be in range ETS_EFUSE_BLOCK_KEY0 toETS_EFUSE_BLOCK_KEY6.
This efuse block must have the corresponding purpose set in "purpose", or
ETS_EFUSE_KEY_PURPOSE_HMAC_DOWN_ALL.
The result of this HMAC calculation is only made available "downstream" to the
corresponding hardware module, and cannot be accessed by software.
*/
int ets_hmac_calculate_downstream(ets_efuse_block_t key_block, ets_efuse_purpose_t purpose);
/* Invalidate a downstream HMAC value previously calculated by ets_hmac_calculate_downstream().
*
* - purpose must match a previous call to ets_hmac_calculate_downstream().
*
* After this function is called, the corresponding internal operation (JTAG or DS) will no longer
* have access to the generated key.
*/
int ets_hmac_invalidate_downstream(ets_efuse_purpose_t purpose);
#ifdef __cplusplus
}
#endif
#endif // _ROM_HMAC_H_

104
tools/sdk/esp32/include/esp_rom/include/esp32h2/rom/libc_stubs.h Normal file
View File

@ -0,0 +1,104 @@
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#ifndef _ROM_LIBC_STUBS_H_
#define _ROM_LIBC_STUBS_H_
#include <sys/lock.h>
#include <stddef.h>
#include <stdint.h>
#include <stdio.h>
#include <stdarg.h>
#include <reent.h>
#include <errno.h>
#ifdef __cplusplus
extern "C" {
#endif
/*
ESP32 ROM code contains implementations of some of C library functions.
Whenever a function in ROM needs to use a syscall, it calls a pointer to the corresponding syscall
implementation defined in the following struct.
The table itself, by default, is not allocated in RAM. A global pointer syscall_table_ptr is used to
set the address
So, before using any of the C library functions (except for pure functions and memcpy/memset functions),
application must allocate syscall table structure for each CPU being used, and populate it with pointers
to actual implementations of corresponding syscalls.
*/
struct syscall_stub_table
{
struct _reent* (*__getreent)(void);
void* (*_malloc_r)(struct _reent *r, size_t);
void (*_free_r)(struct _reent *r, void*);
void* (*_realloc_r)(struct _reent *r, void*, size_t);
void* (*_calloc_r)(struct _reent *r, size_t, size_t);
void (*_abort)(void);
int (*_system_r)(struct _reent *r, const char*);
int (*_rename_r)(struct _reent *r, const char*, const char*);
clock_t (*_times_r)(struct _reent *r, struct tms *);
int (*_gettimeofday_r) (struct _reent *r, struct timeval *, void *);
void (*_raise_r)(struct _reent *r);
int (*_unlink_r)(struct _reent *r, const char*);
int (*_link_r)(struct _reent *r, const char*, const char*);
int (*_stat_r)(struct _reent *r, const char*, struct stat *);
int (*_fstat_r)(struct _reent *r, int, struct stat *);
void* (*_sbrk_r)(struct _reent *r, ptrdiff_t);
int (*_getpid_r)(struct _reent *r);
int (*_kill_r)(struct _reent *r, int, int);
void (*_exit_r)(struct _reent *r, int);
int (*_close_r)(struct _reent *r, int);
int (*_open_r)(struct _reent *r, const char *, int, int);
int (*_write_r)(struct _reent *r, int, const void *, int);
int (*_lseek_r)(struct _reent *r, int, int, int);
int (*_read_r)(struct _reent *r, int, void *, int);
#ifdef _RETARGETABLE_LOCKING
void (*_retarget_lock_init)(_LOCK_T *lock);
void (*_retarget_lock_init_recursive)(_LOCK_T *lock);
void (*_retarget_lock_close)(_LOCK_T lock);
void (*_retarget_lock_close_recursive)(_LOCK_T lock);
void (*_retarget_lock_acquire)(_LOCK_T lock);
void (*_retarget_lock_acquire_recursive)(_LOCK_T lock);
int (*_retarget_lock_try_acquire)(_LOCK_T lock);
int (*_retarget_lock_try_acquire_recursive)(_LOCK_T lock);
void (*_retarget_lock_release)(_LOCK_T lock);
void (*_retarget_lock_release_recursive)(_LOCK_T lock);
#else
void (*_lock_init)(_lock_t *lock);
void (*_lock_init_recursive)(_lock_t *lock);
void (*_lock_close)(_lock_t *lock);
void (*_lock_close_recursive)(_lock_t *lock);
void (*_lock_acquire)(_lock_t *lock);
void (*_lock_acquire_recursive)(_lock_t *lock);
int (*_lock_try_acquire)(_lock_t *lock);
int (*_lock_try_acquire_recursive)(_lock_t *lock);
void (*_lock_release)(_lock_t *lock);
void (*_lock_release_recursive)(_lock_t *lock);
#endif
int (*_printf_float)(struct _reent *data, void *pdata, FILE * fp, int (*pfunc) (struct _reent *, FILE *, const char *, size_t len), va_list * ap);
int (*_scanf_float) (struct _reent *rptr, void *pdata, FILE *fp, va_list *ap);
void (*__assert_func) (const char *file, int line, const char * func, const char *failedexpr) __attribute__((noreturn));
void (*__sinit) (struct _reent *r);
void (*_cleanup_r) (struct _reent* r);
};
extern struct syscall_stub_table *syscall_table_ptr;
#ifdef __cplusplus
} // extern "C"
#endif
#endif /* _ROM_LIBC_STUBS_H_ */

176
tools/sdk/esp32/include/esp_rom/include/esp32h2/rom/lldesc.h Normal file
View File

@ -0,0 +1,176 @@
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#ifndef _ROM_LLDESC_H_
#define _ROM_LLDESC_H_
#include <stdint.h>
#include "sys/queue.h"
#ifdef __cplusplus
extern "C" {
#endif
#define LLDESC_TX_MBLK_SIZE 268 /* */
#define LLDESC_RX_SMBLK_SIZE 64 /* small block size, for small mgmt frame */
#define LLDESC_RX_MBLK_SIZE 524 /* rx is large sinec we want to contain mgmt frame in one block*/
#define LLDESC_RX_AMPDU_ENTRY_MBLK_SIZE 64 /* it is a small buffer which is a cycle link*/
#define LLDESC_RX_AMPDU_LEN_MBLK_SIZE 256 /*for ampdu entry*/
#ifdef ESP_MAC_5
#define LLDESC_TX_MBLK_NUM 116 /* 64K / 256 */
#define LLDESC_RX_MBLK_NUM 82 /* 64K / 512 MAX 172*/
#define LLDESC_RX_AMPDU_ENTRY_MBLK_NUM 4
#define LLDESC_RX_AMPDU_LEN_MLBK_NUM 12
#else
#ifdef SBUF_RXTX
#define LLDESC_TX_MBLK_NUM_MAX (2 * 48) /* 23K / 260 - 8 */
#define LLDESC_RX_MBLK_NUM_MAX (2 * 48) /* 23K / 524 */
#define LLDESC_TX_MBLK_NUM_MIN (2 * 16) /* 23K / 260 - 8 */
#define LLDESC_RX_MBLK_NUM_MIN (2 * 16) /* 23K / 524 */
#endif
#define LLDESC_TX_MBLK_NUM 10 //(2 * 32) /* 23K / 260 - 8 */
#ifdef IEEE80211_RX_AMPDU
#define LLDESC_RX_MBLK_NUM 30
#else
#define LLDESC_RX_MBLK_NUM 10
#endif /*IEEE80211_RX_AMPDU*/
#define LLDESC_RX_AMPDU_ENTRY_MBLK_NUM 4
#define LLDESC_RX_AMPDU_LEN_MLBK_NUM 8
#endif /* !ESP_MAC_5 */
/*
* SLC2 DMA Desc struct, aka lldesc_t
*
* --------------------------------------------------------------
* | own | EoF | sub_sof | 5'b0 | length [11:0] | size [11:0] |
* --------------------------------------------------------------
* | buf_ptr [31:0] |
* --------------------------------------------------------------
* | next_desc_ptr [31:0] |
* --------------------------------------------------------------
*/
/* this bitfield is start from the LSB!!! */
typedef struct lldesc_s {
volatile uint32_t size : 12,
length: 12,
offset: 5, /* h/w reserved 5bit, s/w use it as offset in buffer */
sosf : 1, /* start of sub-frame */
eof : 1, /* end of frame */
owner : 1; /* hw or sw */
volatile const uint8_t *buf; /* point to buffer data */
union {
volatile uint32_t empty;
STAILQ_ENTRY(lldesc_s) qe; /* pointing to the next desc */
};
} lldesc_t;
typedef struct tx_ampdu_entry_s {
uint32_t sub_len : 12,
dili_num : 7,
: 1,
null_byte: 2,
data : 1,
enc : 1,
seq : 8;
} tx_ampdu_entry_t;
typedef struct lldesc_chain_s {
lldesc_t *head;
lldesc_t *tail;
} lldesc_chain_t;
#ifdef SBUF_RXTX
enum sbuf_mask_s {
SBUF_MOVE_NO = 0,
SBUF_MOVE_TX2RX,
SBUF_MOVE_RX2TX,
} ;
#define SBUF_MOVE_STEP 8
#endif
#define LLDESC_SIZE sizeof(struct lldesc_s)
/* SLC Descriptor */
#define LLDESC_OWNER_MASK 0x80000000
#define LLDESC_OWNER_SHIFT 31
#define LLDESC_SW_OWNED 0
#define LLDESC_HW_OWNED 1
#define LLDESC_EOF_MASK 0x40000000
#define LLDESC_EOF_SHIFT 30
#define LLDESC_SOSF_MASK 0x20000000
#define LLDESC_SOSF_SHIFT 29
#define LLDESC_LENGTH_MASK 0x00fff000
#define LLDESC_LENGTH_SHIFT 12
#define LLDESC_SIZE_MASK 0x00000fff
#define LLDESC_SIZE_SHIFT 0
#define LLDESC_ADDR_MASK 0x000fffff
void lldesc_build_chain(uint8_t *descptr, uint32_t desclen, uint8_t *mblkptr, uint32_t buflen, uint32_t blksz, uint8_t owner,
lldesc_t **head,
#ifdef TO_HOST_RESTART
lldesc_t **one_before_tail,
#endif
lldesc_t **tail);
lldesc_t *lldesc_num2link(lldesc_t *head, uint16_t nblks);
lldesc_t *lldesc_set_owner(lldesc_t *head, uint16_t nblks, uint8_t owner);
static inline uint32_t lldesc_get_chain_length(lldesc_t *head)
{
lldesc_t *ds = head;
uint32_t len = 0;
while (ds) {
len += ds->length;
ds = STAILQ_NEXT(ds, qe);
}
return len;
}
static inline void lldesc_config(lldesc_t *ds, uint8_t owner, uint8_t eof, uint8_t sosf, uint16_t len)
{
ds->owner = owner;
ds->eof = eof;
ds->sosf = sosf;
ds->length = len;
}
#define LLDESC_CONFIG(_desc, _owner, _eof, _sosf, _len) do { \
(_desc)->owner = (_owner); \
(_desc)->eof = (_eof); \
(_desc)->sosf = (_sosf); \
(_desc)->length = (_len); \
} while(0)
#define LLDESC_FROM_HOST_CLEANUP(ds) LLDESC_CONFIG((ds), LLDESC_HW_OWNED, 0, 0, 0)
#define LLDESC_MAC_RX_CLEANUP(ds) LLDESC_CONFIG((ds), LLDESC_HW_OWNED, 0, 0, (ds)->size)
#define LLDESC_TO_HOST_CLEANUP(ds) LLDESC_CONFIG((ds), LLDESC_HW_OWNED, 0, 0, 0)
#ifdef __cplusplus
}
#endif
#endif /* _ROM_LLDESC_H_ */

38
tools/sdk/esp32/include/esp_rom/include/esp32h2/rom/md5_hash.h Normal file
View File

@ -0,0 +1,38 @@
/*
* MD5 internal definitions
* Copyright (c) 2003-2005, Jouni Malinen <j@w1.fi>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* Alternatively, this software may be distributed under the terms of BSD
* license.
*
* See README and COPYING for more details.
*/
#ifndef _ROM_MD5_HASH_H_
#define _ROM_MD5_HASH_H_
#include <stdint.h>
#ifdef __cplusplus
extern "C" {
#endif
struct MD5Context {
uint32_t buf[4];
uint32_t bits[2];
uint8_t in[64];
};
void MD5Init(struct MD5Context *context);
void MD5Update(struct MD5Context *context, unsigned char const *buf, unsigned len);
void MD5Final(unsigned char digest[16], struct MD5Context *context);
#ifdef __cplusplus
}
#endif
#endif /* _ROM_MD5_HASH_H_ */

760
tools/sdk/esp32/include/esp_rom/include/esp32h2/rom/miniz.h Normal file
View File

@ -0,0 +1,760 @@
#ifndef MINIZ_HEADER_INCLUDED
#define MINIZ_HEADER_INCLUDED
#include <stdlib.h>
// Defines to completely disable specific portions of miniz.c:
// If all macros here are defined the only functionality remaining will be CRC-32, adler-32, tinfl, and tdefl.
// Define MINIZ_NO_STDIO to disable all usage and any functions which rely on stdio for file I/O.
#define MINIZ_NO_STDIO
// If MINIZ_NO_TIME is specified then the ZIP archive functions will not be able to get the current time, or
// get/set file times, and the C run-time funcs that get/set times won't be called.
// The current downside is the times written to your archives will be from 1979.
#define MINIZ_NO_TIME
// Define MINIZ_NO_ARCHIVE_APIS to disable all ZIP archive API's.
#define MINIZ_NO_ARCHIVE_APIS
// Define MINIZ_NO_ARCHIVE_APIS to disable all writing related ZIP archive API's.
#define MINIZ_NO_ARCHIVE_WRITING_APIS
// Define MINIZ_NO_ZLIB_APIS to remove all ZLIB-style compression/decompression API's.
#define MINIZ_NO_ZLIB_APIS
// Define MINIZ_NO_ZLIB_COMPATIBLE_NAME to disable zlib names, to prevent conflicts against stock zlib.
#define MINIZ_NO_ZLIB_COMPATIBLE_NAMES
// Define MINIZ_NO_MALLOC to disable all calls to malloc, free, and realloc.
// Note if MINIZ_NO_MALLOC is defined then the user must always provide custom user alloc/free/realloc
// callbacks to the zlib and archive API's, and a few stand-alone helper API's which don't provide custom user
// functions (such as tdefl_compress_mem_to_heap() and tinfl_decompress_mem_to_heap()) won't work.
#define MINIZ_NO_MALLOC
#if defined(__TINYC__) && (defined(__linux) || defined(__linux__))
// TODO: Work around "error: include file 'sys\utime.h' when compiling with tcc on Linux
#define MINIZ_NO_TIME
#endif
#if !defined(MINIZ_NO_TIME) && !defined(MINIZ_NO_ARCHIVE_APIS)
#include <time.h>
#endif
//Hardcoded options for Xtensa - JD
#define MINIZ_X86_OR_X64_CPU 0
#define MINIZ_LITTLE_ENDIAN 1
#define MINIZ_USE_UNALIGNED_LOADS_AND_STORES 0
#define MINIZ_HAS_64BIT_REGISTERS 0
#define TINFL_USE_64BIT_BITBUF 0
#if defined(_M_IX86) || defined(_M_X64) || defined(__i386__) || defined(__i386) || defined(__i486__) || defined(__i486) || defined(i386) || defined(__ia64__) || defined(__x86_64__)
// MINIZ_X86_OR_X64_CPU is only used to help set the below macros.
#define MINIZ_X86_OR_X64_CPU 1
#endif
#if (__BYTE_ORDER__==__ORDER_LITTLE_ENDIAN__) || MINIZ_X86_OR_X64_CPU
// Set MINIZ_LITTLE_ENDIAN to 1 if the processor is little endian.
#define MINIZ_LITTLE_ENDIAN 1
#endif
#if MINIZ_X86_OR_X64_CPU
// Set MINIZ_USE_UNALIGNED_LOADS_AND_STORES to 1 on CPU's that permit efficient integer loads and stores from unaligned addresses.
#define MINIZ_USE_UNALIGNED_LOADS_AND_STORES 1
#endif
#if defined(_M_X64) || defined(_WIN64) || defined(__MINGW64__) || defined(_LP64) || defined(__LP64__) || defined(__ia64__) || defined(__x86_64__)
// Set MINIZ_HAS_64BIT_REGISTERS to 1 if operations on 64-bit integers are reasonably fast (and don't involve compiler generated calls to helper functions).
#define MINIZ_HAS_64BIT_REGISTERS 1
#endif
#ifdef __cplusplus
extern "C" {
#endif
// ------------------- zlib-style API Definitions.
// For more compatibility with zlib, miniz.c uses unsigned long for some parameters/struct members. Beware: mz_ulong can be either 32 or 64-bits!
typedef unsigned long mz_ulong;
// mz_free() internally uses the MZ_FREE() macro (which by default calls free() unless you've modified the MZ_MALLOC macro) to release a block allocated from the heap.
void mz_free(void *p);
#define MZ_ADLER32_INIT (1)
// mz_adler32() returns the initial adler-32 value to use when called with ptr==NULL.
mz_ulong mz_adler32(mz_ulong adler, const unsigned char *ptr, size_t buf_len);
#define MZ_CRC32_INIT (0)
// mz_crc32() returns the initial CRC-32 value to use when called with ptr==NULL.
mz_ulong mz_crc32(mz_ulong crc, const unsigned char *ptr, size_t buf_len);
// Compression strategies.
enum { MZ_DEFAULT_STRATEGY = 0, MZ_FILTERED = 1, MZ_HUFFMAN_ONLY = 2, MZ_RLE = 3, MZ_FIXED = 4 };
// Method
#define MZ_DEFLATED 8
#ifndef MINIZ_NO_ZLIB_APIS
// Heap allocation callbacks.
// Note that mz_alloc_func parameter types purpsosely differ from zlib's: items/size is size_t, not unsigned long.
typedef void *(*mz_alloc_func)(void *opaque, size_t items, size_t size);
typedef void (*mz_free_func)(void *opaque, void *address);
typedef void *(*mz_realloc_func)(void *opaque, void *address, size_t items, size_t size);
#define MZ_VERSION "9.1.15"
#define MZ_VERNUM 0x91F0
#define MZ_VER_MAJOR 9
#define MZ_VER_MINOR 1
#define MZ_VER_REVISION 15
#define MZ_VER_SUBREVISION 0
// Flush values. For typical usage you only need MZ_NO_FLUSH and MZ_FINISH. The other values are for advanced use (refer to the zlib docs).
enum { MZ_NO_FLUSH = 0, MZ_PARTIAL_FLUSH = 1, MZ_SYNC_FLUSH = 2, MZ_FULL_FLUSH = 3, MZ_FINISH = 4, MZ_BLOCK = 5 };
// Return status codes. MZ_PARAM_ERROR is non-standard.
enum { MZ_OK = 0, MZ_STREAM_END = 1, MZ_NEED_DICT = 2, MZ_ERRNO = -1, MZ_STREAM_ERROR = -2, MZ_DATA_ERROR = -3, MZ_MEM_ERROR = -4, MZ_BUF_ERROR = -5, MZ_VERSION_ERROR = -6, MZ_PARAM_ERROR = -10000 };
// Compression levels: 0-9 are the standard zlib-style levels, 10 is best possible compression (not zlib compatible, and may be very slow), MZ_DEFAULT_COMPRESSION=MZ_DEFAULT_LEVEL.
enum { MZ_NO_COMPRESSION = 0, MZ_BEST_SPEED = 1, MZ_BEST_COMPRESSION = 9, MZ_UBER_COMPRESSION = 10, MZ_DEFAULT_LEVEL = 6, MZ_DEFAULT_COMPRESSION = -1 };
// Window bits
#define MZ_DEFAULT_WINDOW_BITS 15
struct mz_internal_state;
// Compression/decompression stream struct.
typedef struct mz_stream_s {
const unsigned char *next_in; // pointer to next byte to read
unsigned int avail_in; // number of bytes available at next_in
mz_ulong total_in; // total number of bytes consumed so far
unsigned char *next_out; // pointer to next byte to write
unsigned int avail_out; // number of bytes that can be written to next_out
mz_ulong total_out; // total number of bytes produced so far
char *msg; // error msg (unused)
struct mz_internal_state *state; // internal state, allocated by zalloc/zfree
mz_alloc_func zalloc; // optional heap allocation function (defaults to malloc)
mz_free_func zfree; // optional heap free function (defaults to free)
void *opaque; // heap alloc function user pointer
int data_type; // data_type (unused)
mz_ulong adler; // adler32 of the source or uncompressed data
mz_ulong reserved; // not used
} mz_stream;
typedef mz_stream *mz_streamp;
// Returns the version string of miniz.c.
const char *mz_version(void);
// mz_deflateInit() initializes a compressor with default options:
// Parameters:
// pStream must point to an initialized mz_stream struct.
// level must be between [MZ_NO_COMPRESSION, MZ_BEST_COMPRESSION].
// level 1 enables a specially optimized compression function that's been optimized purely for performance, not ratio.
// (This special func. is currently only enabled when MINIZ_USE_UNALIGNED_LOADS_AND_STORES and MINIZ_LITTLE_ENDIAN are defined.)
// Return values:
// MZ_OK on success.
// MZ_STREAM_ERROR if the stream is bogus.
// MZ_PARAM_ERROR if the input parameters are bogus.
// MZ_MEM_ERROR on out of memory.
int mz_deflateInit(mz_streamp pStream, int level);
// mz_deflateInit2() is like mz_deflate(), except with more control:
// Additional parameters:
// method must be MZ_DEFLATED
// window_bits must be MZ_DEFAULT_WINDOW_BITS (to wrap the deflate stream with zlib header/adler-32 footer) or -MZ_DEFAULT_WINDOW_BITS (raw deflate/no header or footer)
// mem_level must be between [1, 9] (it's checked but ignored by miniz.c)
int mz_deflateInit2(mz_streamp pStream, int level, int method, int window_bits, int mem_level, int strategy);
// Quickly resets a compressor without having to reallocate anything. Same as calling mz_deflateEnd() followed by mz_deflateInit()/mz_deflateInit2().
int mz_deflateReset(mz_streamp pStream);
// mz_deflate() compresses the input to output, consuming as much of the input and producing as much output as possible.
// Parameters:
// pStream is the stream to read from and write to. You must initialize/update the next_in, avail_in, next_out, and avail_out members.
// flush may be MZ_NO_FLUSH, MZ_PARTIAL_FLUSH/MZ_SYNC_FLUSH, MZ_FULL_FLUSH, or MZ_FINISH.
// Return values:
// MZ_OK on success (when flushing, or if more input is needed but not available, and/or there's more output to be written but the output buffer is full).
// MZ_STREAM_END if all input has been consumed and all output bytes have been written. Don't call mz_deflate() on the stream anymore.
// MZ_STREAM_ERROR if the stream is bogus.
// MZ_PARAM_ERROR if one of the parameters is invalid.
// MZ_BUF_ERROR if no forward progress is possible because the input and/or output buffers are empty. (Fill up the input buffer or free up some output space and try again.)
int mz_deflate(mz_streamp pStream, int flush);
// mz_deflateEnd() deinitializes a compressor:
// Return values:
// MZ_OK on success.
// MZ_STREAM_ERROR if the stream is bogus.
int mz_deflateEnd(mz_streamp pStream);
// mz_deflateBound() returns a (very) conservative upper bound on the amount of data that could be generated by deflate(), assuming flush is set to only MZ_NO_FLUSH or MZ_FINISH.
mz_ulong mz_deflateBound(mz_streamp pStream, mz_ulong source_len);
// Single-call compression functions mz_compress() and mz_compress2():
// Returns MZ_OK on success, or one of the error codes from mz_deflate() on failure.
int mz_compress(unsigned char *pDest, mz_ulong *pDest_len, const unsigned char *pSource, mz_ulong source_len);
int mz_compress2(unsigned char *pDest, mz_ulong *pDest_len, const unsigned char *pSource, mz_ulong source_len, int level);
// mz_compressBound() returns a (very) conservative upper bound on the amount of data that could be generated by calling mz_compress().
mz_ulong mz_compressBound(mz_ulong source_len);
// Initializes a decompressor.
int mz_inflateInit(mz_streamp pStream);
// mz_inflateInit2() is like mz_inflateInit() with an additional option that controls the window size and whether or not the stream has been wrapped with a zlib header/footer:
// window_bits must be MZ_DEFAULT_WINDOW_BITS (to parse zlib header/footer) or -MZ_DEFAULT_WINDOW_BITS (raw deflate).
int mz_inflateInit2(mz_streamp pStream, int window_bits);
// Decompresses the input stream to the output, consuming only as much of the input as needed, and writing as much to the output as possible.
// Parameters:
// pStream is the stream to read from and write to. You must initialize/update the next_in, avail_in, next_out, and avail_out members.
// flush may be MZ_NO_FLUSH, MZ_SYNC_FLUSH, or MZ_FINISH.
// On the first call, if flush is MZ_FINISH it's assumed the input and output buffers are both sized large enough to decompress the entire stream in a single call (this is slightly faster).
// MZ_FINISH implies that there are no more source bytes available beside what's already in the input buffer, and that the output buffer is large enough to hold the rest of the decompressed data.
// Return values:
// MZ_OK on success. Either more input is needed but not available, and/or there's more output to be written but the output buffer is full.
// MZ_STREAM_END if all needed input has been consumed and all output bytes have been written. For zlib streams, the adler-32 of the decompressed data has also been verified.
// MZ_STREAM_ERROR if the stream is bogus.
// MZ_DATA_ERROR if the deflate stream is invalid.
// MZ_PARAM_ERROR if one of the parameters is invalid.
// MZ_BUF_ERROR if no forward progress is possible because the input buffer is empty but the inflater needs more input to continue, or if the output buffer is not large enough. Call mz_inflate() again
// with more input data, or with more room in the output buffer (except when using single call decompression, described above).
int mz_inflate(mz_streamp pStream, int flush);
// Deinitializes a decompressor.
int mz_inflateEnd(mz_streamp pStream);
// Single-call decompression.
// Returns MZ_OK on success, or one of the error codes from mz_inflate() on failure.
int mz_uncompress(unsigned char *pDest, mz_ulong *pDest_len, const unsigned char *pSource, mz_ulong source_len);
// Returns a string description of the specified error code, or NULL if the error code is invalid.
const char *mz_error(int err);
// Redefine zlib-compatible names to miniz equivalents, so miniz.c can be used as a drop-in replacement for the subset of zlib that miniz.c supports.
// Define MINIZ_NO_ZLIB_COMPATIBLE_NAMES to disable zlib-compatibility if you use zlib in the same project.
#ifndef MINIZ_NO_ZLIB_COMPATIBLE_NAMES
typedef unsigned char Byte;
typedef unsigned int uInt;
typedef mz_ulong uLong;
typedef Byte Bytef;
typedef uInt uIntf;
typedef char charf;
typedef int intf;
typedef void *voidpf;
typedef uLong uLongf;
typedef void *voidp;
typedef void *const voidpc;
#define Z_NULL 0
#define Z_NO_FLUSH MZ_NO_FLUSH
#define Z_PARTIAL_FLUSH MZ_PARTIAL_FLUSH
#define Z_SYNC_FLUSH MZ_SYNC_FLUSH
#define Z_FULL_FLUSH MZ_FULL_FLUSH
#define Z_FINISH MZ_FINISH
#define Z_BLOCK MZ_BLOCK
#define Z_OK MZ_OK
#define Z_STREAM_END MZ_STREAM_END
#define Z_NEED_DICT MZ_NEED_DICT
#define Z_ERRNO MZ_ERRNO
#define Z_STREAM_ERROR MZ_STREAM_ERROR
#define Z_DATA_ERROR MZ_DATA_ERROR
#define Z_MEM_ERROR MZ_MEM_ERROR
#define Z_BUF_ERROR MZ_BUF_ERROR
#define Z_VERSION_ERROR MZ_VERSION_ERROR
#define Z_PARAM_ERROR MZ_PARAM_ERROR
#define Z_NO_COMPRESSION MZ_NO_COMPRESSION
#define Z_BEST_SPEED MZ_BEST_SPEED
#define Z_BEST_COMPRESSION MZ_BEST_COMPRESSION
#define Z_DEFAULT_COMPRESSION MZ_DEFAULT_COMPRESSION
#define Z_DEFAULT_STRATEGY MZ_DEFAULT_STRATEGY
#define Z_FILTERED MZ_FILTERED
#define Z_HUFFMAN_ONLY MZ_HUFFMAN_ONLY
#define Z_RLE MZ_RLE
#define Z_FIXED MZ_FIXED
#define Z_DEFLATED MZ_DEFLATED
#define Z_DEFAULT_WINDOW_BITS MZ_DEFAULT_WINDOW_BITS
#define alloc_func mz_alloc_func
#define free_func mz_free_func
#define internal_state mz_internal_state
#define z_stream mz_stream
#define deflateInit mz_deflateInit
#define deflateInit2 mz_deflateInit2
#define deflateReset mz_deflateReset
#define deflate mz_deflate
#define deflateEnd mz_deflateEnd
#define deflateBound mz_deflateBound
#define compress mz_compress
#define compress2 mz_compress2
#define compressBound mz_compressBound
#define inflateInit mz_inflateInit
#define inflateInit2 mz_inflateInit2
#define inflate mz_inflate
#define inflateEnd mz_inflateEnd
#define uncompress mz_uncompress
#define crc32 mz_crc32
#define adler32 mz_adler32
#define MAX_WBITS 15
#define MAX_MEM_LEVEL 9
#define zError mz_error
#define ZLIB_VERSION MZ_VERSION
#define ZLIB_VERNUM MZ_VERNUM
#define ZLIB_VER_MAJOR MZ_VER_MAJOR
#define ZLIB_VER_MINOR MZ_VER_MINOR
#define ZLIB_VER_REVISION MZ_VER_REVISION
#define ZLIB_VER_SUBREVISION MZ_VER_SUBREVISION
#define zlibVersion mz_version
#define zlib_version mz_version()
#endif // #ifndef MINIZ_NO_ZLIB_COMPATIBLE_NAMES
#endif // MINIZ_NO_ZLIB_APIS
// ------------------- Types and macros
typedef unsigned char mz_uint8;
typedef signed short mz_int16;
typedef unsigned short mz_uint16;
typedef unsigned int mz_uint32;
typedef unsigned int mz_uint;
typedef long long mz_int64;
typedef unsigned long long mz_uint64;
typedef int mz_bool;
#define MZ_FALSE (0)
#define MZ_TRUE (1)
// An attempt to work around MSVC's spammy "warning C4127: conditional expression is constant" message.
#ifdef _MSC_VER
#define MZ_MACRO_END while (0, 0)
#else
#define MZ_MACRO_END while (0)
#endif
// ------------------- ZIP archive reading/writing
#ifndef MINIZ_NO_ARCHIVE_APIS
enum {
MZ_ZIP_MAX_IO_BUF_SIZE = 64 * 1024,
MZ_ZIP_MAX_ARCHIVE_FILENAME_SIZE = 260,
MZ_ZIP_MAX_ARCHIVE_FILE_COMMENT_SIZE = 256
};
typedef struct {
mz_uint32 m_file_index;
mz_uint32 m_central_dir_ofs;
mz_uint16 m_version_made_by;
mz_uint16 m_version_needed;
mz_uint16 m_bit_flag;
mz_uint16 m_method;
#ifndef MINIZ_NO_TIME
time_t m_time;
#endif
mz_uint32 m_crc32;
mz_uint64 m_comp_size;
mz_uint64 m_uncomp_size;
mz_uint16 m_internal_attr;
mz_uint32 m_external_attr;
mz_uint64 m_local_header_ofs;
mz_uint32 m_comment_size;
char m_filename[MZ_ZIP_MAX_ARCHIVE_FILENAME_SIZE];
char m_comment[MZ_ZIP_MAX_ARCHIVE_FILE_COMMENT_SIZE];
} mz_zip_archive_file_stat;
typedef size_t (*mz_file_read_func)(void *pOpaque, mz_uint64 file_ofs, void *pBuf, size_t n);
typedef size_t (*mz_file_write_func)(void *pOpaque, mz_uint64 file_ofs, const void *pBuf, size_t n);
struct mz_zip_internal_state_tag;
typedef struct mz_zip_internal_state_tag mz_zip_internal_state;
typedef enum {
MZ_ZIP_MODE_INVALID = 0,
MZ_ZIP_MODE_READING = 1,
MZ_ZIP_MODE_WRITING = 2,
MZ_ZIP_MODE_WRITING_HAS_BEEN_FINALIZED = 3
} mz_zip_mode;
typedef struct mz_zip_archive_tag {
mz_uint64 m_archive_size;
mz_uint64 m_central_directory_file_ofs;
mz_uint m_total_files;
mz_zip_mode m_zip_mode;
mz_uint m_file_offset_alignment;
mz_alloc_func m_pAlloc;
mz_free_func m_pFree;
mz_realloc_func m_pRealloc;
void *m_pAlloc_opaque;
mz_file_read_func m_pRead;
mz_file_write_func m_pWrite;
void *m_pIO_opaque;
mz_zip_internal_state *m_pState;
} mz_zip_archive;
typedef enum {
MZ_ZIP_FLAG_CASE_SENSITIVE = 0x0100,
MZ_ZIP_FLAG_IGNORE_PATH = 0x0200,
MZ_ZIP_FLAG_COMPRESSED_DATA = 0x0400,
MZ_ZIP_FLAG_DO_NOT_SORT_CENTRAL_DIRECTORY = 0x0800
} mz_zip_flags;
// ZIP archive reading
// Inits a ZIP archive reader.
// These functions read and validate the archive's central directory.
mz_bool mz_zip_reader_init(mz_zip_archive *pZip, mz_uint64 size, mz_uint32 flags);
mz_bool mz_zip_reader_init_mem(mz_zip_archive *pZip, const void *pMem, size_t size, mz_uint32 flags);
#ifndef MINIZ_NO_STDIO
mz_bool mz_zip_reader_init_file(mz_zip_archive *pZip, const char *pFilename, mz_uint32 flags);
#endif
// Returns the total number of files in the archive.
mz_uint mz_zip_reader_get_num_files(mz_zip_archive *pZip);
// Returns detailed information about an archive file entry.
mz_bool mz_zip_reader_file_stat(mz_zip_archive *pZip, mz_uint file_index, mz_zip_archive_file_stat *pStat);
// Determines if an archive file entry is a directory entry.
mz_bool mz_zip_reader_is_file_a_directory(mz_zip_archive *pZip, mz_uint file_index);
mz_bool mz_zip_reader_is_file_encrypted(mz_zip_archive *pZip, mz_uint file_index);
// Retrieves the filename of an archive file entry.
// Returns the number of bytes written to pFilename, or if filename_buf_size is 0 this function returns the number of bytes needed to fully store the filename.
mz_uint mz_zip_reader_get_filename(mz_zip_archive *pZip, mz_uint file_index, char *pFilename, mz_uint filename_buf_size);
// Attempts to locates a file in the archive's central directory.
// Valid flags: MZ_ZIP_FLAG_CASE_SENSITIVE, MZ_ZIP_FLAG_IGNORE_PATH
// Returns -1 if the file cannot be found.
int mz_zip_reader_locate_file(mz_zip_archive *pZip, const char *pName, const char *pComment, mz_uint flags);
// Extracts a archive file to a memory buffer using no memory allocation.
mz_bool mz_zip_reader_extract_to_mem_no_alloc(mz_zip_archive *pZip, mz_uint file_index, void *pBuf, size_t buf_size, mz_uint flags, void *pUser_read_buf, size_t user_read_buf_size);
mz_bool mz_zip_reader_extract_file_to_mem_no_alloc(mz_zip_archive *pZip, const char *pFilename, void *pBuf, size_t buf_size, mz_uint flags, void *pUser_read_buf, size_t user_read_buf_size);
// Extracts a archive file to a memory buffer.
mz_bool mz_zip_reader_extract_to_mem(mz_zip_archive *pZip, mz_uint file_index, void *pBuf, size_t buf_size, mz_uint flags);
mz_bool mz_zip_reader_extract_file_to_mem(mz_zip_archive *pZip, const char *pFilename, void *pBuf, size_t buf_size, mz_uint flags);
// Extracts a archive file to a dynamically allocated heap buffer.
void *mz_zip_reader_extract_to_heap(mz_zip_archive *pZip, mz_uint file_index, size_t *pSize, mz_uint flags);
void *mz_zip_reader_extract_file_to_heap(mz_zip_archive *pZip, const char *pFilename, size_t *pSize, mz_uint flags);
// Extracts a archive file using a callback function to output the file's data.
mz_bool mz_zip_reader_extract_to_callback(mz_zip_archive *pZip, mz_uint file_index, mz_file_write_func pCallback, void *pOpaque, mz_uint flags);
mz_bool mz_zip_reader_extract_file_to_callback(mz_zip_archive *pZip, const char *pFilename, mz_file_write_func pCallback, void *pOpaque, mz_uint flags);
#ifndef MINIZ_NO_STDIO
// Extracts a archive file to a disk file and sets its last accessed and modified times.
// This function only extracts files, not archive directory records.
mz_bool mz_zip_reader_extract_to_file(mz_zip_archive *pZip, mz_uint file_index, const char *pDst_filename, mz_uint flags);
mz_bool mz_zip_reader_extract_file_to_file(mz_zip_archive *pZip, const char *pArchive_filename, const char *pDst_filename, mz_uint flags);
#endif
// Ends archive reading, freeing all allocations, and closing the input archive file if mz_zip_reader_init_file() was used.
mz_bool mz_zip_reader_end(mz_zip_archive *pZip);
// ZIP archive writing
#ifndef MINIZ_NO_ARCHIVE_WRITING_APIS
// Inits a ZIP archive writer.
mz_bool mz_zip_writer_init(mz_zip_archive *pZip, mz_uint64 existing_size);
mz_bool mz_zip_writer_init_heap(mz_zip_archive *pZip, size_t size_to_reserve_at_beginning, size_t initial_allocation_size);
#ifndef MINIZ_NO_STDIO
mz_bool mz_zip_writer_init_file(mz_zip_archive *pZip, const char *pFilename, mz_uint64 size_to_reserve_at_beginning);
#endif
// Converts a ZIP archive reader object into a writer object, to allow efficient in-place file appends to occur on an existing archive.
// For archives opened using mz_zip_reader_init_file, pFilename must be the archive's filename so it can be reopened for writing. If the file can't be reopened, mz_zip_reader_end() will be called.
// For archives opened using mz_zip_reader_init_mem, the memory block must be growable using the realloc callback (which defaults to realloc unless you've overridden it).
// Finally, for archives opened using mz_zip_reader_init, the mz_zip_archive's user provided m_pWrite function cannot be NULL.
// Note: In-place archive modification is not recommended unless you know what you're doing, because if execution stops or something goes wrong before
// the archive is finalized the file's central directory will be hosed.
mz_bool mz_zip_writer_init_from_reader(mz_zip_archive *pZip, const char *pFilename);
// Adds the contents of a memory buffer to an archive. These functions record the current local time into the archive.
// To add a directory entry, call this method with an archive name ending in a forwardslash with empty buffer.
// level_and_flags - compression level (0-10, see MZ_BEST_SPEED, MZ_BEST_COMPRESSION, etc.) logically OR'd with zero or more mz_zip_flags, or just set to MZ_DEFAULT_COMPRESSION.
mz_bool mz_zip_writer_add_mem(mz_zip_archive *pZip, const char *pArchive_name, const void *pBuf, size_t buf_size, mz_uint level_and_flags);
mz_bool mz_zip_writer_add_mem_ex(mz_zip_archive *pZip, const char *pArchive_name, const void *pBuf, size_t buf_size, const void *pComment, mz_uint16 comment_size, mz_uint level_and_flags, mz_uint64 uncomp_size, mz_uint32 uncomp_crc32);
#ifndef MINIZ_NO_STDIO
// Adds the contents of a disk file to an archive. This function also records the disk file's modified time into the archive.
// level_and_flags - compression level (0-10, see MZ_BEST_SPEED, MZ_BEST_COMPRESSION, etc.) logically OR'd with zero or more mz_zip_flags, or just set to MZ_DEFAULT_COMPRESSION.
mz_bool mz_zip_writer_add_file(mz_zip_archive *pZip, const char *pArchive_name, const char *pSrc_filename, const void *pComment, mz_uint16 comment_size, mz_uint level_and_flags);
#endif
// Adds a file to an archive by fully cloning the data from another archive.
// This function fully clones the source file's compressed data (no recompression), along with its full filename, extra data, and comment fields.
mz_bool mz_zip_writer_add_from_zip_reader(mz_zip_archive *pZip, mz_zip_archive *pSource_zip, mz_uint file_index);
// Finalizes the archive by writing the central directory records followed by the end of central directory record.
// After an archive is finalized, the only valid call on the mz_zip_archive struct is mz_zip_writer_end().
// An archive must be manually finalized by calling this function for it to be valid.
mz_bool mz_zip_writer_finalize_archive(mz_zip_archive *pZip);
mz_bool mz_zip_writer_finalize_heap_archive(mz_zip_archive *pZip, void **pBuf, size_t *pSize);
// Ends archive writing, freeing all allocations, and closing the output file if mz_zip_writer_init_file() was used.
// Note for the archive to be valid, it must have been finalized before ending.
mz_bool mz_zip_writer_end(mz_zip_archive *pZip);
// Misc. high-level helper functions:
// mz_zip_add_mem_to_archive_file_in_place() efficiently (but not atomically) appends a memory blob to a ZIP archive.
// level_and_flags - compression level (0-10, see MZ_BEST_SPEED, MZ_BEST_COMPRESSION, etc.) logically OR'd with zero or more mz_zip_flags, or just set to MZ_DEFAULT_COMPRESSION.
mz_bool mz_zip_add_mem_to_archive_file_in_place(const char *pZip_filename, const char *pArchive_name, const void *pBuf, size_t buf_size, const void *pComment, mz_uint16 comment_size, mz_uint level_and_flags);
// Reads a single file from an archive into a heap block.
// Returns NULL on failure.
void *mz_zip_extract_archive_file_to_heap(const char *pZip_filename, const char *pArchive_name, size_t *pSize, mz_uint zip_flags);
#endif // #ifndef MINIZ_NO_ARCHIVE_WRITING_APIS
#endif // #ifndef MINIZ_NO_ARCHIVE_APIS
// ------------------- Low-level Decompression API Definitions
// Decompression flags used by tinfl_decompress().
// TINFL_FLAG_PARSE_ZLIB_HEADER: If set, the input has a valid zlib header and ends with an adler32 checksum (it's a valid zlib stream). Otherwise, the input is a raw deflate stream.
// TINFL_FLAG_HAS_MORE_INPUT: If set, there are more input bytes available beyond the end of the supplied input buffer. If clear, the input buffer contains all remaining input.
// TINFL_FLAG_USING_NON_WRAPPING_OUTPUT_BUF: If set, the output buffer is large enough to hold the entire decompressed stream. If clear, the output buffer is at least the size of the dictionary (typically 32KB).
// TINFL_FLAG_COMPUTE_ADLER32: Force adler-32 checksum computation of the decompressed bytes.
enum {
TINFL_FLAG_PARSE_ZLIB_HEADER = 1,
TINFL_FLAG_HAS_MORE_INPUT = 2,
TINFL_FLAG_USING_NON_WRAPPING_OUTPUT_BUF = 4,
TINFL_FLAG_COMPUTE_ADLER32 = 8
};
// High level decompression functions:
// tinfl_decompress_mem_to_heap() decompresses a block in memory to a heap block allocated via malloc().
// On entry:
// pSrc_buf, src_buf_len: Pointer and size of the Deflate or zlib source data to decompress.
// On return:
// Function returns a pointer to the decompressed data, or NULL on failure.
// *pOut_len will be set to the decompressed data's size, which could be larger than src_buf_len on uncompressible data.
// The caller must call mz_free() on the returned block when it's no longer needed.
void *tinfl_decompress_mem_to_heap(const void *pSrc_buf, size_t src_buf_len, size_t *pOut_len, int flags);
// tinfl_decompress_mem_to_mem() decompresses a block in memory to another block in memory.
// Returns TINFL_DECOMPRESS_MEM_TO_MEM_FAILED on failure, or the number of bytes written on success.
#define TINFL_DECOMPRESS_MEM_TO_MEM_FAILED ((size_t)(-1))
size_t tinfl_decompress_mem_to_mem(void *pOut_buf, size_t out_buf_len, const void *pSrc_buf, size_t src_buf_len, int flags);
// tinfl_decompress_mem_to_callback() decompresses a block in memory to an internal 32KB buffer, and a user provided callback function will be called to flush the buffer.
// Returns 1 on success or 0 on failure.
typedef int (*tinfl_put_buf_func_ptr)(const void *pBuf, int len, void *pUser);
int tinfl_decompress_mem_to_callback(const void *pIn_buf, size_t *pIn_buf_size, tinfl_put_buf_func_ptr pPut_buf_func, void *pPut_buf_user, int flags);
struct tinfl_decompressor_tag; typedef struct tinfl_decompressor_tag tinfl_decompressor;
// Max size of LZ dictionary.
#define TINFL_LZ_DICT_SIZE 32768
// Return status.
typedef enum {
TINFL_STATUS_BAD_PARAM = -3,
TINFL_STATUS_ADLER32_MISMATCH = -2,
TINFL_STATUS_FAILED = -1,
TINFL_STATUS_DONE = 0,
TINFL_STATUS_NEEDS_MORE_INPUT = 1,
TINFL_STATUS_HAS_MORE_OUTPUT = 2
} tinfl_status;
// Initializes the decompressor to its initial state.
#define tinfl_init(r) do { (r)->m_state = 0; } MZ_MACRO_END
#define tinfl_get_adler32(r) (r)->m_check_adler32
// Main low-level decompressor coroutine function. This is the only function actually needed for decompression. All the other functions are just high-level helpers for improved usability.
// This is a universal API, i.e. it can be used as a building block to build any desired higher level decompression API. In the limit case, it can be called once per every byte input or output.
tinfl_status tinfl_decompress(tinfl_decompressor *r, const mz_uint8 *pIn_buf_next, size_t *pIn_buf_size, mz_uint8 *pOut_buf_start, mz_uint8 *pOut_buf_next, size_t *pOut_buf_size, const mz_uint32 decomp_flags);
// Internal/private bits follow.
enum {
TINFL_MAX_HUFF_TABLES = 3, TINFL_MAX_HUFF_SYMBOLS_0 = 288, TINFL_MAX_HUFF_SYMBOLS_1 = 32, TINFL_MAX_HUFF_SYMBOLS_2 = 19,
TINFL_FAST_LOOKUP_BITS = 10, TINFL_FAST_LOOKUP_SIZE = 1 << TINFL_FAST_LOOKUP_BITS
};
typedef struct {
mz_uint8 m_code_size[TINFL_MAX_HUFF_SYMBOLS_0];
mz_int16 m_look_up[TINFL_FAST_LOOKUP_SIZE], m_tree[TINFL_MAX_HUFF_SYMBOLS_0 * 2];
} tinfl_huff_table;
#if MINIZ_HAS_64BIT_REGISTERS
#define TINFL_USE_64BIT_BITBUF 1
#endif
#if TINFL_USE_64BIT_BITBUF
typedef mz_uint64 tinfl_bit_buf_t;
#define TINFL_BITBUF_SIZE (64)
#else
typedef mz_uint32 tinfl_bit_buf_t;
#define TINFL_BITBUF_SIZE (32)
#endif
struct tinfl_decompressor_tag {
mz_uint32 m_state, m_num_bits, m_zhdr0, m_zhdr1, m_z_adler32, m_final, m_type, m_check_adler32, m_dist, m_counter, m_num_extra, m_table_sizes[TINFL_MAX_HUFF_TABLES];
tinfl_bit_buf_t m_bit_buf;
size_t m_dist_from_out_buf_start;
tinfl_huff_table m_tables[TINFL_MAX_HUFF_TABLES];
mz_uint8 m_raw_header[4], m_len_codes[TINFL_MAX_HUFF_SYMBOLS_0 + TINFL_MAX_HUFF_SYMBOLS_1 + 137];
};
// ------------------- Low-level Compression API Definitions
// Set TDEFL_LESS_MEMORY to 1 to use less memory (compression will be slightly slower, and raw/dynamic blocks will be output more frequently).
#define TDEFL_LESS_MEMORY 1
// tdefl_init() compression flags logically OR'd together (low 12 bits contain the max. number of probes per dictionary search):
// TDEFL_DEFAULT_MAX_PROBES: The compressor defaults to 128 dictionary probes per dictionary search. 0=Huffman only, 1=Huffman+LZ (fastest/crap compression), 4095=Huffman+LZ (slowest/best compression).
enum {
TDEFL_HUFFMAN_ONLY = 0, TDEFL_DEFAULT_MAX_PROBES = 128, TDEFL_MAX_PROBES_MASK = 0xFFF
};
// TDEFL_WRITE_ZLIB_HEADER: If set, the compressor outputs a zlib header before the deflate data, and the Adler-32 of the source data at the end. Otherwise, you'll get raw deflate data.
// TDEFL_COMPUTE_ADLER32: Always compute the adler-32 of the input data (even when not writing zlib headers).
// TDEFL_GREEDY_PARSING_FLAG: Set to use faster greedy parsing, instead of more efficient lazy parsing.
// TDEFL_NONDETERMINISTIC_PARSING_FLAG: Enable to decrease the compressor's initialization time to the minimum, but the output may vary from run to run given the same input (depending on the contents of memory).
// TDEFL_RLE_MATCHES: Only look for RLE matches (matches with a distance of 1)
// TDEFL_FILTER_MATCHES: Discards matches <= 5 chars if enabled.
// TDEFL_FORCE_ALL_STATIC_BLOCKS: Disable usage of optimized Huffman tables.
// TDEFL_FORCE_ALL_RAW_BLOCKS: Only use raw (uncompressed) deflate blocks.
// The low 12 bits are reserved to control the max # of hash probes per dictionary lookup (see TDEFL_MAX_PROBES_MASK).
enum {
TDEFL_WRITE_ZLIB_HEADER = 0x01000,
TDEFL_COMPUTE_ADLER32 = 0x02000,
TDEFL_GREEDY_PARSING_FLAG = 0x04000,
TDEFL_NONDETERMINISTIC_PARSING_FLAG = 0x08000,
TDEFL_RLE_MATCHES = 0x10000,
TDEFL_FILTER_MATCHES = 0x20000,
TDEFL_FORCE_ALL_STATIC_BLOCKS = 0x40000,
TDEFL_FORCE_ALL_RAW_BLOCKS = 0x80000
};
// High level compression functions:
// tdefl_compress_mem_to_heap() compresses a block in memory to a heap block allocated via malloc().
// On entry:
// pSrc_buf, src_buf_len: Pointer and size of source block to compress.
// flags: The max match finder probes (default is 128) logically OR'd against the above flags. Higher probes are slower but improve compression.
// On return:
// Function returns a pointer to the compressed data, or NULL on failure.
// *pOut_len will be set to the compressed data's size, which could be larger than src_buf_len on uncompressible data.
// The caller must free() the returned block when it's no longer needed.
void *tdefl_compress_mem_to_heap(const void *pSrc_buf, size_t src_buf_len, size_t *pOut_len, int flags);
// tdefl_compress_mem_to_mem() compresses a block in memory to another block in memory.
// Returns 0 on failure.
size_t tdefl_compress_mem_to_mem(void *pOut_buf, size_t out_buf_len, const void *pSrc_buf, size_t src_buf_len, int flags);
// Compresses an image to a compressed PNG file in memory.
// On entry:
// pImage, w, h, and num_chans describe the image to compress. num_chans may be 1, 2, 3, or 4.
// The image pitch in bytes per scanline will be w*num_chans. The leftmost pixel on the top scanline is stored first in memory.
// level may range from [0,10], use MZ_NO_COMPRESSION, MZ_BEST_SPEED, MZ_BEST_COMPRESSION, etc. or a decent default is MZ_DEFAULT_LEVEL
// If flip is true, the image will be flipped on the Y axis (useful for OpenGL apps).
// On return:
// Function returns a pointer to the compressed data, or NULL on failure.
// *pLen_out will be set to the size of the PNG image file.
// The caller must mz_free() the returned heap block (which will typically be larger than *pLen_out) when it's no longer needed.
void *tdefl_write_image_to_png_file_in_memory_ex(const void *pImage, int w, int h, int num_chans, size_t *pLen_out, mz_uint level, mz_bool flip);
void *tdefl_write_image_to_png_file_in_memory(const void *pImage, int w, int h, int num_chans, size_t *pLen_out);
// Output stream interface. The compressor uses this interface to write compressed data. It'll typically be called TDEFL_OUT_BUF_SIZE at a time.
typedef mz_bool (*tdefl_put_buf_func_ptr)(const void *pBuf, int len, void *pUser);
// tdefl_compress_mem_to_output() compresses a block to an output stream. The above helpers use this function internally.
mz_bool tdefl_compress_mem_to_output(const void *pBuf, size_t buf_len, tdefl_put_buf_func_ptr pPut_buf_func, void *pPut_buf_user, int flags);
enum { TDEFL_MAX_HUFF_TABLES = 3, TDEFL_MAX_HUFF_SYMBOLS_0 = 288, TDEFL_MAX_HUFF_SYMBOLS_1 = 32, TDEFL_MAX_HUFF_SYMBOLS_2 = 19, TDEFL_LZ_DICT_SIZE = 32768, TDEFL_LZ_DICT_SIZE_MASK = TDEFL_LZ_DICT_SIZE - 1, TDEFL_MIN_MATCH_LEN = 3, TDEFL_MAX_MATCH_LEN = 258 };
// TDEFL_OUT_BUF_SIZE MUST be large enough to hold a single entire compressed output block (using static/fixed Huffman codes).
#if TDEFL_LESS_MEMORY
enum { TDEFL_LZ_CODE_BUF_SIZE = 24 * 1024, TDEFL_OUT_BUF_SIZE = (TDEFL_LZ_CODE_BUF_SIZE * 13 ) / 10, TDEFL_MAX_HUFF_SYMBOLS = 288, TDEFL_LZ_HASH_BITS = 12, TDEFL_LEVEL1_HASH_SIZE_MASK = 4095, TDEFL_LZ_HASH_SHIFT = (TDEFL_LZ_HASH_BITS + 2) / 3, TDEFL_LZ_HASH_SIZE = 1 << TDEFL_LZ_HASH_BITS };
#else
enum { TDEFL_LZ_CODE_BUF_SIZE = 64 * 1024, TDEFL_OUT_BUF_SIZE = (TDEFL_LZ_CODE_BUF_SIZE * 13 ) / 10, TDEFL_MAX_HUFF_SYMBOLS = 288, TDEFL_LZ_HASH_BITS = 15, TDEFL_LEVEL1_HASH_SIZE_MASK = 4095, TDEFL_LZ_HASH_SHIFT = (TDEFL_LZ_HASH_BITS + 2) / 3, TDEFL_LZ_HASH_SIZE = 1 << TDEFL_LZ_HASH_BITS };
#endif
// The low-level tdefl functions below may be used directly if the above helper functions aren't flexible enough. The low-level functions don't make any heap allocations, unlike the above helper functions.
typedef enum {
TDEFL_STATUS_BAD_PARAM = -2,
TDEFL_STATUS_PUT_BUF_FAILED = -1,
TDEFL_STATUS_OKAY = 0,
TDEFL_STATUS_DONE = 1,
} tdefl_status;
// Must map to MZ_NO_FLUSH, MZ_SYNC_FLUSH, etc. enums
typedef enum {
TDEFL_NO_FLUSH = 0,
TDEFL_SYNC_FLUSH = 2,
TDEFL_FULL_FLUSH = 3,
TDEFL_FINISH = 4
} tdefl_flush;
// tdefl's compression state structure.
typedef struct {
tdefl_put_buf_func_ptr m_pPut_buf_func;
void *m_pPut_buf_user;
mz_uint m_flags, m_max_probes[2];
int m_greedy_parsing;
mz_uint m_adler32, m_lookahead_pos, m_lookahead_size, m_dict_size;
mz_uint8 *m_pLZ_code_buf, *m_pLZ_flags, *m_pOutput_buf, *m_pOutput_buf_end;
mz_uint m_num_flags_left, m_total_lz_bytes, m_lz_code_buf_dict_pos, m_bits_in, m_bit_buffer;
mz_uint m_saved_match_dist, m_saved_match_len, m_saved_lit, m_output_flush_ofs, m_output_flush_remaining, m_finished, m_block_index, m_wants_to_finish;
tdefl_status m_prev_return_status;
const void *m_pIn_buf;
void *m_pOut_buf;
size_t *m_pIn_buf_size, *m_pOut_buf_size;
tdefl_flush m_flush;
const mz_uint8 *m_pSrc;
size_t m_src_buf_left, m_out_buf_ofs;
mz_uint8 m_dict[TDEFL_LZ_DICT_SIZE + TDEFL_MAX_MATCH_LEN - 1];
mz_uint16 m_huff_count[TDEFL_MAX_HUFF_TABLES][TDEFL_MAX_HUFF_SYMBOLS];
mz_uint16 m_huff_codes[TDEFL_MAX_HUFF_TABLES][TDEFL_MAX_HUFF_SYMBOLS];
mz_uint8 m_huff_code_sizes[TDEFL_MAX_HUFF_TABLES][TDEFL_MAX_HUFF_SYMBOLS];
mz_uint8 m_lz_code_buf[TDEFL_LZ_CODE_BUF_SIZE];
mz_uint16 m_next[TDEFL_LZ_DICT_SIZE];
mz_uint16 m_hash[TDEFL_LZ_HASH_SIZE];
mz_uint8 m_output_buf[TDEFL_OUT_BUF_SIZE];
} tdefl_compressor;
// Initializes the compressor.
// There is no corresponding deinit() function because the tdefl API's do not dynamically allocate memory.
// pBut_buf_func: If **not** NULL, output data will be supplied to the specified callback. In this case, the user should call the tdefl_compress_buffer() API for compression.
// If pBut_buf_func is NULL the user should always call the tdefl_compress() API.
// flags: See the above enums (TDEFL_HUFFMAN_ONLY, TDEFL_WRITE_ZLIB_HEADER, etc.)
tdefl_status tdefl_init(tdefl_compressor *d, tdefl_put_buf_func_ptr pPut_buf_func, void *pPut_buf_user, int flags);
// Compresses a block of data, consuming as much of the specified input buffer as possible, and writing as much compressed data to the specified output buffer as possible.
tdefl_status tdefl_compress(tdefl_compressor *d, const void *pIn_buf, size_t *pIn_buf_size, void *pOut_buf, size_t *pOut_buf_size, tdefl_flush flush);
// tdefl_compress_buffer() is only usable when the tdefl_init() is called with a non-NULL tdefl_put_buf_func_ptr.
// tdefl_compress_buffer() always consumes the entire input buffer.
tdefl_status tdefl_compress_buffer(tdefl_compressor *d, const void *pIn_buf, size_t in_buf_size, tdefl_flush flush);
tdefl_status tdefl_get_prev_return_status(tdefl_compressor *d);
mz_uint32 tdefl_get_adler32(tdefl_compressor *d);
// Can't use tdefl_create_comp_flags_from_zip_params if MINIZ_NO_ZLIB_APIS isn't defined, because it uses some of its macros.
#ifndef MINIZ_NO_ZLIB_APIS
// Create tdefl_compress() flags given zlib-style compression parameters.
// level may range from [0,10] (where 10 is absolute max compression, but may be much slower on some files)
// window_bits may be -15 (raw deflate) or 15 (zlib)
// strategy may be either MZ_DEFAULT_STRATEGY, MZ_FILTERED, MZ_HUFFMAN_ONLY, MZ_RLE, or MZ_FIXED
mz_uint tdefl_create_comp_flags_from_zip_params(int level, int window_bits, int strategy);
#endif // #ifndef MINIZ_NO_ZLIB_APIS
#ifdef __cplusplus
}
#endif
#endif // MINIZ_HEADER_INCLUDED

86
tools/sdk/esp32/include/esp_rom/include/esp32h2/rom/rom_layout.h Normal file
View File

@ -0,0 +1,86 @@
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#pragma once
#include <stdint.h>
#ifdef __cplusplus
extern "C" {
#endif
#define SUPPORT_BTDM 1
#define SUPPORT_WIFI 1
/* Structure and functions for returning ROM global layout
*
* This is for address symbols defined in the linker script, which may change during ECOs.
*/
typedef struct {
void *dram0_stack_shared_mem_start;
void *dram0_rtos_reserved_start;
void *stack_sentry;
void *stack;
void *stack_sentry_app;
void *stack_app;
/* BTDM data */
void *data_start_btdm;
void *data_end_btdm;
void *bss_start_btdm;
void *bss_end_btdm;
void *data_start_btdm_rom;
void *data_end_btdm_rom;
void *data_start_interface_btdm;
void *data_end_interface_btdm;
void *bss_start_interface_btdm;
void *bss_end_interface_btdm;
/* Other DRAM ranges */
#if SUPPORT_BTDM || SUPPORT_WIFI
void *dram_start_phyrom;
void *dram_end_phyrom;
#endif
#if SUPPORT_WIFI
void *dram_start_coexist;
void *dram_end_coexist;
void *dram_start_net80211;
void *dram_end_net80211;
void *dram_start_pp;
void *dram_end_pp;
void *data_start_interface_coexist;
void *data_end_interface_coexist;
void *bss_start_interface_coexist;
void *bss_end_interface_coexist;
void *data_start_interface_net80211;
void *data_end_interface_net80211;
void *bss_start_interface_net80211;
void *bss_end_interface_net80211;
void *data_start_interface_pp;
void *data_end_interface_pp;
void *bss_start_interface_pp;
void *bss_end_interface_pp;
#endif
void *dram_start_usbdev_rom;
void *dram_end_usbdev_rom;
void *dram_start_uart_rom;
void *dram_end_uart_rom;
} ets_rom_layout_t;
extern const ets_rom_layout_t * const ets_rom_layout_p;
#ifdef __cplusplus
}
#endif

46
tools/sdk/esp32/include/esp_rom/include/esp32h2/rom/rsa_pss.h Normal file
View File

@ -0,0 +1,46 @@
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#ifndef _ROM_RSA_PSS_H_
#define _ROM_RSA_PSS_H_
#include <stdint.h>
#include <stdbool.h>
#include <stddef.h>
#ifdef __cplusplus
extern "C" {
#endif
#define ETS_SIG_LEN 384 /* Bytes */
#define ETS_DIGEST_LEN 32 /* SHA-256, bytes */
typedef struct {
uint8_t n[384]; /* Public key modulus */
uint32_t e; /* Public key exponent */
uint8_t rinv[384];
uint32_t mdash;
} ets_rsa_pubkey_t;
bool ets_rsa_pss_verify(const ets_rsa_pubkey_t *key, const uint8_t *sig, const uint8_t *digest, uint8_t *verified_digest);
void ets_mgf1_sha256(const uint8_t *mgfSeed, size_t seedLen, size_t maskLen, uint8_t *mask);
bool ets_emsa_pss_verify(const uint8_t *encoded_message, const uint8_t *mhash);
#ifdef __cplusplus
}
#endif
#endif

258
tools/sdk/esp32/include/esp_rom/include/esp32h2/rom/rtc.h Normal file
View File

@ -0,0 +1,258 @@
/*
* SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef _ROM_RTC_H_
#define _ROM_RTC_H_
#include "ets_sys.h"
#include <stdbool.h>
#include <stdint.h>
#include "soc/soc.h"
#include "soc/rtc_cntl_reg.h"
#include "soc/reset_reasons.h"
#ifdef __cplusplus
extern "C" {
#endif
/** \defgroup rtc_apis, rtc registers and memory related apis
* @brief rtc apis
*/
/** @addtogroup rtc_apis
* @{
*/
/**************************************************************************************
* Note: *
* Some Rtc memory and registers are used, in ROM or in internal library. *
* Please do not use reserved or used rtc memory or registers. *
* *
*************************************************************************************
* RTC Memory & Store Register usage
*************************************************************************************
* rtc memory addr type size usage
* 0x3f421000(0x50000000) Slow SIZE_CP Co-Processor code/Reset Entry
* 0x3f421000+SIZE_CP Slow 8192-SIZE_CP
*
* 0x3ff80000(0x40070000) Fast 8192 deep sleep entry code
*
*************************************************************************************
* RTC store registers usage
* RTC_CNTL_STORE0_REG Reserved
* RTC_CNTL_STORE1_REG RTC_SLOW_CLK calibration value
* RTC_CNTL_STORE2_REG Boot time, low word
* RTC_CNTL_STORE3_REG Boot time, high word
* RTC_CNTL_STORE4_REG External XTAL frequency
* RTC_CNTL_STORE5_REG APB bus frequency
* RTC_CNTL_STORE6_REG FAST_RTC_MEMORY_ENTRY
* RTC_CNTL_STORE7_REG FAST_RTC_MEMORY_CRC
*************************************************************************************
*/
#define RTC_SLOW_CLK_CAL_REG RTC_CNTL_STORE1_REG
#define RTC_BOOT_TIME_LOW_REG RTC_CNTL_STORE2_REG
#define RTC_BOOT_TIME_HIGH_REG RTC_CNTL_STORE3_REG
#define RTC_XTAL_FREQ_REG RTC_CNTL_STORE4_REG
#define RTC_APB_FREQ_REG RTC_CNTL_STORE5_REG
#define RTC_ENTRY_ADDR_REG RTC_CNTL_STORE6_REG
#define RTC_RESET_CAUSE_REG RTC_CNTL_STORE6_REG
#define RTC_MEMORY_CRC_REG RTC_CNTL_STORE7_REG
#define RTC_DISABLE_ROM_LOG ((1 << 0) | (1 << 16)) //!< Disable logging from the ROM code.
typedef enum {
AWAKE = 0, //<CPU ON
LIGHT_SLEEP = BIT0, //CPU waiti, PLL ON. We don't need explicitly set this mode.
DEEP_SLEEP = BIT1 //CPU OFF, PLL OFF, only specific timer could wake up
} SLEEP_MODE;
typedef enum {
NO_MEAN = 0,
POWERON_RESET = 1, /**<1, Vbat power on reset*/
RTC_SW_SYS_RESET = 3, /**<3, Software reset digital core*/
DEEPSLEEP_RESET = 5, /**<5, Deep Sleep reset digital core*/
TG0WDT_SYS_RESET = 7, /**<7, Timer Group0 Watch dog reset digital core*/
TG1WDT_SYS_RESET = 8, /**<8, Timer Group1 Watch dog reset digital core*/
RTCWDT_SYS_RESET = 9, /**<9, RTC Watch dog Reset digital core*/
INTRUSION_RESET = 10, /**<10, Instrusion tested to reset CPU*/
TG0WDT_CPU_RESET = 11, /**<11, Time Group0 reset CPU*/
RTC_SW_CPU_RESET = 12, /**<12, Software reset CPU*/
RTCWDT_CPU_RESET = 13, /**<13, RTC Watch dog Reset CPU*/
RTCWDT_BROWN_OUT_RESET = 15, /**<15, Reset when the vdd voltage is not stable*/
RTCWDT_RTC_RESET = 16, /**<16, RTC Watch dog reset digital core and rtc module*/
TG1WDT_CPU_RESET = 17, /**<17, Time Group1 reset CPU*/
SUPER_WDT_RESET = 18, /**<18, super watchdog reset digital core and rtc module*/
GLITCH_RTC_RESET = 19, /**<19, glitch reset digital core and rtc module*/
EFUSE_RESET = 20, /**<20, efuse reset digital core*/
USB_UART_CHIP_RESET = 21, /**<21, usb uart reset digital core */
USB_JTAG_CHIP_RESET = 22, /**<22, usb jtag reset digital core */
POWER_GLITCH_RESET = 23, /**<23, power glitch reset digital core and rtc module*/
JTAG_RESET = 24, /**<24, jtag reset CPU*/
} RESET_REASON;
// Check if the reset reason defined in ROM is compatible with soc/reset_reasons.h
_Static_assert((soc_reset_reason_t)POWERON_RESET == RESET_REASON_CHIP_POWER_ON, "POWERON_RESET != RESET_REASON_CHIP_POWER_ON");
_Static_assert((soc_reset_reason_t)RTC_SW_SYS_RESET == RESET_REASON_CORE_SW, "RTC_SW_SYS_RESET != RESET_REASON_CORE_SW");
_Static_assert((soc_reset_reason_t)DEEPSLEEP_RESET == RESET_REASON_CORE_DEEP_SLEEP, "DEEPSLEEP_RESET != RESET_REASON_CORE_DEEP_SLEEP");
_Static_assert((soc_reset_reason_t)TG0WDT_SYS_RESET == RESET_REASON_CORE_MWDT0, "TG0WDT_SYS_RESET != RESET_REASON_CORE_MWDT0");
_Static_assert((soc_reset_reason_t)TG1WDT_SYS_RESET == RESET_REASON_CORE_MWDT1, "TG1WDT_SYS_RESET != RESET_REASON_CORE_MWDT1");
_Static_assert((soc_reset_reason_t)RTCWDT_SYS_RESET == RESET_REASON_CORE_RTC_WDT, "RTCWDT_SYS_RESET != RESET_REASON_CORE_RTC_WDT");
_Static_assert((soc_reset_reason_t)TG0WDT_CPU_RESET == RESET_REASON_CPU0_MWDT0, "TG0WDT_CPU_RESET != RESET_REASON_CPU0_MWDT0");
_Static_assert((soc_reset_reason_t)RTC_SW_CPU_RESET == RESET_REASON_CPU0_SW, "RTC_SW_CPU_RESET != RESET_REASON_CPU0_SW");
_Static_assert((soc_reset_reason_t)RTCWDT_CPU_RESET == RESET_REASON_CPU0_RTC_WDT, "RTCWDT_CPU_RESET != RESET_REASON_CPU0_RTC_WDT");
_Static_assert((soc_reset_reason_t)RTCWDT_BROWN_OUT_RESET == RESET_REASON_SYS_BROWN_OUT, "RTCWDT_BROWN_OUT_RESET != RESET_REASON_SYS_BROWN_OUT");
_Static_assert((soc_reset_reason_t)RTCWDT_RTC_RESET == RESET_REASON_SYS_RTC_WDT, "RTCWDT_RTC_RESET != RESET_REASON_SYS_RTC_WDT");
_Static_assert((soc_reset_reason_t)TG1WDT_CPU_RESET == RESET_REASON_CPU0_MWDT1, "TG1WDT_CPU_RESET != RESET_REASON_CPU0_MWDT1");
_Static_assert((soc_reset_reason_t)SUPER_WDT_RESET == RESET_REASON_SYS_SUPER_WDT, "SUPER_WDT_RESET != RESET_REASON_SYS_SUPER_WDT");
_Static_assert((soc_reset_reason_t)GLITCH_RTC_RESET == RESET_REASON_SYS_CLK_GLITCH, "GLITCH_RTC_RESET != RESET_REASON_SYS_CLK_GLITCH");
_Static_assert((soc_reset_reason_t)EFUSE_RESET == RESET_REASON_CORE_EFUSE_CRC, "EFUSE_RESET != RESET_REASON_CORE_EFUSE_CRC");
_Static_assert((soc_reset_reason_t)USB_UART_CHIP_RESET == RESET_REASON_CORE_USB_UART, "USB_UART_CHIP_RESET != RESET_REASON_CORE_USB_UART");
_Static_assert((soc_reset_reason_t)USB_JTAG_CHIP_RESET == RESET_REASON_CORE_USB_JTAG, "USB_JTAG_CHIP_RESET != RESET_REASON_CORE_USB_JTAG");
_Static_assert((soc_reset_reason_t)POWER_GLITCH_RESET == RESET_REASON_CORE_PWR_GLITCH, "POWER_GLITCH_RESET != RESET_REASON_CORE_PWR_GLITCH");
_Static_assert((soc_reset_reason_t)JTAG_RESET == RESET_REASON_CPU0_JTAG, "JTAG_RESET != RESET_REASON_CPU0_JTAG");
typedef enum {
NO_SLEEP = 0,
EXT_EVENT0_TRIG = BIT0,
EXT_EVENT1_TRIG = BIT1,
GPIO_TRIG = BIT2,
TIMER_EXPIRE = BIT3,
SDIO_TRIG = BIT4,
MAC_TRIG = BIT5,
UART0_TRIG = BIT6,
UART1_TRIG = BIT7,
TOUCH_TRIG = BIT8,
SAR_TRIG = BIT9,
BT_TRIG = BIT10,
RISCV_TRIG = BIT11,
XTAL_DEAD_TRIG = BIT12,
RISCV_TRAP_TRIG = BIT13,
USB_TRIG = BIT14
} WAKEUP_REASON;
typedef enum {
DISEN_WAKEUP = NO_SLEEP,
EXT_EVENT0_TRIG_EN = EXT_EVENT0_TRIG,
EXT_EVENT1_TRIG_EN = EXT_EVENT1_TRIG,
GPIO_TRIG_EN = GPIO_TRIG,
TIMER_EXPIRE_EN = TIMER_EXPIRE,
SDIO_TRIG_EN = SDIO_TRIG,
MAC_TRIG_EN = MAC_TRIG,
UART0_TRIG_EN = UART0_TRIG,
UART1_TRIG_EN = UART1_TRIG,
TOUCH_TRIG_EN = TOUCH_TRIG,
SAR_TRIG_EN = SAR_TRIG,
BT_TRIG_EN = BT_TRIG,
RISCV_TRIG_EN = RISCV_TRIG,
XTAL_DEAD_TRIG_EN = XTAL_DEAD_TRIG,
RISCV_TRAP_TRIG_EN = RISCV_TRAP_TRIG,
USB_TRIG_EN = USB_TRIG
} WAKEUP_ENABLE;
/**
* @brief Get the reset reason for CPU.
*
* @param int cpu_no : CPU no.
*
* @return RESET_REASON
*/
RESET_REASON rtc_get_reset_reason(int cpu_no);
/**
* @brief Get the wakeup cause for CPU.
*
* @param int cpu_no : CPU no.
*
* @return WAKEUP_REASON
*/
WAKEUP_REASON rtc_get_wakeup_cause(void);
/**
* @brief Get CRC for Fast RTC Memory.
*
* @param uint32_t start_addr : 0 - 0x7ff for Fast RTC Memory.
*
* @param uint32_t crc_len : 0 - 0x7ff, 0 for 4 byte, 0x7ff for 0x2000 byte.
*
* @return uint32_t : CRC32 result
*/
uint32_t calc_rtc_memory_crc(uint32_t start_addr, uint32_t crc_len);
/**
* @brief Suppress ROM log by setting specific RTC control register.
* @note This is not a permanent disable of ROM logging since the RTC register can not retain after chip reset.
*
* @param None
*
* @return None
*/
static inline void rtc_suppress_rom_log(void)
{
/* To disable logging in the ROM, only the least significant bit of the register is used,
* but since this register is also used to store the frequency of the main crystal (RTC_XTAL_FREQ_REG),
* you need to write to this register in the same format.
* Namely, the upper 16 bits and lower should be the same.
*/
REG_SET_BIT(RTC_CNTL_STORE4_REG, RTC_DISABLE_ROM_LOG);
}
/**
* @brief Set CRC of Fast RTC memory 0-0x7ff into RTC STORE7.
*
* @param None
*
* @return None
*/
void set_rtc_memory_crc(void);
/**
* @brief Fetch entry from RTC memory and RTC STORE reg
*
* @param uint32_t * entry_addr : the address to save entry
*
* @param RESET_REASON reset_reason : reset reason this time
*
* @return None
*/
void rtc_boot_control(uint32_t *entry_addr, RESET_REASON reset_reason);
/**
* @brief Software Reset digital core.
*
* It is not recommended to use this function in esp-idf, use
* esp_restart() instead.
*
* @param None
*
* @return None
*/
void software_reset(void);
/**
* @brief Software Reset digital core.
*
* It is not recommended to use this function in esp-idf, use
* esp_restart() instead.
*
* @param int cpu_no : The CPU to reset, 0 for PRO CPU, 1 for APP CPU.
*
* @return None
*/
void software_reset_cpu(int cpu_no);
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* _ROM_RTC_H_ */

117
tools/sdk/esp32/include/esp_rom/include/esp32h2/rom/secure_boot.h Normal file
View File

@ -0,0 +1,117 @@
/*
* SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
#include <stdint.h>
#include <stdbool.h>
#include "ets_sys.h"
#include "rsa_pss.h"
#ifdef __cplusplus
extern "C" {
#endif
typedef struct ets_secure_boot_sig_block ets_secure_boot_sig_block_t;
typedef struct ets_secure_boot_signature ets_secure_boot_signature_t;
typedef struct ets_secure_boot_key_digests ets_secure_boot_key_digests_t;
/* Anti-FI measure: use full words for success/fail, instead of
0/non-zero
*/
typedef enum {
SB_SUCCESS = 0x3A5A5AA5,
SB_FAILED = 0x7533885E,
} ets_secure_boot_status_t;
/* Verify and stage-load the bootloader image
(reconfigures cache to map, loads trusted key digests from efuse,
copies the bootloader into the staging buffer.)
If allow_key_revoke is true and aggressive revoke efuse is set,
any failed signature has its associated key revoked in efuse.
If result is SB_SUCCESS, the "simple hash" of the bootloader
is copied into verified_hash.
*/
ets_secure_boot_status_t ets_secure_boot_verify_stage_bootloader(uint8_t *verified_hash, bool allow_key_revoke);
/* Verify bootloader image (reconfigures cache to map),
with key digests provided as parameters.)
Can be used to verify secure boot status before enabling
secure boot permanently.
If stage_load parameter is true, bootloader is copied into staging
buffer in RAM at the same time.
If result is SB_SUCCESS, the "simple hash" of the bootloader is
copied into verified_hash.
*/
ets_secure_boot_status_t ets_secure_boot_verify_bootloader_with_keys(uint8_t *verified_hash, const ets_secure_boot_key_digests_t *trusted_keys, bool stage_load);
/* Read key digests from efuse. Any revoked/missing digests will be
marked as NULL
*/
ETS_STATUS ets_secure_boot_read_key_digests(ets_secure_boot_key_digests_t *trusted_keys);
/* Verify supplied signature against supplied digest, using
supplied trusted key digests.
Doesn't reconfigure cache or any other hardware access except for RSA peripheral.
If result is SB_SUCCESS, the image_digest value is copied into verified_digest.
*/
ets_secure_boot_status_t ets_secure_boot_verify_signature(const ets_secure_boot_signature_t *sig, const uint8_t *image_digest, const ets_secure_boot_key_digests_t *trusted_keys, uint8_t *verified_digest);
/* Revoke a public key digest in efuse.
@param index Digest to revoke. Must be 0, 1 or 2.
*/
void ets_secure_boot_revoke_public_key_digest(int index);
#define CRC_SIGN_BLOCK_LEN 1196
#define SIG_BLOCK_PADDING 4096
#define ETS_SECURE_BOOT_V2_SIGNATURE_MAGIC 0xE7
/* Secure Boot V2 signature block
(Up to 3 in a signature sector are appended to the image)
*/
struct ets_secure_boot_sig_block {
uint8_t magic_byte;
uint8_t version;
uint8_t _reserved1;
uint8_t _reserved2;
uint8_t image_digest[32];
ets_rsa_pubkey_t key;
uint8_t signature[384];
uint32_t block_crc;
uint8_t _padding[16];
};
_Static_assert(sizeof(ets_secure_boot_sig_block_t) == 1216, "invalid sig block size");
#define SECURE_BOOT_NUM_BLOCKS 3
/* V2 Secure boot signature sector (up to 3 blocks) */
struct ets_secure_boot_signature {
ets_secure_boot_sig_block_t block[SECURE_BOOT_NUM_BLOCKS];
uint8_t _padding[4096 - (sizeof(ets_secure_boot_sig_block_t) * SECURE_BOOT_NUM_BLOCKS)];
};
_Static_assert(sizeof(ets_secure_boot_signature_t) == 4096, "invalid sig sector size");
#define MAX_KEY_DIGESTS 3
struct ets_secure_boot_key_digests {
const void *key_digests[MAX_KEY_DIGESTS];
bool allow_key_revoke;
};
#ifdef __cplusplus
}
#endif

61
tools/sdk/esp32/include/esp_rom/include/esp32h2/rom/sha.h Normal file
View File

@ -0,0 +1,61 @@
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#ifndef _ROM_SHA_H_
#define _ROM_SHA_H_
#include <stdint.h>
#include <stdbool.h>
#include "ets_sys.h"
#ifdef __cplusplus
extern "C" {
#endif
typedef enum {
SHA1 = 0,
SHA2_224,
SHA2_256,
SHA_TYPE_MAX
} SHA_TYPE;
typedef struct SHAContext {
bool start;
bool in_hardware; // Is this context currently in peripheral? Needs to be manually cleared if multiple SHAs are interleaved
SHA_TYPE type;
uint32_t state[16]; // For SHA1/SHA224/SHA256, used 8, other used 16
unsigned char buffer[128]; // For SHA1/SHA224/SHA256, used 64, other used 128
uint32_t total_bits[4];
} SHA_CTX;
void ets_sha_enable(void);
void ets_sha_disable(void);
ets_status_t ets_sha_init(SHA_CTX *ctx, SHA_TYPE type);
ets_status_t ets_sha_starts(SHA_CTX *ctx, uint16_t sha512_t);
void ets_sha_get_state(SHA_CTX *ctx);
void ets_sha_process(SHA_CTX *ctx, const unsigned char *input);
void ets_sha_update(SHA_CTX *ctx, const unsigned char *input, uint32_t input_bytes, bool update_ctx);
ets_status_t ets_sha_finish(SHA_CTX *ctx, unsigned char *output);
#ifdef __cplusplus
}
#endif
#endif /* _ROM_SHA_H_ */

570
tools/sdk/esp32/include/esp_rom/include/esp32h2/rom/spi_flash.h Normal file
View File

@ -0,0 +1,570 @@
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#ifndef _ROM_SPI_FLASH_H_
#define _ROM_SPI_FLASH_H_
#include <stdint.h>
#include <stdbool.h>
#include "esp_attr.h"
#ifdef __cplusplus
extern "C" {
#endif
/** \defgroup spi_flash_apis, spi flash operation related apis
* @brief spi_flash apis
*/
/** @addtogroup spi_flash_apis
* @{
*/
#define PERIPHS_SPI_FLASH_CMD SPI_MEM_CMD_REG(1)
#define PERIPHS_SPI_FLASH_ADDR SPI_MEM_ADDR_REG(1)
#define PERIPHS_SPI_FLASH_CTRL SPI_MEM_CTRL_REG(1)
#define PERIPHS_SPI_FLASH_CTRL1 SPI_MEM_CTRL1_REG(1)
#define PERIPHS_SPI_FLASH_STATUS SPI_MEM_RD_STATUS_REG(1)
#define PERIPHS_SPI_FLASH_USRREG SPI_MEM_USER_REG(1)
#define PERIPHS_SPI_FLASH_USRREG1 SPI_MEM_USER1_REG(1)
#define PERIPHS_SPI_FLASH_USRREG2 SPI_MEM_USER2_REG(1)
#define PERIPHS_SPI_FLASH_C0 SPI_MEM_W0_REG(1)
#define PERIPHS_SPI_FLASH_C1 SPI_MEM_W1_REG(1)
#define PERIPHS_SPI_FLASH_C2 SPI_MEM_W2_REG(1)
#define PERIPHS_SPI_FLASH_C3 SPI_MEM_W3_REG(1)
#define PERIPHS_SPI_FLASH_C4 SPI_MEM_W4_REG(1)
#define PERIPHS_SPI_FLASH_C5 SPI_MEM_W5_REG(1)
#define PERIPHS_SPI_FLASH_C6 SPI_MEM_W6_REG(1)
#define PERIPHS_SPI_FLASH_C7 SPI_MEM_W7_REG(1)
#define PERIPHS_SPI_FLASH_TX_CRC SPI_MEM_TX_CRC_REG(1)
#define SPI0_R_QIO_DUMMY_CYCLELEN 5
#define SPI0_R_QIO_ADDR_BITSLEN 23
#define SPI0_R_FAST_DUMMY_CYCLELEN 7
#define SPI0_R_DIO_DUMMY_CYCLELEN 3
#define SPI0_R_FAST_ADDR_BITSLEN 23
#define SPI0_R_SIO_ADDR_BITSLEN 23
#define SPI1_R_QIO_DUMMY_CYCLELEN 5
#define SPI1_R_QIO_ADDR_BITSLEN 23
#define SPI1_R_FAST_DUMMY_CYCLELEN 7
#define SPI1_R_DIO_DUMMY_CYCLELEN 3
#define SPI1_R_DIO_ADDR_BITSLEN 23
#define SPI1_R_FAST_ADDR_BITSLEN 23
#define SPI1_R_SIO_ADDR_BITSLEN 23
#define ESP_ROM_SPIFLASH_W_SIO_ADDR_BITSLEN 23
#define ESP_ROM_SPIFLASH_TWO_BYTE_STATUS_EN SPI_MEM_WRSR_2B
//SPI address register
#define ESP_ROM_SPIFLASH_BYTES_LEN 24
#define ESP_ROM_SPIFLASH_BUFF_BYTE_WRITE_NUM 32
#define ESP_ROM_SPIFLASH_BUFF_BYTE_READ_NUM 16
#define ESP_ROM_SPIFLASH_BUFF_BYTE_READ_BITS 0xf
//SPI status register
#define ESP_ROM_SPIFLASH_BUSY_FLAG BIT0
#define ESP_ROM_SPIFLASH_WRENABLE_FLAG BIT1
#define ESP_ROM_SPIFLASH_BP0 BIT2
#define ESP_ROM_SPIFLASH_BP1 BIT3
#define ESP_ROM_SPIFLASH_BP2 BIT4
#define ESP_ROM_SPIFLASH_WR_PROTECT (ESP_ROM_SPIFLASH_BP0|ESP_ROM_SPIFLASH_BP1|ESP_ROM_SPIFLASH_BP2)
#define ESP_ROM_SPIFLASH_QE BIT9
#define FLASH_ID_GD25LQ32C 0xC86016
typedef enum {
ESP_ROM_SPIFLASH_QIO_MODE = 0,
ESP_ROM_SPIFLASH_QOUT_MODE,
ESP_ROM_SPIFLASH_DIO_MODE,
ESP_ROM_SPIFLASH_DOUT_MODE,
ESP_ROM_SPIFLASH_FASTRD_MODE,
ESP_ROM_SPIFLASH_SLOWRD_MODE
} esp_rom_spiflash_read_mode_t;
typedef enum {
ESP_ROM_SPIFLASH_RESULT_OK,
ESP_ROM_SPIFLASH_RESULT_ERR,
ESP_ROM_SPIFLASH_RESULT_TIMEOUT
} esp_rom_spiflash_result_t;
typedef struct {
uint32_t device_id;
uint32_t chip_size; // chip size in bytes
uint32_t block_size;
uint32_t sector_size;
uint32_t page_size;
uint32_t status_mask;
} esp_rom_spiflash_chip_t;
typedef struct {
uint8_t data_length;
uint8_t read_cmd0;
uint8_t read_cmd1;
uint8_t write_cmd;
uint16_t data_mask;
uint16_t data;
} esp_rom_spiflash_common_cmd_t;
/**
* @brief Fix the bug in SPI hardware communication with Flash/Ext-SRAM in High Speed.
* Please do not call this function in SDK.
*
* @param uint8_t spi: 0 for SPI0(Cache Access), 1 for SPI1(Flash read/write).
*
* @param uint8_t freqdiv: Pll is 80M, 4 for 20M, 3 for 26.7M, 2 for 40M, 1 for 80M.
*
* @return None
*/
void esp_rom_spiflash_fix_dummylen(uint8_t spi, uint8_t freqdiv);
/**
* @brief Select SPI Flash to QIO mode when WP pad is read from Flash.
* Please do not call this function in SDK.
*
* @param uint8_t wp_gpio_num: WP gpio number.
*
* @param uint32_t ishspi: 0 for spi, 1 for hspi, flash pad decided by strapping
* else, bit[5:0] spiclk, bit[11:6] spiq, bit[17:12] spid, bit[23:18] spics0, bit[29:24] spihd
*
* @return None
*/
void esp_rom_spiflash_select_qiomode(uint8_t wp_gpio_num, uint32_t ishspi);
/**
* @brief Set SPI Flash pad drivers.
* Please do not call this function in SDK.
*
* @param uint8_t wp_gpio_num: WP gpio number.
*
* @param uint32_t ishspi: 0 for spi, 1 for hspi, flash pad decided by strapping
* else, bit[5:0] spiclk, bit[11:6] spiq, bit[17:12] spid, bit[23:18] spics0, bit[29:24] spihd
*
* @param uint8_t *drvs: drvs[0]-bit[3:0] for cpiclk, bit[7:4] for spiq, drvs[1]-bit[3:0] for spid, drvs[1]-bit[7:4] for spid
* drvs[2]-bit[3:0] for spihd, drvs[2]-bit[7:4] for spiwp.
* Values usually read from falsh by rom code, function usually callde by rom code.
* if value with bit(3) set, the value is valid, bit[2:0] is the real value.
*
* @return None
*/
void esp_rom_spiflash_set_drvs(uint8_t wp_gpio_num, uint32_t ishspi, uint8_t *drvs);
/**
* @brief Select SPI Flash function for pads.
* Please do not call this function in SDK.
*
* @param uint32_t ishspi: 0 for spi, 1 for hspi, flash pad decided by strapping
* else, bit[5:0] spiclk, bit[11:6] spiq, bit[17:12] spid, bit[23:18] spics0, bit[29:24] spihd
*
* @return None
*/
void esp_rom_spiflash_select_padsfunc(uint32_t ishspi);
/**
* @brief SPI Flash init, clock divisor is 4, use 1 line Slow read mode.
* Please do not call this function in SDK.
*
* @param uint32_t ishspi: 0 for spi, 1 for hspi, flash pad decided by strapping
* else, bit[5:0] spiclk, bit[11:6] spiq, bit[17:12] spid, bit[23:18] spics0, bit[29:24] spihd
*
* @param uint8_t legacy: In legacy mode, more SPI command is used in line.
*
* @return None
*/
void esp_rom_spiflash_attach(uint32_t ishspi, bool legacy);
/**
* @brief SPI Read Flash status register. We use CMD 0x05 (RDSR).
* Please do not call this function in SDK.
*
* @param esp_rom_spiflash_chip_t *spi : The information for Flash, which is exported from ld file.
*
* @param uint32_t *status : The pointer to which to return the Flash status value.
*
* @return ESP_ROM_SPIFLASH_RESULT_OK : read OK.
* ESP_ROM_SPIFLASH_RESULT_ERR : read error.
* ESP_ROM_SPIFLASH_RESULT_TIMEOUT : read timeout.
*/
esp_rom_spiflash_result_t esp_rom_spiflash_read_status(esp_rom_spiflash_chip_t *spi, uint32_t *status);
/**
* @brief SPI Read Flash status register bits 8-15. We use CMD 0x35 (RDSR2).
* Please do not call this function in SDK.
*
* @param esp_rom_spiflash_chip_t *spi : The information for Flash, which is exported from ld file.
*
* @param uint32_t *status : The pointer to which to return the Flash status value.
*
* @return ESP_ROM_SPIFLASH_RESULT_OK : read OK.
* ESP_ROM_SPIFLASH_RESULT_ERR : read error.
* ESP_ROM_SPIFLASH_RESULT_TIMEOUT : read timeout.
*/
esp_rom_spiflash_result_t esp_rom_spiflash_read_statushigh(esp_rom_spiflash_chip_t *spi, uint32_t *status);
/**
* @brief Write status to Falsh status register.
* Please do not call this function in SDK.
*
* @param esp_rom_spiflash_chip_t *spi : The information for Flash, which is exported from ld file.
*
* @param uint32_t status_value : Value to .
*
* @return ESP_ROM_SPIFLASH_RESULT_OK : write OK.
* ESP_ROM_SPIFLASH_RESULT_ERR : write error.
* ESP_ROM_SPIFLASH_RESULT_TIMEOUT : write timeout.
*/
esp_rom_spiflash_result_t esp_rom_spiflash_write_status(esp_rom_spiflash_chip_t *spi, uint32_t status_value);
/**
* @brief Use a command to Read Flash status register.
* Please do not call this function in SDK.
*
* @param esp_rom_spiflash_chip_t *spi : The information for Flash, which is exported from ld file.
*
* @param uint32_t*status : The pointer to which to return the Flash status value.
*
* @return ESP_ROM_SPIFLASH_RESULT_OK : read OK.
* ESP_ROM_SPIFLASH_RESULT_ERR : read error.
* ESP_ROM_SPIFLASH_RESULT_TIMEOUT : read timeout.
*/
esp_rom_spiflash_result_t esp_rom_spiflash_read_user_cmd(uint32_t *status, uint8_t cmd);
/**
* @brief Config SPI Flash read mode when init.
* Please do not call this function in SDK.
*
* @param esp_rom_spiflash_read_mode_t mode : QIO/QOUT/DIO/DOUT/FastRD/SlowRD.
*
* This function does not try to set the QIO Enable bit in the status register, caller is responsible for this.
*
* @return ESP_ROM_SPIFLASH_RESULT_OK : config OK.
* ESP_ROM_SPIFLASH_RESULT_ERR : config error.
* ESP_ROM_SPIFLASH_RESULT_TIMEOUT : config timeout.
*/
esp_rom_spiflash_result_t esp_rom_spiflash_config_readmode(esp_rom_spiflash_read_mode_t mode);
/**
* @brief Config SPI Flash clock divisor.
* Please do not call this function in SDK.
*
* @param uint8_t freqdiv: clock divisor.
*
* @param uint8_t spi: 0 for SPI0, 1 for SPI1.
*
* @return ESP_ROM_SPIFLASH_RESULT_OK : config OK.
* ESP_ROM_SPIFLASH_RESULT_ERR : config error.
* ESP_ROM_SPIFLASH_RESULT_TIMEOUT : config timeout.
*/
esp_rom_spiflash_result_t esp_rom_spiflash_config_clk(uint8_t freqdiv, uint8_t spi);
/**
* @brief Send CommonCmd to Flash so that is can go into QIO mode, some Flash use different CMD.
* Please do not call this function in SDK.
*
* @param esp_rom_spiflash_common_cmd_t *cmd : A struct to show the action of a command.
*
* @return uint16_t 0 : do not send command any more.
* 1 : go to the next command.
* n > 1 : skip (n - 1) commands.
*/
uint16_t esp_rom_spiflash_common_cmd(esp_rom_spiflash_common_cmd_t *cmd);
/**
* @brief Unlock SPI write protect.
* Please do not call this function in SDK.
*
* @param None.
*
* @return ESP_ROM_SPIFLASH_RESULT_OK : Unlock OK.
* ESP_ROM_SPIFLASH_RESULT_ERR : Unlock error.
* ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Unlock timeout.
*/
esp_rom_spiflash_result_t esp_rom_spiflash_unlock(void);
/**
* @brief SPI write protect.
* Please do not call this function in SDK.
*
* @param None.
*
* @return ESP_ROM_SPIFLASH_RESULT_OK : Lock OK.
* ESP_ROM_SPIFLASH_RESULT_ERR : Lock error.
* ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Lock timeout.
*/
esp_rom_spiflash_result_t esp_rom_spiflash_lock(void);
/**
* @brief Update SPI Flash parameter.
* Please do not call this function in SDK.
*
* @param uint32_t deviceId : Device ID read from SPI, the low 32 bit.
*
* @param uint32_t chip_size : The Flash size.
*
* @param uint32_t block_size : The Flash block size.
*
* @param uint32_t sector_size : The Flash sector size.
*
* @param uint32_t page_size : The Flash page size.
*
* @param uint32_t status_mask : The Mask used when read status from Flash(use single CMD).
*
* @return ESP_ROM_SPIFLASH_RESULT_OK : Update OK.
* ESP_ROM_SPIFLASH_RESULT_ERR : Update error.
* ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Update timeout.
*/
esp_rom_spiflash_result_t esp_rom_spiflash_config_param(uint32_t deviceId, uint32_t chip_size, uint32_t block_size,
uint32_t sector_size, uint32_t page_size, uint32_t status_mask);
/**
* @brief Erase whole flash chip.
* Please do not call this function in SDK.
*
* @param None
*
* @return ESP_ROM_SPIFLASH_RESULT_OK : Erase OK.
* ESP_ROM_SPIFLASH_RESULT_ERR : Erase error.
* ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Erase timeout.
*/
esp_rom_spiflash_result_t esp_rom_spiflash_erase_chip(void);
/**
* @brief Erase a 64KB block of flash
* Uses SPI flash command D8H.
* Please do not call this function in SDK.
*
* @param uint32_t block_num : Which block to erase.
*
* @return ESP_ROM_SPIFLASH_RESULT_OK : Erase OK.
* ESP_ROM_SPIFLASH_RESULT_ERR : Erase error.
* ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Erase timeout.
*/
esp_rom_spiflash_result_t esp_rom_spiflash_erase_block(uint32_t block_num);
/**
* @brief Erase a sector of flash.
* Uses SPI flash command 20H.
* Please do not call this function in SDK.
*
* @param uint32_t sector_num : Which sector to erase.
*
* @return ESP_ROM_SPIFLASH_RESULT_OK : Erase OK.
* ESP_ROM_SPIFLASH_RESULT_ERR : Erase error.
* ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Erase timeout.
*/
esp_rom_spiflash_result_t esp_rom_spiflash_erase_sector(uint32_t sector_num);
/**
* @brief Erase some sectors.
* Please do not call this function in SDK.
*
* @param uint32_t start_addr : Start addr to erase, should be sector aligned.
*
* @param uint32_t area_len : Length to erase, should be sector aligned.
*
* @return ESP_ROM_SPIFLASH_RESULT_OK : Erase OK.
* ESP_ROM_SPIFLASH_RESULT_ERR : Erase error.
* ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Erase timeout.
*/
esp_rom_spiflash_result_t esp_rom_spiflash_erase_area(uint32_t start_addr, uint32_t area_len);
/**
* @brief Write Data to Flash, you should Erase it yourself if need.
* Please do not call this function in SDK.
*
* @param uint32_t dest_addr : Address to write, should be 4 bytes aligned.
*
* @param const uint32_t *src : The pointer to data which is to write.
*
* @param uint32_t len : Length to write, should be 4 bytes aligned.
*
* @return ESP_ROM_SPIFLASH_RESULT_OK : Write OK.
* ESP_ROM_SPIFLASH_RESULT_ERR : Write error.
* ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Write timeout.
*/
esp_rom_spiflash_result_t esp_rom_spiflash_write(uint32_t dest_addr, const uint32_t *src, int32_t len);
/**
* @brief Read Data from Flash, you should Erase it yourself if need.
* Please do not call this function in SDK.
*
* @param uint32_t src_addr : Address to read, should be 4 bytes aligned.
*
* @param uint32_t *dest : The buf to read the data.
*
* @param uint32_t len : Length to read, should be 4 bytes aligned.
*
* @return ESP_ROM_SPIFLASH_RESULT_OK : Read OK.
* ESP_ROM_SPIFLASH_RESULT_ERR : Read error.
* ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Read timeout.
*/
esp_rom_spiflash_result_t esp_rom_spiflash_read(uint32_t src_addr, uint32_t *dest, int32_t len);
/**
* @brief SPI1 go into encrypto mode.
* Please do not call this function in SDK.
*
* @param None
*
* @return None
*/
void esp_rom_spiflash_write_encrypted_enable(void);
/**
* @brief Prepare 32 Bytes data to encrpto writing, you should Erase it yourself if need.
* Please do not call this function in SDK.
*
* @param uint32_t flash_addr : Address to write, should be 32 bytes aligned.
*
* @param uint32_t *data : The pointer to data which is to write.
*
* @return ESP_ROM_SPIFLASH_RESULT_OK : Prepare OK.
* ESP_ROM_SPIFLASH_RESULT_ERR : Prepare error.
* ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Prepare timeout.
*/
esp_rom_spiflash_result_t esp_rom_spiflash_prepare_encrypted_data(uint32_t flash_addr, uint32_t *data);
/**
* @brief SPI1 go out of encrypto mode.
* Please do not call this function in SDK.
*
* @param None
*
* @return None
*/
void esp_rom_spiflash_write_encrypted_disable(void);
/**
* @brief Write data to flash with transparent encryption.
* @note Sectors to be written should already be erased.
*
* @note Please do not call this function in SDK.
*
* @param uint32_t flash_addr : Address to write, should be 32 byte aligned.
*
* @param uint32_t *data : The pointer to data to write. Note, this pointer must
* be 32 bit aligned and the content of the data will be
* modified by the encryption function.
*
* @param uint32_t len : Length to write, should be 32 bytes aligned.
*
* @return ESP_ROM_SPIFLASH_RESULT_OK : Data written successfully.
* ESP_ROM_SPIFLASH_RESULT_ERR : Encryption write error.
* ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Encrypto write timeout.
*/
esp_rom_spiflash_result_t esp_rom_spiflash_write_encrypted(uint32_t flash_addr, uint32_t *data, uint32_t len);
/* TODO: figure out how to map these to their new names */
typedef enum {
SPI_ENCRYPT_DESTINATION_FLASH,
} SpiEncryptDest;
typedef esp_rom_spiflash_result_t SpiFlashOpResult;
SpiFlashOpResult SPI_Encrypt_Write(uint32_t flash_addr, const void *data, uint32_t len);
SpiFlashOpResult SPI_Encrypt_Write_Dest(SpiEncryptDest dest, uint32_t flash_addr, const void *data, uint32_t len);
void SPI_Write_Encrypt_Enable(void);
void SPI_Write_Encrypt_Disable(void);
/** @brief Wait until SPI flash write operation is complete
*
* @note Please do not call this function in SDK.
*
* Reads the Write In Progress bit of the SPI flash status register,
* repeats until this bit is zero (indicating write complete).
*
* @return ESP_ROM_SPIFLASH_RESULT_OK : Write is complete
* ESP_ROM_SPIFLASH_RESULT_ERR : Error while reading status.
*/
esp_rom_spiflash_result_t esp_rom_spiflash_wait_idle(esp_rom_spiflash_chip_t *spi);
/** @brief Enable Quad I/O pin functions
*
* @note Please do not call this function in SDK.
*
* Sets the HD & WP pin functions for Quad I/O modes, based on the
* efuse SPI pin configuration.
*
* @param wp_gpio_num - Number of the WP pin to reconfigure for quad I/O.
*
* @param spiconfig - Pin configuration, as returned from ets_efuse_get_spiconfig().
* - If this parameter is 0, default SPI pins are used and wp_gpio_num parameter is ignored.
* - If this parameter is 1, default HSPI pins are used and wp_gpio_num parameter is ignored.
* - For other values, this parameter encodes the HD pin number and also the CLK pin number. CLK pin selection is used
* to determine if HSPI or SPI peripheral will be used (use HSPI if CLK pin is the HSPI clock pin, otherwise use SPI).
* Both HD & WP pins are configured via GPIO matrix to map to the selected peripheral.
*/
void esp_rom_spiflash_select_qio_pins(uint8_t wp_gpio_num, uint32_t spiconfig);
typedef void (* spi_flash_func_t)(void);
typedef SpiFlashOpResult (* spi_flash_op_t)(void);
typedef SpiFlashOpResult (* spi_flash_erase_t)(uint32_t);
typedef SpiFlashOpResult (* spi_flash_rd_t)(uint32_t, uint32_t*, int);
typedef SpiFlashOpResult (* spi_flash_wr_t)(uint32_t, const uint32_t*, int);
typedef SpiFlashOpResult (* spi_flash_ewr_t)(uint32_t, const void*, uint32_t);
typedef SpiFlashOpResult (* spi_flash_wren_t)(void*);
typedef struct {
uint32_t read_sub_len;
uint32_t write_sub_len;
spi_flash_op_t unlock;
spi_flash_erase_t erase_sector;
spi_flash_erase_t erase_block;
spi_flash_rd_t read;
spi_flash_wr_t write;
spi_flash_ewr_t encrypt_write;
spi_flash_func_t check_sus;
spi_flash_wren_t wren;
spi_flash_op_t wait_idle;
} spiflash_legacy_funcs_t;
extern const spiflash_legacy_funcs_t *rom_spiflash_legacy_funcs;
/** @brief Global ROM spiflash data, as used by legacy
SPI flash functions
*/
typedef struct {
esp_rom_spiflash_chip_t chip;
uint8_t dummy_len_plus[3];
uint8_t sig_matrix;
} spiflash_legacy_data_t;
extern spiflash_legacy_data_t *rom_spiflash_legacy_data;
/* Defines to make the H2 ROM legacvy data access compatible with previous chips */
#define g_rom_flashchip (rom_spiflash_legacy_data->chip)
#define g_rom_spiflash_dummy_len_plus (rom_spiflash_legacy_data->dummy_len_plus)
/**
* @brief Clear WEL bit unconditionally.
*
* @return always ESP_ROM_SPIFLASH_RESULT_OK
*/
esp_rom_spiflash_result_t esp_rom_spiflash_write_disable(void);
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* _ROM_SPI_FLASH_H_ */

99
tools/sdk/esp32/include/esp_rom/include/esp32h2/rom/tjpgd.h Normal file
View File

@ -0,0 +1,99 @@
/*----------------------------------------------------------------------------/
/ TJpgDec - Tiny JPEG Decompressor include file (C)ChaN, 2012
/----------------------------------------------------------------------------*/
#ifndef _TJPGDEC
#define _TJPGDEC
/*---------------------------------------------------------------------------*/
/* System Configurations */
#define JD_SZBUF 512 /* Size of stream input buffer */
#define JD_FORMAT 0 /* Output pixel format 0:RGB888 (3 BYTE/pix), 1:RGB565 (1 WORD/pix) */
#define JD_USE_SCALE 1 /* Use descaling feature for output */
#define JD_TBLCLIP 1 /* Use table for saturation (might be a bit faster but increases 1K bytes of code size) */
/*---------------------------------------------------------------------------*/
#ifdef __cplusplus
extern "C" {
#endif
/* These types must be 16-bit, 32-bit or larger integer */
typedef int INT;
typedef unsigned int UINT;
/* These types must be 8-bit integer */
typedef char CHAR;
typedef unsigned char UCHAR;
typedef unsigned char BYTE;
/* These types must be 16-bit integer */
typedef short SHORT;
typedef unsigned short USHORT;
typedef unsigned short WORD;
typedef unsigned short WCHAR;
/* These types must be 32-bit integer */
typedef long LONG;
typedef unsigned long ULONG;
typedef unsigned long DWORD;
/* Error code */
typedef enum {
JDR_OK = 0, /* 0: Succeeded */
JDR_INTR, /* 1: Interrupted by output function */
JDR_INP, /* 2: Device error or wrong termination of input stream */
JDR_MEM1, /* 3: Insufficient memory pool for the image */
JDR_MEM2, /* 4: Insufficient stream input buffer */
JDR_PAR, /* 5: Parameter error */
JDR_FMT1, /* 6: Data format error (may be damaged data) */
JDR_FMT2, /* 7: Right format but not supported */
JDR_FMT3 /* 8: Not supported JPEG standard */
} JRESULT;
/* Rectangular structure */
typedef struct {
WORD left, right, top, bottom;
} JRECT;
/* Decompressor object structure */
typedef struct JDEC JDEC;
struct JDEC {
UINT dctr; /* Number of bytes available in the input buffer */
BYTE *dptr; /* Current data read ptr */
BYTE *inbuf; /* Bit stream input buffer */
BYTE dmsk; /* Current bit in the current read byte */
BYTE scale; /* Output scaling ratio */
BYTE msx, msy; /* MCU size in unit of block (width, height) */
BYTE qtid[3]; /* Quantization table ID of each component */
SHORT dcv[3]; /* Previous DC element of each component */
WORD nrst; /* Restart inverval */
UINT width, height; /* Size of the input image (pixel) */
BYTE *huffbits[2][2]; /* Huffman bit distribution tables [id][dcac] */
WORD *huffcode[2][2]; /* Huffman code word tables [id][dcac] */
BYTE *huffdata[2][2]; /* Huffman decoded data tables [id][dcac] */
LONG *qttbl[4]; /* Dequaitizer tables [id] */
void *workbuf; /* Working buffer for IDCT and RGB output */
BYTE *mcubuf; /* Working buffer for the MCU */
void *pool; /* Pointer to available memory pool */
UINT sz_pool; /* Size of momory pool (bytes available) */
UINT (*infunc)(JDEC *, BYTE *, UINT); /* Pointer to jpeg stream input function */
void *device; /* Pointer to I/O device identifiler for the session */
};
/* TJpgDec API functions */
JRESULT jd_prepare (JDEC *, UINT(*)(JDEC *, BYTE *, UINT), void *, UINT, void *);
JRESULT jd_decomp (JDEC *, UINT(*)(JDEC *, void *, JRECT *), BYTE);
#ifdef __cplusplus
}
#endif
#endif /* _TJPGDEC */

440
tools/sdk/esp32/include/esp_rom/include/esp32h2/rom/uart.h Normal file
View File

@ -0,0 +1,440 @@
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#ifndef _ROM_UART_H_
#define _ROM_UART_H_
#include "esp_types.h"
#include "esp_attr.h"
#include "ets_sys.h"
#include "soc/soc.h"
#include "soc/uart_reg.h"
#ifdef __cplusplus
extern "C" {
#endif
/** \defgroup uart_apis, uart configuration and communication related apis
* @brief uart apis
*/
/** @addtogroup uart_apis
* @{
*/
#define RX_BUFF_SIZE 0x400
#define TX_BUFF_SIZE 100
//uart int enalbe register ctrl bits
#define UART_RCV_INTEN BIT0
#define UART_TRX_INTEN BIT1
#define UART_LINE_STATUS_INTEN BIT2
//uart int identification ctrl bits
#define UART_INT_FLAG_MASK 0x0E
//uart fifo ctrl bits
#define UART_CLR_RCV_FIFO BIT1
#define UART_CLR_TRX_FIFO BIT2
#define UART_RCVFIFO_TRG_LVL_BITS BIT6
//uart line control bits
#define UART_DIV_LATCH_ACCESS_BIT BIT7
//uart line status bits
#define UART_RCV_DATA_RDY_FLAG BIT0
#define UART_RCV_OVER_FLOW_FLAG BIT1
#define UART_RCV_PARITY_ERR_FLAG BIT2
#define UART_RCV_FRAME_ERR_FLAG BIT3
#define UART_BRK_INT_FLAG BIT4
#define UART_TRX_FIFO_EMPTY_FLAG BIT5
#define UART_TRX_ALL_EMPTY_FLAG BIT6 // include fifo and shift reg
#define UART_RCV_ERR_FLAG BIT7
//send and receive message frame head
#define FRAME_FLAG 0x7E
typedef enum {
UART_LINE_STATUS_INT_FLAG = 0x06,
UART_RCV_FIFO_INT_FLAG = 0x04,
UART_RCV_TMOUT_INT_FLAG = 0x0C,
UART_TXBUFF_EMPTY_INT_FLAG = 0x02
} UartIntType; //consider bit0 for int_flag
typedef enum {
RCV_ONE_BYTE = 0x0,
RCV_FOUR_BYTE = 0x1,
RCV_EIGHT_BYTE = 0x2,
RCV_FOURTEEN_BYTE = 0x3
} UartRcvFifoTrgLvl;
typedef enum {
FIVE_BITS = 0x0,
SIX_BITS = 0x1,
SEVEN_BITS = 0x2,
EIGHT_BITS = 0x3
} UartBitsNum4Char;
typedef enum {
ONE_STOP_BIT = 1,
ONE_HALF_STOP_BIT = 2,
TWO_STOP_BIT = 3
} UartStopBitsNum;
typedef enum {
NONE_BITS = 0,
ODD_BITS = 2,
EVEN_BITS = 3
} UartParityMode;
typedef enum {
STICK_PARITY_DIS = 0,
STICK_PARITY_EN = 2
} UartExistParity;
typedef enum {
BIT_RATE_9600 = 9600,
BIT_RATE_19200 = 19200,
BIT_RATE_38400 = 38400,
BIT_RATE_57600 = 57600,
BIT_RATE_115200 = 115200,
BIT_RATE_230400 = 230400,
BIT_RATE_460800 = 460800,
BIT_RATE_921600 = 921600
} UartBautRate;
typedef enum {
NONE_CTRL,
HARDWARE_CTRL,
XON_XOFF_CTRL
} UartFlowCtrl;
typedef enum {
EMPTY,
UNDER_WRITE,
WRITE_OVER
} RcvMsgBuffState;
typedef struct {
uint8_t *pRcvMsgBuff;
uint8_t *pWritePos;
uint8_t *pReadPos;
uint8_t TrigLvl;
RcvMsgBuffState BuffState;
} RcvMsgBuff;
typedef struct {
uint32_t TrxBuffSize;
uint8_t *pTrxBuff;
} TrxMsgBuff;
typedef enum {
BAUD_RATE_DET,
WAIT_SYNC_FRM,
SRCH_MSG_HEAD,
RCV_MSG_BODY,
RCV_ESC_CHAR,
} RcvMsgState;
typedef struct {
UartBautRate baut_rate;
UartBitsNum4Char data_bits;
UartExistParity exist_parity;
UartParityMode parity; // chip size in byte
UartStopBitsNum stop_bits;
UartFlowCtrl flow_ctrl;
uint8_t buff_uart_no; //indicate which uart use tx/rx buffer
RcvMsgBuff rcv_buff;
// TrxMsgBuff trx_buff;
RcvMsgState rcv_state;
int received;
} UartDevice;
/**
* @brief Init uart device struct value and reset uart0/uart1 rx.
* Please do not call this function in SDK.
*
* @param rxBuffer, must be a pointer to RX_BUFF_SIZE bytes or NULL
*
* @return None
*/
void uartAttach(void *rxBuffer);
/**
* @brief Init uart0 or uart1 for UART download booting mode.
* Please do not call this function in SDK.
*
* @param uint8_t uart_no : 0 for UART0, else for UART1.
*
* @param uint32_t clock : clock used by uart module, to adjust baudrate.
*
* @return None
*/
void Uart_Init(uint8_t uart_no, uint32_t clock);
/**
* @brief Modify uart baudrate.
* This function will reset RX/TX fifo for uart.
*
* @param uint8_t uart_no : 0 for UART0, 1 for UART1.
*
* @param uint32_t DivLatchValue : (clock << 4)/baudrate.
*
* @return None
*/
void uart_div_modify(uint8_t uart_no, uint32_t DivLatchValue);
/**
* @brief Init uart0 or uart1 for UART download booting mode.
* Please do not call this function in SDK.
*
* @param uint8_t uart_no : 0 for UART0, 1 for UART1.
*
* @param uint8_t is_sync : 0, only one UART module, easy to detect, wait until detected;
* 1, two UART modules, hard to detect, detect and return.
*
* @return None
*/
int uart_baudrate_detect(uint8_t uart_no, uint8_t is_sync);
/**
* @brief Switch printf channel of uart_tx_one_char.
* Please do not call this function when printf.
*
* @param uint8_t uart_no : 0 for UART0, 1 for UART1.
*
* @return None
*/
void uart_tx_switch(uint8_t uart_no);
/**
* @brief Switch message exchange channel for UART download booting.
* Please do not call this function in SDK.
*
* @param uint8_t uart_no : 0 for UART0, 1 for UART1.
*
* @return None
*/
void uart_buff_switch(uint8_t uart_no);
/**
* @brief Output a char to printf channel, wait until fifo not full.
*
* @param None
*
* @return OK.
*/
STATUS uart_tx_one_char(uint8_t TxChar);
/**
* @brief Output a char to message exchange channel, wait until fifo not full.
* Please do not call this function in SDK.
*
* @param None
*
* @return OK.
*/
STATUS uart_tx_one_char2(uint8_t TxChar);
/**
* @brief Wait until uart tx full empty.
*
* @param uint8_t uart_no : 0 for UART0, 1 for UART1.
*
* @return None.
*/
void uart_tx_flush(uint8_t uart_no);
/**
* @brief Wait until uart tx full empty and the last char send ok.
*
* @param uart_no : 0 for UART0, 1 for UART1, 2 for UART2
*
* The function defined in ROM code has a bug, so we define the correct version
* here for compatibility.
*/
void uart_tx_wait_idle(uint8_t uart_no);
/**
* @brief Get an input char from message channel.
* Please do not call this function in SDK.
*
* @param uint8_t *pRxChar : the pointer to store the char.
*
* @return OK for successful.
* FAIL for failed.
*/
STATUS uart_rx_one_char(uint8_t *pRxChar);
/**
* @brief Get an input char from message channel, wait until successful.
* Please do not call this function in SDK.
*
* @param None
*
* @return char : input char value.
*/
char uart_rx_one_char_block(void);
/**
* @brief Get an input string line from message channel.
* Please do not call this function in SDK.
*
* @param uint8_t *pString : the pointer to store the string.
*
* @param uint8_t MaxStrlen : the max string length, incude '\0'.
*
* @return OK.
*/
STATUS UartRxString(uint8_t *pString, uint8_t MaxStrlen);
/**
* @brief Process uart recevied information in the interrupt handler.
* Please do not call this function in SDK.
*
* @param void *para : the message receive buffer.
*
* @return None
*/
void uart_rx_intr_handler(void *para);
/**
* @brief Get an char from receive buffer.
* Please do not call this function in SDK.
*
* @param RcvMsgBuff *pRxBuff : the pointer to the struct that include receive buffer.
*
* @param uint8_t *pRxByte : the pointer to store the char.
*
* @return OK for successful.
* FAIL for failed.
*/
STATUS uart_rx_readbuff( RcvMsgBuff *pRxBuff, uint8_t *pRxByte);
/**
* @brief Get all chars from receive buffer.
* Please do not call this function in SDK.
*
* @param uint8_t *pCmdLn : the pointer to store the string.
*
* @return OK for successful.
* FAIL for failed.
*/
STATUS UartGetCmdLn(uint8_t *pCmdLn);
/**
* @brief Get uart configuration struct.
* Please do not call this function in SDK.
*
* @param None
*
* @return UartDevice * : uart configuration struct pointer.
*/
UartDevice *GetUartDevice(void);
/**
* @brief Send an packet to download tool, with SLIP escaping.
* Please do not call this function in SDK.
*
* @param uint8_t *p : the pointer to output string.
*
* @param int len : the string length.
*
* @return None.
*/
void send_packet(uint8_t *p, int len);
/**
* @brief Receive an packet from download tool, with SLIP escaping.
* Please do not call this function in SDK.
*
* @param uint8_t *p : the pointer to input string.
*
* @param int len : If string length > len, the string will be truncated.
*
* @param uint8_t is_sync : 0, only one UART module;
* 1, two UART modules.
*
* @return int : the length of the string.
*/
int recv_packet(uint8_t *p, int len, uint8_t is_sync);
/**
* @brief Send an packet to download tool, with SLIP escaping.
* Please do not call this function in SDK.
*
* @param uint8_t *pData : the pointer to input string.
*
* @param uint16_t DataLen : the string length.
*
* @return OK for successful.
* FAIL for failed.
*/
STATUS SendMsg(uint8_t *pData, uint16_t DataLen);
/**
* @brief Receive an packet from download tool, with SLIP escaping.
* Please do not call this function in SDK.
*
* @param uint8_t *pData : the pointer to input string.
*
* @param uint16_t MaxDataLen : If string length > MaxDataLen, the string will be truncated.
*
* @param uint8_t is_sync : 0, only one UART module;
* 1, two UART modules.
*
* @return OK for successful.
* FAIL for failed.
*/
STATUS RcvMsg(uint8_t *pData, uint16_t MaxDataLen, uint8_t is_sync);
/**
* @brief Check if this UART is in download connection.
* Please do not call this function in SDK.
*
* @param uint8_t uart_no : 0 for UART0, 1 for UART1.
*
* @return ETS_NO_BOOT = 0 for no.
* SEL_UART_BOOT = BIT(1) for yes.
*/
uint8_t UartConnCheck(uint8_t uart_no);
/**
* @brief Initialize the USB ACM UART
* Needs to be fed a buffer of at least 128 bytes, plus any rx buffer you may want to have.
*
* @param cdc_acm_work_mem Pointer to work mem for CDC-ACM code
* @param cdc_acm_work_mem_len Length of work mem
*/
void Uart_Init_USB(void *cdc_acm_work_mem, int cdc_acm_work_mem_len);
/**
* @brief Install handler to reset the chip when a RTS change has been detected on the CDC-ACM 'UART'.
*/
void uart_usb_enable_reset_on_rts(void);
extern UartDevice UartDev;
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* _ROM_UART_H_ */

62
tools/sdk/esp32/include/esp_rom/include/esp32s2/rom/aes.h Normal file
View File

@ -0,0 +1,62 @@
/*
ROM functions for hardware AES support.
It is not recommended to use these functions directly,
use the wrapper functions in hwcrypto/aes.h instead.
*/
// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#pragma once
#include <stdint.h>
#include <stdbool.h>
#ifdef __cplusplus
extern "C" {
#endif
#define AES_BLOCK_SIZE 16
enum AES_TYPE {
AES_ENC,
AES_DEC,
};
enum AES_BITS {
AES128,
AES192,
AES256
};
void ets_aes_enable(void);
void ets_aes_disable(void);
void ets_aes_set_endian(bool key_word_swap, bool key_byte_swap,
bool in_word_swap, bool in_byte_swap,
bool out_word_swap, bool out_byte_swap);
int ets_aes_setkey(enum AES_TYPE type, const void *key, enum AES_BITS bits);
int ets_aes_setkey_enc(const void *key, enum AES_BITS bits);
int ets_aes_setkey_dec(const void *key, enum AES_BITS bits);
void ets_aes_block(const void *input, void *output);
#ifdef __cplusplus
}
#endif

50
tools/sdk/esp32/include/esp_rom/include/esp32s2/rom/bigint.h Normal file
View File

@ -0,0 +1,50 @@
/*
ROM functions for hardware bigint support.
It is not recommended to use these functions directly,
use the wrapper functions in hwcrypto/mpi.h instead.
*/
// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#ifndef _ROM_BIGINT_H_
#define _ROM_BIGINT_H_
#include <stdint.h>
#include <stdbool.h>
#ifdef __cplusplus
extern "C" {
#endif
void ets_bigint_enable(void);
void ets_bigint_disable(void);
int ets_bigint_multiply(const uint32_t *x, const uint32_t *y, uint32_t len_words);
int ets_bigint_modmult(const uint32_t *x, const uint32_t *y, const uint32_t *m, uint32_t m_dash, const uint32_t *rb, uint32_t len_words);
int ets_bigint_modexp(const uint32_t *x, const uint32_t *y, const uint32_t *m, uint32_t m_dash, const uint32_t *rb, bool constant_time, uint32_t len_words);
void ets_bigint_wait_finish(void);
int ets_bigint_getz(uint32_t *z, uint32_t len_words);
#ifdef __cplusplus
}
#endif
#endif /* _ROM_BIGINT_H_ */

947
tools/sdk/esp32/include/esp_rom/include/esp32s2/rom/cache.h Normal file
View File

@ -0,0 +1,947 @@
// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#ifndef _ROM_CACHE_H_
#define _ROM_CACHE_H_
#ifdef __cplusplus
extern "C" {
#endif
/** \defgroup cache_apis, cache operation related apis
* @brief cache apis
*/
/** @addtogroup cache_apis
* @{
*/
#define MIN_CACHE_SIZE 8192
#define MAX_CACHE_SIZE 16384
#define MIN_CACHE_WAYS 4
#define MAX_CACHE_WAYS 4
#define MIN_CACHE_LINE_SIZE 16
//normally should be (MAX_CACHE_SIZE / MIN_CACHE_WAYS / MIN_CACHE_LINE_SIZE), however, the items not all in one tag memory block.
#define MAX_TAG_BLOCK_ITEMS (MAX_CACHE_SIZE / 8 / MIN_CACHE_LINE_SIZE)
#define TAG_SIZE 4
#define MAX_TAG_BLOCK_SIZE (MAX_TAG_BLOCK_ITEMS * TAG_SIZE)
#define INVALID_PHY_PAGE 0xffff
#define ESP_CACHE_TEMP_ADDR DROM0_ADDRESS_LOW
#define CACHE_MAX_OPERATION_SIZE BUS_ADDR_SIZE
typedef enum {
CACHE_DCACHE = 0,
CACHE_ICACHE = 1,
} cache_t;
typedef enum {
CACHE_MEMORY_INVALID = 0,
CACHE_MEMORY_ICACHE_LOW = 1<<0,
CACHE_MEMORY_ICACHE_HIGH = 1<<1,
CACHE_MEMORY_DCACHE_LOW = 1<<2,
CACHE_MEMORY_DCACHE_HIGH = 1<<3,
} cache_layout_t;
#define CACHE_SIZE_8KB CACHE_SIZE_HALF
#define CACHE_SIZE_16KB CACHE_SIZE_FULL
typedef enum {
CACHE_SIZE_HALF = 0, /*!< 8KB for icache and dcache */
CACHE_SIZE_FULL = 1, /*!< 16KB for icache and dcache */
} cache_size_t;
typedef enum {
CACHE_4WAYS_ASSOC = 0, /*!< 4 way associated cache */
} cache_ways_t;
typedef enum {
CACHE_LINE_SIZE_16B = 0, /*!< 16 Byte cache line size */
CACHE_LINE_SIZE_32B = 1, /*!< 32 Byte cache line size */
} cache_line_size_t;
typedef enum {
CACHE_AUTOLOAD_POSITIVE = 0, /*!< cache autoload step is positive */
CACHE_AUTOLOAD_NEGATIVE = 1, /*!< cache autoload step is negative */
} cache_autoload_order_t;
#define CACHE_AUTOLOAD_STEP(i) ((i) - 1)
typedef enum {
CACHE_AUTOLOAD_MISS_TRIGGER = 0, /*!< autoload only triggered by cache miss */
CACHE_AUTOLOAD_HIT_TRIGGER = 1, /*!< autoload only triggered by cache hit */
CACHE_AUTOLOAD_BOTH_TRIGGER = 2, /*!< autoload triggered both by cache miss and hit */
} cache_autoload_trigger_t;
struct cache_mode {
uint32_t cache_size; /*!< cache size in byte */
uint16_t cache_line_size; /*!< cache line size in byte */
uint8_t cache_ways; /*!< cache ways, always 4 */
uint8_t icache; /*!< the cache index, 0 for dcache, 1 for icache */
};
struct tag_item {
uint32_t dirty:1; /*!< the cache line value is dirty or not */
uint32_t tag:14; /*!< the tag is the high part of the cache address, however is only 16MB range, and with out low part */
uint32_t valid:1; /*!< the tag item is valid or not */
uint32_t fifo_cnt:3; /*!< fifo cnt, 0 ~ 3 for 4 ways cache, 0 ~ 7 for 8 ways cache */
uint32_t lock:1; /*!< the cache line is locked or not */
uint32_t attr:3; /*!< the attribute of the external memory physical address */
uint32_t access:1; /*!< software accessable, used by hardware */
uint32_t reserved:8;
};
struct autoload_config {
uint8_t order; /*!< autoload step is positive or negative */
uint8_t trigger; /*!< autoload trigger */
uint8_t ena0; /*!< autoload region0 enable */
uint8_t ena1; /*!< autoload region1 enable */
uint32_t addr0; /*!< autoload region0 start address */
uint32_t size0; /*!< autoload region0 size */
uint32_t addr1; /*!< autoload region1 start address */
uint32_t size1; /*!< autoload region1 size */
};
struct tag_group_info {
struct cache_mode mode; /*!< cache and cache mode */
uint32_t filter_addr; /*!< the address that used to generate the struct */
uint32_t vaddr_offset; /*!< virtual address offset of the cache ways */
uint32_t tag_addr[MAX_CACHE_WAYS]; /*!< tag memory address, only [0~mode.ways-1] is valid to use */
uint32_t cache_memory_offset[MAX_CACHE_WAYS]; /*!< cache memory address, only [0~mode.ways-1] is valid to use */
};
struct lock_config {
uint32_t addr; /*!< manual lock address*/
uint16_t size; /*!< manual lock size*/
uint16_t group; /*!< manual lock group, 0 or 1*/
};
#define ESP_ROM_ERR_INVALID_ARG 1
#define MMU_SET_ADDR_ALIGNED_ERROR 2
#define MMU_SET_PASE_SIZE_ERROR 3
#define MMU_SET_VADDR_OUT_RANGE 4
/**
* @brief Initialise cache mmu, mark all entries as invalid.
* Please do not call this function in your SDK application.
*
* @param None
*
* @return None
*/
void Cache_MMU_Init(void);
/**
* @brief Set ICache mmu mapping.
* Please do not call this function in your SDK application.
*
* @param uint32_t ext_ram : DPORT_MMU_ACCESS_FLASH for flash, DPORT_MMU_ACCESS_SPIRAM for spiram, DPORT_MMU_INVALID for invalid.
*
* @param uint32_t vaddr : virtual address in CPU address space.
* Can be Iram0,Iram1,Irom0,Drom0 and AHB buses address.
* Should be aligned by psize.
*
* @param uint32_t paddr : physical address in external memory.
* Should be aligned by psize.
*
* @param uint32_t psize : page size of ICache, in kilobytes. Should be 64 here.
*
* @param uint32_t num : pages to be set.
*
* @param uint32_t fixed : 0 for physical pages grow with virtual pages, other for virtual pages map to same physical page.
*
* @return uint32_t: error status
* 0 : mmu set success
* 2 : vaddr or paddr is not aligned
* 3 : psize error
* 4 : vaddr is out of range
*/
int Cache_Ibus_MMU_Set(uint32_t ext_ram, uint32_t vaddr, uint32_t paddr, uint32_t psize, uint32_t num, uint32_t fixed);
/**
* @brief Set DCache mmu mapping.
* Please do not call this function in your SDK application.
*
* @param uint32_t ext_ram : DPORT_MMU_ACCESS_FLASH for flash, DPORT_MMU_ACCESS_SPIRAM for spiram, DPORT_MMU_INVALID for invalid.
*
* @param uint32_t vaddr : virtual address in CPU address space.
* Can be DRam0, DRam1, DRom0, DPort and AHB buses address.
* Should be aligned by psize.
*
* @param uint32_t paddr : physical address in external memory.
* Should be aligned by psize.
*
* @param uint32_t psize : page size of DCache, in kilobytes. Should be 64 here.
*
* @param uint32_t num : pages to be set.
* @param uint32_t fixed : 0 for physical pages grow with virtual pages, other for virtual pages map to same physical page.
*
* @return uint32_t: error status
* 0 : mmu set success
* 2 : vaddr or paddr is not aligned
* 3 : psize error
* 4 : vaddr is out of range
*/
int Cache_Dbus_MMU_Set(uint32_t ext_ram, uint32_t vaddr, uint32_t paddr, uint32_t psize, uint32_t num, uint32_t fixed);
/**
* @brief Count the pages in the bus room address which map to Flash.
* Please do not call this function in your SDK application.
*
* @param uint32_t bus : the bus to count with.
*
* @param uint32_t * page0_mapped : value should be initial by user, 0 for not mapped, other for mapped count.
*
* return uint32_t : the number of pages which map to Flash.
*/
uint32_t Cache_Count_Flash_Pages(uint32_t bus, uint32_t * page0_mapped);
/**
* @brief Copy Instruction or rodata from Flash to SPIRAM, and remap to SPIRAM.
* Please do not call this function in your SDK application.
*
* @param uint32_t bus : the bus which need to copy to SPIRAM.
*
* @param uint32_t bus_start_addr : the start virtual address for the bus.
*
* @param uint32_t start_page : the start (64KB) page number in SPIRAM.
*
* @param uint32_t * page0_page : the flash page0 in SPIRAM page number, 0xffff for invalid.
*
* return uint32_t : the next start page number for SPIRAM not mapped.
*/
uint32_t Cache_Flash_To_SPIRAM_Copy(uint32_t bus, uint32_t bus_start_addr, uint32_t start_page, uint32_t * page0_page);
/**
* @brief allocate memory to used by ICache and DCache.
* Please do not call this function in your SDK application.
*
* @param cache_layout_t sram0_layout : the usage of first 8KB internal memory block, can be CACHE_MEMORY_INVALID, CACHE_MEMORY_ICACHE_LOW, CACHE_MEMORY_ICACHE_HIGH, CACHE_MEMORY_DCACHE_LOW and CACHE_MEMORY_DCACHE_HIGH
*
* @param cache_layout_t sram1_layout : the usage of second 8KB internal memory block
*
* @param cache_layout_t sram2_layout : the usage of third 8KB internal memory block
*
* @param cache_layout_t sram3_layout : the usage of forth 8KB internal memory block
*
* return none
*/
void Cache_Allocate_SRAM(cache_layout_t sram0_layout, cache_layout_t sram1_layout, cache_layout_t sram2_layout, cache_layout_t sram3_layout);
/**
* @brief Get cache mode of ICache or DCache.
* Please do not call this function in your SDK application.
*
* @param struct cache_mode * mode : the pointer of cache mode struct, caller should set the icache field
*
* return none
*/
void Cache_Get_Mode(struct cache_mode * mode);
/**
* @brief set ICache modes: cache size, associate ways and cache line size.
* Please do not call this function in your SDK application.
*
* @param cache_size_t cache_size : the cache size, can be CACHE_SIZE_HALF and CACHE_SIZE_FULL
*
* @param cache_ways_t ways : the associate ways of cache, can only be CACHE_4WAYS_ASSOC
*
* @param cache_line_size_t cache_line_size : the cache line size, can be CACHE_LINE_SIZE_16B, CACHE_LINE_SIZE_32B
*
* return none
*/
void Cache_Set_ICache_Mode(cache_size_t cache_size, cache_ways_t ways, cache_line_size_t cache_line_size);
/**
* @brief set DCache modes: cache size, associate ways and cache line size.
* Please do not call this function in your SDK application.
*
* @param cache_size_t cache_size : the cache size, can be CACHE_SIZE_HALF and CACHE_SIZE_FULL
*
* @param cache_ways_t ways : the associate ways of cache, can only be CACHE_4WAYS_ASSOC
*
* @param cache_line_size_t cache_line_size : the cache line size, can be CACHE_LINE_SIZE_16B, CACHE_LINE_SIZE_32B
*
* return none
*/
void Cache_Set_DCache_Mode(cache_size_t cache_size, cache_ways_t ways, cache_line_size_t cache_line_size);
/**
* @brief check if the address is accessed through ICache.
* Please do not call this function in your SDK application.
*
* @param uint32_t addr : the address to check.
*
* @return 1 if the address is accessed through ICache, 0 if not.
*/
uint32_t Cache_Address_Through_ICache(uint32_t addr);
/**
* @brief check if the address is accessed through DCache.
* Please do not call this function in your SDK application.
*
* @param uint32_t addr : the address to check.
*
* @return 1 if the address is accessed through DCache, 0 if not.
*/
uint32_t Cache_Address_Through_DCache(uint32_t addr);
/**
* @brief Invalidate the cache items for ICache.
* Operation will be done CACHE_LINE_SIZE aligned.
* If the region is not in ICache addr room, nothing will be done.
* Please do not call this function in your SDK application.
*
* @param uint32_t addr: start address to invalidate
*
* @param uint32_t items: cache lines to invalidate, items * cache_line_size should not exceed the bus address size(4MB)
*
* @return None
*/
void Cache_Invalidate_ICache_Items(uint32_t addr, uint32_t items);
/**
* @brief Invalidate the cache items for DCache.
* Operation will be done CACHE_LINE_SIZE aligned.
* If the region is not in DCache addr room, nothing will be done.
* Please do not call this function in your SDK application.
*
* @param uint32_t addr: start address to invalidate
*
* @param uint32_t items: cache lines to invalidate, items * cache_line_size should not exceed the bus address size(4MB)
*
* @return None
*/
void Cache_Invalidate_DCache_Items(uint32_t addr, uint32_t items);
/**
* @brief Clean the dirty bit of cache Items of DCache.
* Operation will be done CACHE_LINE_SIZE aligned.
* If the region is not in DCache addr room, nothing will be done.
* Please do not call this function in your SDK application.
*
* @param uint32_t addr: start address to Clean
*
* @param uint32_t items: cache lines to invalidate, items * cache_line_size should not exceed the bus address size(4MB)
*
* @return None
*/
void Cache_Clean_Items(uint32_t addr, uint32_t items);
/**
* @brief Write back the cache items of DCache.
* Operation will be done CACHE_LINE_SIZE aligned.
* If the region is not in DCache addr room, nothing will be done.
* Please do not call this function in your SDK application.
*
* @param uint32_t addr: start address to write back
*
* @param uint32_t items: cache lines to invalidate, items * cache_line_size should not exceed the bus address size(4MB)
*
* @return None
*/
void Cache_WriteBack_Items(uint32_t addr, uint32_t items);
/**
* @brief Invalidate the Cache items in the region from ICache or DCache.
* If the region is not in Cache addr room, nothing will be done.
* Please do not call this function in your SDK application.
*
* @param uint32_t addr : invalidated region start address.
*
* @param uint32_t size : invalidated region size.
*
* @return 0 for success
* 1 for invalid argument
*/
int Cache_Invalidate_Addr(uint32_t addr, uint32_t size);
/**
* @brief Clean the dirty bit of Cache items in the region from DCache.
* If the region is not in DCache addr room, nothing will be done.
* Please do not call this function in your SDK application.
*
* @param uint32_t addr : cleaned region start address.
*
* @param uint32_t size : cleaned region size.
*
* @return 0 for success
* 1 for invalid argument
*/
int Cache_Clean_Addr(uint32_t addr, uint32_t size);
/**
* @brief Writeback the Cache items(also clean the dirty bit) in the region from DCache.
* If the region is not in DCache addr room, nothing will be done.
* Please do not call this function in your SDK application.
*
* @param uint32_t addr : writeback region start address.
*
* @param uint32_t size : writeback region size.
*
* @return 0 for success
* 1 for invalid argument
*/
int Cache_WriteBack_Addr(uint32_t addr, uint32_t size);
/**
* @brief Invalidate all cache items in ICache.
* Please do not call this function in your SDK application.
*
* @param None
*
* @return None
*/
void Cache_Invalidate_ICache_All(void);
/**
* @brief Invalidate all cache items in DCache.
* Please do not call this function in your SDK application.
*
* @param None
*
* @return None
*/
void Cache_Invalidate_DCache_All(void);
/**
* @brief Clean the dirty bit of all cache items in DCache.
* Please do not call this function in your SDK application.
*
* @param None
*
* @return None
*/
void Cache_Clean_All(void);
/**
* @brief WriteBack all cache items in DCache.
* Please do not call this function in your SDK application.
*
* @param None
*
* @return None
*/
void Cache_WriteBack_All(void);
/**
* @brief Mask all buses through ICache and DCache.
* Please do not call this function in your SDK application.
*
* @param None
*
* @return None
*/
void Cache_Mask_All(void);
/**
* @brief UnMask DRom0 bus through ICache.
* Please do not call this function in your SDK application.
*
* @param None
*
* @return None
*/
void Cache_UnMask_Drom0(void);
/**
* @brief Suspend ICache auto preload operation, then you can resume it after some ICache operations.
* Please do not call this function in your SDK application.
*
* @param None
*
* @return uint32_t : 0 for ICache not auto preload before suspend.
*/
uint32_t Cache_Suspend_ICache_Autoload(void);
/**
* @brief Resume ICache auto preload operation after some ICache operations.
* Please do not call this function in your SDK application.
*
* @param uint32_t autoload : 0 for ICache not auto preload before suspend.
*
* @return None.
*/
void Cache_Resume_ICache_Autoload(uint32_t autoload);
/**
* @brief Suspend DCache auto preload operation, then you can resume it after some DCache operations.
* Please do not call this function in your SDK application.
*
* @param None
*
* @return uint32_t : 0 for DCache not auto preload before suspend.
*/
uint32_t Cache_Suspend_DCache_Autoload(void);
/**
* @brief Resume DCache auto preload operation after some DCache operations.
* Please do not call this function in your SDK application.
*
* @param uint32_t autoload : 0 for DCache not auto preload before suspend.
*
* @return None.
*/
void Cache_Resume_DCache_Autoload(uint32_t autoload);
/**
* @brief Start an ICache manual preload, will suspend auto preload of ICache.
* Please do not call this function in your SDK application.
*
* @param uint32_t addr : start address of the preload region.
*
* @param uint32_t size : size of the preload region, should not exceed the size of ICache.
*
* @param uint32_t order : the preload order, 0 for positive, other for negative
*
* @return uint32_t : 0 for ICache not auto preload before manual preload.
*/
uint32_t Cache_Start_ICache_Preload(uint32_t addr, uint32_t size, uint32_t order);
/**
* @brief Return if the ICache manual preload done.
* Please do not call this function in your SDK application.
*
* @param None
*
* @return uint32_t : 0 for ICache manual preload not done.
*/
uint32_t Cache_ICache_Preload_Done(void);
/**
* @brief End the ICache manual preload to resume auto preload of ICache.
* Please do not call this function in your SDK application.
*
* @param uint32_t autoload : 0 for ICache not auto preload before manual preload.
*
* @return None
*/
void Cache_End_ICache_Preload(uint32_t autoload);
/**
* @brief Start an DCache manual preload, will suspend auto preload of DCache.
* Please do not call this function in your SDK application.
*
* @param uint32_t addr : start address of the preload region.
*
* @param uint32_t size : size of the preload region, should not exceed the size of DCache.
*
* @param uint32_t order : the preload order, 0 for positive, other for negative
*
* @return uint32_t : 0 for DCache not auto preload before manual preload.
*/
uint32_t Cache_Start_DCache_Preload(uint32_t addr, uint32_t size, uint32_t order);
/**
* @brief Return if the DCache manual preload done.
* Please do not call this function in your SDK application.
*
* @param None
*
* @return uint32_t : 0 for DCache manual preload not done.
*/
uint32_t Cache_DCache_Preload_Done(void);
/**
* @brief End the DCache manual preload to resume auto preload of DCache.
* Please do not call this function in your SDK application.
*
* @param uint32_t autoload : 0 for DCache not auto preload before manual preload.
*
* @return None
*/
void Cache_End_DCache_Preload(uint32_t autoload);
/**
* @brief Config autoload parameters of ICache.
* Please do not call this function in your SDK application.
*
* @param struct autoload_config * config : autoload parameters.
*
* @return None
*/
void Cache_Config_ICache_Autoload(const struct autoload_config * config);
/**
* @brief Enable auto preload for ICache.
* Please do not call this function in your SDK application.
*
* @param None
*
* @return None
*/
void Cache_Enable_ICache_Autoload(void);
/**
* @brief Disable auto preload for ICache.
* Please do not call this function in your SDK application.
*
* @param None
*
* @return None
*/
void Cache_Disable_ICache_Autoload(void);
/**
* @brief Config autoload parameters of DCache.
* Please do not call this function in your SDK application.
*
* @param struct autoload_config * config : autoload parameters.
*
* @return None
*/
void Cache_Config_DCache_Autoload(const struct autoload_config * config);
/**
* @brief Enable auto preload for DCache.
* Please do not call this function in your SDK application.
*
* @param None
*
* @return None
*/
void Cache_Enable_DCache_Autoload(void);
/**
* @brief Disable auto preload for DCache.
* Please do not call this function in your SDK application.
*
* @param None
*
* @return None
*/
void Cache_Disable_DCache_Autoload(void);
/**
* @brief Config a group of prelock parameters of ICache.
* Please do not call this function in your SDK application.
*
* @param struct lock_config * config : a group of lock parameters.
*
* @return None
*/
void Cache_Enable_ICache_PreLock(const struct lock_config *config);
/**
* @brief Disable a group of prelock parameters for ICache.
* However, the locked data will not be released.
* Please do not call this function in your SDK application.
*
* @param uint16_t group : 0 for group0, 1 for group1.
*
* @return None
*/
void Cache_Disable_ICache_PreLock(uint16_t group);
/**
* @brief Lock the cache items for ICache.
* Operation will be done CACHE_LINE_SIZE aligned.
* If the region is not in ICache addr room, nothing will be done.
* Please do not call this function in your SDK application.
*
* @param uint32_t addr: start address to lock
*
* @param uint32_t items: cache lines to lock, items * cache_line_size should not exceed the bus address size(4MB)
*
* @return None
*/
void Cache_Lock_ICache_Items(uint32_t addr, uint32_t items);
/**
* @brief Unlock the cache items for ICache.
* Operation will be done CACHE_LINE_SIZE aligned.
* If the region is not in ICache addr room, nothing will be done.
* Please do not call this function in your SDK application.
*
* @param uint32_t addr: start address to unlock
*
* @param uint32_t items: cache lines to unlock, items * cache_line_size should not exceed the bus address size(4MB)
*
* @return None
*/
void Cache_Unlock_ICache_Items(uint32_t addr, uint32_t items);
/**
* @brief Config a group of prelock parameters of DCache.
* Please do not call this function in your SDK application.
*
* @param struct lock_config * config : a group of lock parameters.
*
* @return None
*/
void Cache_Enable_DCache_PreLock(const struct lock_config *config);
/**
* @brief Disable a group of prelock parameters for DCache.
* However, the locked data will not be released.
* Please do not call this function in your SDK application.
*
* @param uint16_t group : 0 for group0, 1 for group1.
*
* @return None
*/
void Cache_Disable_DCache_PreLock(uint16_t group);
/**
* @brief Lock the cache items for DCache.
* Operation will be done CACHE_LINE_SIZE aligned.
* If the region is not in DCache addr room, nothing will be done.
* Please do not call this function in your SDK application.
*
* @param uint32_t addr: start address to lock
*
* @param uint32_t items: cache lines to lock, items * cache_line_size should not exceed the bus address size(4MB)
*
* @return None
*/
void Cache_Lock_DCache_Items(uint32_t addr, uint32_t items);
/**
* @brief Unlock the cache items for DCache.
* Operation will be done CACHE_LINE_SIZE aligned.
* If the region is not in DCache addr room, nothing will be done.
* Please do not call this function in your SDK application.
*
* @param uint32_t addr: start address to unlock
*
* @param uint32_t items: cache lines to unlock, items * cache_line_size should not exceed the bus address size(4MB)
*
* @return None
*/
void Cache_Unlock_DCache_Items(uint32_t addr, uint32_t items);
/**
* @brief Lock the cache items in tag memory for ICache or DCache.
* Please do not call this function in your SDK application.
*
* @param uint32_t addr : start address of lock region.
*
* @param uint32_t size : size of lock region.
*
* @return 0 for success
* 1 for invalid argument
*/
int Cache_Lock_Addr(uint32_t addr, uint32_t size);
/**
* @brief Unlock the cache items in tag memory for ICache or DCache.
* Please do not call this function in your SDK application.
*
* @param uint32_t addr : start address of unlock region.
*
* @param uint32_t size : size of unlock region.
*
* @return 0 for success
* 1 for invalid argument
*/
int Cache_Unlock_Addr(uint32_t addr, uint32_t size);
/**
* @brief Disable ICache access for the cpu.
* This operation will make all ICache tag memory invalid, CPU can't access ICache, ICache will keep idle.
* Please do not call this function in your SDK application.
*
* @return uint32_t : auto preload enabled before
*/
uint32_t Cache_Disable_ICache(void);
/**
* @brief Enable ICache access for the cpu.
* Please do not call this function in your SDK application.
*
* @param uint32_t autoload : ICache will preload then.
*
* @return None
*/
void Cache_Enable_ICache(uint32_t autoload);
/**
* @brief Disable DCache access for the cpu.
* This operation will make all DCache tag memory invalid, CPU can't access DCache, DCache will keep idle
* Please do not call this function in your SDK application.
*
* @return uint32_t : auto preload enabled before
*/
uint32_t Cache_Disable_DCache(void);
/**
* @brief Enable DCache access for the cpu.
* Please do not call this function in your SDK application.
*
* @param uint32_t autoload : DCache will preload then.
*
* @return None
*/
void Cache_Enable_DCache(uint32_t autoload);
/**
* @brief Suspend ICache access for the cpu.
* The ICache tag memory is still there, CPU can't access ICache, ICache will keep idle.
* Please do not change MMU, cache mode or tag memory(tag memory can be changed in some special case).
* Please do not call this function in your SDK application.
*
* @param None
*
* @return uint32_t : auto preload enabled before
*/
uint32_t Cache_Suspend_ICache(void);
/**
* @brief Resume ICache access for the cpu.
* Please do not call this function in your SDK application.
*
* @param uint32_t autoload : ICache will preload then.
*
* @return None
*/
void Cache_Resume_ICache(uint32_t autoload);
/**
* @brief Suspend DCache access for the cpu.
* The ICache tag memory is still there, CPU can't access DCache, DCache will keep idle.
× Please do not change MMU, cache mode or tag memory(tag memory can be changed in some special case).
* Please do not call this function in your SDK application.
*
* @param None
*
* @return uint32_t : auto preload enabled before
*/
uint32_t Cache_Suspend_DCache(void);
/**
* @brief Resume DCache access for the cpu.
* Please do not call this function in your SDK application.
*
* @param uint32_t autoload : DCache will preload then.
*
* @return None
*/
void Cache_Resume_DCache(uint32_t autoload);
/**
* @brief Get ICache cache line size
*
* @param None
*
* @return uint32_t: 16, 32 Byte
*/
uint32_t Cache_Get_ICache_Line_Size(void);
/**
* @brief Get DCache cache line size
*
* @param None
*
* @return uint32_t: 16, 32 Byte
*/
uint32_t Cache_Get_DCache_Line_Size(void);
/**
* @brief Set default mode from boot, 8KB ICache, 16Byte cache line size.
*
* @param None
*
* @return None
*/
void Cache_Set_Default_Mode(void);
/**
* @brief Set default mode from boot, 8KB DCache, 16Byte cache line size.
*
* @param None
*
* @return None
*/
void Cache_Enable_Defalut_DCache_Mode(void);
/**
* @brief Travel tag memory to run a call back function.
* ICache and DCache are suspend when doing this.
* The callback will get the parameter tag_group_info, which will include a group of tag memory addresses and cache memory addresses.
* Please do not call this function in your SDK application.
*
* @param struct cache_mode * mode : the cache to check and the cache mode.
*
* @param uint32_t filter_addr : only the cache lines which may include the filter_address will be returned to the call back function.
* 0 for do not filter, all cache lines will be returned.
*
* @param void (* process)(struct tag_group_info *) : call back function, which may be called many times, a group(the addresses in the group are in the same position in the cache ways) a time.
*
* @return None
*/
void Cache_Travel_Tag_Memory(struct cache_mode * mode, uint32_t filter_addr, void (* process)(struct tag_group_info *));
/**
* @brief Get the virtual address from cache mode, cache tag and the virtual address offset of cache ways.
* Please do not call this function in your SDK application.
*
* @param struct cache_mode * mode : the cache to calculate the virtual address and the cache mode.
*
* @param uint32_t tag : the tag part fo a tag item, 12-14 bits.
*
* @param uint32_t addr_offset : the virtual address offset of the cache ways.
*
* @return uint32_t : the virtual address.
*/
uint32_t Cache_Get_Virtual_Addr(struct cache_mode *mode, uint32_t tag, uint32_t vaddr_offset);
/**
* @brief Get cache memory block base address.
* Please do not call this function in your SDK application.
*
* @param uint32_t icache : 0 for dcache, other for icache.
*
* @param uint32_t high : 0 for low part block, 1 for high part block.
*
* @return uint32_t : the cache memory block base address, 0 if the block not used.
*/
uint32_t Cache_Get_Memory_BaseAddr(uint32_t icache, uint32_t high);
/**
* @brief Get the cache memory address from cache mode, cache memory offset and the virtual address offset of cache ways.
* Please do not call this function in your SDK application.
*
* @param struct cache_mode * mode : the cache to calculate the virtual address and the cache mode.
*
* @param uint32_t cache_memory_offset : the cache memory offset of the whole cache (ICache or DCache) for the cache line.
*
* @param uint32_t addr_offset : the virtual address offset of the cache ways.
*
* @return uint32_t : the virtual address.
*/
uint32_t Cache_Get_Memory_Addr(struct cache_mode *mode, uint32_t cache_memory_offset, uint32_t vaddr_offset);
/**
* @brief Get the cache memory value by DRAM address.
* Please do not call this function in your SDK application.
*
* @param uint32_t cache_memory_addr : DRAM address for the cache memory.
*
* @return uint32_t : the word value of the address.
*/
uint32_t Cache_Get_Memory_value(uint32_t cache_memory_addr);
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* _ROM_CACHE_H_ */

88
tools/sdk/esp32/include/esp_rom/include/esp32s2/rom/crc.h Normal file
View File

@ -0,0 +1,88 @@
// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#ifndef ROM_CRC_H
#define ROM_CRC_H
#include <stdint.h>
#ifdef __cplusplus
extern "C" {
#endif
/** \defgroup crc_apis, uart configuration and communication related apis
* @brief crc apis
*/
/** @addtogroup crc_apis
* @{
*/
/* Standard CRC8/16/32 algorithms. */
// CRC-8 x8+x2+x1+1 0x07
// CRC16-CCITT x16+x12+x5+1 1021 ISO HDLC, ITU X.25, V.34/V.41/V.42, PPP-FCS
// CRC32:
//G(x) = x32 +x26 + x23 + x22 + x16 + x12 + x11 + x10 + x8 + x7 + x5 + x4 + x2 + x1 + 1
//If your buf is not continuous, you can use the first result to be the second parameter.
/**
* @brief Crc32 value that is in little endian.
*
* @param uint32_t crc : init crc value, use 0 at the first use.
*
* @param uint8_t const *buf : buffer to start calculate crc.
*
* @param uint32_t len : buffer length in byte.
*
* @return None
*/
uint32_t crc32_le(uint32_t crc, uint8_t const *buf, uint32_t len);
/**
* @brief Crc16 value that is in little endian.
*
* @param uint16_t crc : init crc value, use 0 at the first use.
*
* @param uint8_t const *buf : buffer to start calculate crc.
*
* @param uint32_t len : buffer length in byte.
*
* @return None
*/
uint16_t crc16_le(uint16_t crc, uint8_t const *buf, uint32_t len);
/**
* @brief Crc8 value that is in little endian.
*
* @param uint8_t crc : init crc value, use 0 at the first use.
*
* @param uint8_t const *buf : buffer to start calculate crc.
*
* @param uint32_t len : buffer length in byte.
*
* @return None
*/
uint8_t crc8_le(uint8_t crc, uint8_t const *buf, uint32_t len);
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif

147
tools/sdk/esp32/include/esp_rom/include/esp32s2/rom/digital_signature.h Normal file
View File

@ -0,0 +1,147 @@
/*
ROM functions for hardware Digital Signature peripheral verification
*/
// Copyright 2019 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#pragma once
#ifdef __cplusplus
extern "C" {
#endif
#include <stdint.h>
#include <stdbool.h>
#define ETS_DS_IV_LEN 16
/* Length of parameter 'C' stored in flash */
#define ETS_DS_C_LEN (12672 / 8)
/* Encrypted ETS data. Recommended to store in flash in this format.
*/
typedef struct {
/* RSA LENGTH register parameters
* (number of words in RSA key & operands, minus one).
*
* Max value 127 (for RSA 4096).
*
* This value must match the length field encrypted and stored in 'c',
* or invalid results will be returned. (The DS peripheral will
* always use the value in 'c', not this value, so an attacker can't
* alter the DS peripheral results this way, it will just truncate or
* extend the message and the resulting signature in software.)
*/
unsigned rsa_length;
/* IV value used to encrypt 'c' */
uint8_t iv[ETS_DS_IV_LEN];
/* Encrypted Digital Signature parameters. Result of AES-CBC encryption
of plaintext values. Includes an encrypted message digest.
*/
uint8_t c[ETS_DS_C_LEN];
} ets_ds_data_t;
typedef enum {
ETS_DS_OK,
ETS_DS_INVALID_PARAM, /* Supplied parameters are invalid */
ETS_DS_INVALID_KEY, /* HMAC peripheral failed to supply key */
ETS_DS_INVALID_PADDING, /* 'c' decrypted with invalid padding */
ETS_DS_INVALID_DIGEST, /* 'c' decrypted with invalid digest */
} ets_ds_result_t;
void ets_ds_enable(void);
void ets_ds_disable(void);
/*
* @brief Start signing a message (or padded message digest) using the Digital Signature peripheral
*
* - @param message Pointer to message (or padded digest) containing the message to sign. Should be
* (data->rsa_length + 1)*4 bytes long. @param data Pointer to DS data. Can be a pointer to data
* in flash.
*
* Caller must have already called ets_ds_enable() and ets_hmac_calculate_downstream() before calling
* this function, and is responsible for calling ets_ds_finish_sign() and then
* ets_hmac_invalidate_downstream() afterwards.
*
* @return ETS_DS_OK if signature is in progress, ETS_DS_INVALID_PARAM if param is invalid,
* EST_DS_INVALID_KEY if key or HMAC peripheral is configured incorrectly.
*/
ets_ds_result_t ets_ds_start_sign(const void *message, const ets_ds_data_t *data);
/*
* @brief Returns true if the DS peripheral is busy following a call to ets_ds_start_sign()
*
* A result of false indicates that a call to ets_ds_finish_sign() will not block.
*
* Only valid if ets_ds_enable() has been called.
*/
bool ets_ds_is_busy(void);
/* @brief Finish signing a message using the Digital Signature peripheral
*
* Must be called after ets_ds_start_sign(). Can use ets_ds_busy() to wait until
* peripheral is no longer busy.
*
* - @param signature Pointer to buffer to contain the signature. Should be
* (data->rsa_length + 1)*4 bytes long.
* - @param data Should match the 'data' parameter passed to ets_ds_start_sign()
*
* @param ETS_DS_OK if signing succeeded, ETS_DS_INVALID_PARAM if param is invalid,
* ETS_DS_INVALID_DIGEST or ETS_DS_INVALID_PADDING if there is a problem with the
* encrypted data digest or padding bytes (in case of ETS_DS_INVALID_PADDING, a
* digest is produced anyhow.)
*/
ets_ds_result_t ets_ds_finish_sign(void *signature, const ets_ds_data_t *data);
/* Plaintext parameters used by Digital Signature.
Not used for signing with DS peripheral, but can be encrypted
in-device by calling ets_ds_encrypt_params()
*/
typedef struct {
uint32_t Y[4096/32];
uint32_t M[4096/32];
uint32_t Rb[4096/32];
uint32_t M_prime;
uint32_t length;
} ets_ds_p_data_t;
typedef enum {
ETS_DS_KEY_HMAC, /* The HMAC key (as stored in efuse) */
ETS_DS_KEY_AES, /* The AES key (as derived from HMAC key by HMAC peripheral in downstream mode) */
} ets_ds_key_t;
/* @brief Encrypt DS parameters suitable for storing and later use with DS peripheral
*
* @param data Output buffer to store encrypted data, suitable for later use generating signatures.
* @param iv Pointer to 16 byte IV buffer, will be copied into 'data'. Should be randomly generated bytes each time.
* @param p_data Pointer to input plaintext key data. The expectation is this data will be deleted after this process is done and 'data' is stored.
* @param key Pointer to 32 bytes of key data. Type determined by key_type parameter. The expectation is the corresponding HMAC key will be stored to efuse and then permanently erased.
* @param key_type Type of key stored in 'key' (either the AES-256 DS key, or an HMAC DS key from which the AES DS key is derived using HMAC peripheral)
*
* @return ETS_DS_INVALID_PARAM if any parameter is invalid, or ETS_DS_OK if 'data' is successfully generated from the input parameters.
*/
ets_ds_result_t ets_ds_encrypt_params(ets_ds_data_t *data, const void *iv, const ets_ds_p_data_t *p_data, const void *key, ets_ds_key_t key_type);
#ifdef __cplusplus
}
#endif

393
tools/sdk/esp32/include/esp_rom/include/esp32s2/rom/efuse.h Normal file
View File

@ -0,0 +1,393 @@
// Copyright 2015-2018 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#ifndef _ROM_EFUSE_H_
#define _ROM_EFUSE_H_
#ifdef __cplusplus
extern "C" {
#endif
#include <stdlib.h>
#include <stdbool.h>
/** \defgroup efuse_APIs efuse APIs
* @brief ESP32 efuse read/write APIs
* @attention
*
*/
/** @addtogroup efuse_APIs
* @{
*/
typedef enum {
ETS_EFUSE_KEY_PURPOSE_USER = 0,
ETS_EFUSE_KEY_PURPOSE_RESERVED = 1,
ETS_EFUSE_KEY_PURPOSE_XTS_AES_256_KEY_1 = 2,
ETS_EFUSE_KEY_PURPOSE_XTS_AES_256_KEY_2 = 3,
ETS_EFUSE_KEY_PURPOSE_XTS_AES_128_KEY = 4,
ETS_EFUSE_KEY_PURPOSE_HMAC_DOWN_ALL = 5,
ETS_EFUSE_KEY_PURPOSE_HMAC_DOWN_JTAG = 6,
ETS_EFUSE_KEY_PURPOSE_HMAC_DOWN_DIGITAL_SIGNATURE = 7,
ETS_EFUSE_KEY_PURPOSE_HMAC_UP = 8,
ETS_EFUSE_KEY_PURPOSE_SECURE_BOOT_DIGEST0 = 9,
ETS_EFUSE_KEY_PURPOSE_SECURE_BOOT_DIGEST1 = 10,
ETS_EFUSE_KEY_PURPOSE_SECURE_BOOT_DIGEST2 = 11,
ETS_EFUSE_KEY_PURPOSE_MAX,
} ets_efuse_purpose_t;
typedef enum {
ETS_EFUSE_BLOCK0 = 0,
ETS_EFUSE_MAC_SPI_SYS_0 = 1,
ETS_EFUSE_BLOCK_SYS_DATA = 2,
ETS_EFUSE_BLOCK_USR_DATA = 3,
ETS_EFUSE_BLOCK_KEY0 = 4,
ETS_EFUSE_BLOCK_KEY1 = 5,
ETS_EFUSE_BLOCK_KEY2 = 6,
ETS_EFUSE_BLOCK_KEY3 = 7,
ETS_EFUSE_BLOCK_KEY4 = 8,
ETS_EFUSE_BLOCK_KEY5 = 9,
ETS_EFUSE_BLOCK_KEY6 = 10,
ETS_EFUSE_BLOCK_MAX,
} ets_efuse_block_t;
/**
* @brief set timing accroding the apb clock, so no read error or write error happens.
*
* @param clock: apb clock in HZ, only accept 20M, 40M, 80M.
*
* @return : 0 if success, others if clock not accepted
*/
int ets_efuse_set_timing(uint32_t clock);
/**
* @brief Enable efuse subsystem. Called after reset. Doesn't need to be called again.
*/
void ets_efuse_start(void);
/**
* @brief Efuse read operation: copies data from physical efuses to efuse read registers.
*
* @param null
*
* @return : 0 is success, others if apb clock is not accepted
*/
int ets_efuse_read(void);
/**
* @brief Efuse write operation: Copies data from efuse write registers to efuse. Operates on a single block of efuses at a time.
*
* @note This function does not update read efuses, call ets_efuse_read() once all programming is complete.
*
* @return : 0 is success, others if apb clock is not accepted
*/
int ets_efuse_program(ets_efuse_block_t block);
/**
* @brief Set all Efuse program registers to zero.
*
* Call this before writing new data to the program registers.
*/
void ets_efuse_clear_program_registers(void);
/**
* @brief Program a block of key data to an efuse block
*
* @param key_block Block to read purpose for. Must be in range ETS_EFUSE_BLOCK_KEY0 to ETS_EFUSE_BLOCK_KEY6. Key block must be unused (@ref ets_efuse_key_block_unused).
* @param purpose Purpose to set for this key. Purpose must be already unset.
* @param data Pointer to data to write.
* @param data_len Length of data to write.
*
* @note This function also calls ets_efuse_program() for the specified block, and for block 0 (setting the purpose)
*/
int ets_efuse_write_key(ets_efuse_block_t key_block, ets_efuse_purpose_t purpose, const void *data, size_t data_len);
/* @brief Return the address of a particular efuse block's first read register
*
* @param block Index of efuse block to look up
*
* @return 0 if block is invalid, otherwise a numeric read register address
* of the first word in the block.
*/
uint32_t ets_efuse_get_read_register_address(ets_efuse_block_t block);
/**
* @brief Return the current purpose set for an efuse key block
*
* @param key_block Block to read purpose for. Must be in range ETS_EFUSE_BLOCK_KEY0 to ETS_EFUSE_BLOCK_KEY6.
*/
ets_efuse_purpose_t ets_efuse_get_key_purpose(ets_efuse_block_t key_block);
/**
* @brief Find a key block with the particular purpose set
*
* @param purpose Purpose to search for.
* @param[out] key_block Pointer which will be set to the key block if found. Can be NULL, if only need to test the key block exists.
* @return true if found, false if not found. If false, value at key_block pointer is unchanged.
*/
bool ets_efuse_find_purpose(ets_efuse_purpose_t purpose, ets_efuse_block_t *key_block);
/**
* Return true if the key block is unused, false otherwise.
*
* An unused key block is all zero content, not read or write protected,
* and has purpose 0 (ETS_EFUSE_KEY_PURPOSE_USER)
*
* @param key_block key block to check.
*
* @return true if key block is unused, false if key block or used
* or the specified block index is not a key block.
*/
bool ets_efuse_key_block_unused(ets_efuse_block_t key_block);
/**
* @brief Search for an unused key block and return the first one found.
*
* See @ref ets_efuse_key_block_unused for a description of an unused key block.
*
* @return First unused key block, or ETS_EFUSE_BLOCK_MAX if no unused key block is found.
*/
ets_efuse_block_t ets_efuse_find_unused_key_block(void);
/**
* @brief Return the number of unused efuse key blocks (0-6)
*/
unsigned ets_efuse_count_unused_key_blocks(void);
/**
* @brief Calculate Reed-Solomon Encoding values for a block of efuse data.
*
* @param data Pointer to data buffer (length 32 bytes)
* @param rs_values Pointer to write encoded data to (length 12 bytes)
*/
void ets_efuse_rs_calculate(const void *data, void *rs_values);
/**
* @brief Read spi flash pads configuration from Efuse
*
* @return
* - 0 for default SPI pins.
* - 1 for default HSPI pins.
* - Other values define a custom pin configuration mask. Pins are encoded as per the EFUSE_SPICONFIG_RET_SPICLK,
* EFUSE_SPICONFIG_RET_SPIQ, EFUSE_SPICONFIG_RET_SPID, EFUSE_SPICONFIG_RET_SPICS0, EFUSE_SPICONFIG_RET_SPIHD macros.
* WP pin (for quad I/O modes) is not saved in efuse and not returned by this function.
*/
uint32_t ets_efuse_get_spiconfig(void);
/**
* @brief Read spi flash wp pad from Efuse
*
* @return
* - 0x3f for invalid.
* - 0~46 is valid.
*/
uint32_t ets_efuse_get_wp_pad(void);
/**
* @brief Read opi flash pads configuration from Efuse
*
* @return
* - 0 for default SPI pins.
* - Other values define a custom pin configuration mask. From the LSB, every 6 bits represent a GPIO number which stand for:
* DQS, D4, D5, D6, D7 accordingly.
*/
uint32_t ets_efuse_get_opiconfig(void);
/**
* @brief Read if download mode disabled from Efuse
*
* @return
* - true for efuse disable download mode.
* - false for efuse doesn't disable download mode.
*/
bool ets_efuse_download_modes_disabled(void);
/**
* @brief Read if legacy spi flash boot mode disabled from Efuse
*
* @return
* - true for efuse disable legacy spi flash boot mode.
* - false for efuse doesn't disable legacy spi flash boot mode.
*/
bool ets_efuse_legacy_spi_boot_mode_disabled(void);
/**
* @brief Read if uart print control value from Efuse
*
* @return
* - 0 for uart force print.
* - 1 for uart print when GPIO46 is low when digital reset.
* 2 for uart print when GPIO46 is high when digital reset.
* 3 for uart force slient
*/
uint32_t ets_efuse_get_uart_print_control(void);
/**
* @brief Read which channel will used by ROM to print
*
* @return
* - 0 for UART0.
* - 1 for UART1.
*/
uint32_t ets_efuse_get_uart_print_channel(void);
/**
* @brief Read if usb download mode disabled from Efuse
*
* (Also returns true if security download mode is enabled, as this mode
* disables USB download.)
*
* @return
* - true for efuse disable usb download mode.
* - false for efuse doesn't disable usb download mode.
*/
bool ets_efuse_usb_download_mode_disabled(void);
/**
* @brief Read if tiny basic mode disabled from Efuse
*
* @return
* - true for efuse disable tiny basic mode.
* - false for efuse doesn't disable tiny basic mode.
*/
bool ets_efuse_tiny_basic_mode_disabled(void);
/**
* @brief Read if usb module disabled from Efuse
*
* @return
* - true for efuse disable usb module.
* - false for efuse doesn't disable usb module.
*/
bool ets_efuse_usb_module_disabled(void);
/**
* @brief Read if security download modes enabled from Efuse
*
* @return
* - true for efuse enable security download mode.
* - false for efuse doesn't enable security download mode.
*/
bool ets_efuse_security_download_modes_enabled(void);
/**
* @brief Return true if secure boot is enabled in EFuse
*/
bool ets_efuse_secure_boot_enabled(void);
/**
* @brief Return true if secure boot aggressive revoke is enabled in EFuse
*/
bool ets_efuse_secure_boot_aggressive_revoke_enabled(void);
/**
* @brief Return true if cache encryption (flash, PSRAM, etc) is enabled from boot via EFuse
*/
bool ets_efuse_cache_encryption_enabled(void);
/**
* @brief Return true if EFuse indicates an external phy needs to be used for USB
*/
bool ets_efuse_usb_use_ext_phy(void);
/**
* @brief Return true if EFuse indicates USB device persistence is disabled
*/
bool ets_efuse_usb_force_nopersist(void);
/**
* @brief Return true if OPI pins GPIO33-37 are powered by VDDSPI, otherwise by VDD33CPU
*/
bool ets_efuse_flash_opi_5pads_power_sel_vddspi(void);
/**
* @brief Return true if EFuse indicates an opi flash is attached.
*/
bool ets_efuse_flash_opi_mode(void);
/**
* @brief Return true if EFuse indicates to send a flash resume command.
*/
bool ets_efuse_force_send_resume(void);
/**
* @brief return the time in us ROM boot need wait flash to power on from Efuse
*
* @return
* - uint32_t the time in us.
*/
uint32_t ets_efuse_get_flash_delay_us(void);
#define EFUSE_SPICONFIG_SPI_DEFAULTS 0
#define EFUSE_SPICONFIG_HSPI_DEFAULTS 1
#define EFUSE_SPICONFIG_RET_SPICLK_MASK 0x3f
#define EFUSE_SPICONFIG_RET_SPICLK_SHIFT 0
#define EFUSE_SPICONFIG_RET_SPICLK(ret) (((ret) >> EFUSE_SPICONFIG_RET_SPICLK_SHIFT) & EFUSE_SPICONFIG_RET_SPICLK_MASK)
#define EFUSE_SPICONFIG_RET_SPIQ_MASK 0x3f
#define EFUSE_SPICONFIG_RET_SPIQ_SHIFT 6
#define EFUSE_SPICONFIG_RET_SPIQ(ret) (((ret) >> EFUSE_SPICONFIG_RET_SPIQ_SHIFT) & EFUSE_SPICONFIG_RET_SPIQ_MASK)
#define EFUSE_SPICONFIG_RET_SPID_MASK 0x3f
#define EFUSE_SPICONFIG_RET_SPID_SHIFT 12
#define EFUSE_SPICONFIG_RET_SPID(ret) (((ret) >> EFUSE_SPICONFIG_RET_SPID_SHIFT) & EFUSE_SPICONFIG_RET_SPID_MASK)
#define EFUSE_SPICONFIG_RET_SPICS0_MASK 0x3f
#define EFUSE_SPICONFIG_RET_SPICS0_SHIFT 18
#define EFUSE_SPICONFIG_RET_SPICS0(ret) (((ret) >> EFUSE_SPICONFIG_RET_SPICS0_SHIFT) & EFUSE_SPICONFIG_RET_SPICS0_MASK)
#define EFUSE_SPICONFIG_RET_SPIHD_MASK 0x3f
#define EFUSE_SPICONFIG_RET_SPIHD_SHIFT 24
#define EFUSE_SPICONFIG_RET_SPIHD(ret) (((ret) >> EFUSE_SPICONFIG_RET_SPIHD_SHIFT) & EFUSE_SPICONFIG_RET_SPIHD_MASK)
/**
* @brief Enable JTAG temporarily by writing a JTAG HMAC "key" into
* the JTAG_CTRL registers.
*
* Works if JTAG has been "soft" disabled by burning the EFUSE_SOFT_DIS_JTAG efuse.
*
* Will enable the HMAC module to generate a "downstream" HMAC value from a key already saved in efuse, and then write the JTAG HMAC "key" which will enable JTAG if the two keys match.
*
* @param jtag_hmac_key Pointer to a 32 byte array containing a valid key. Supplied by user.
* @param key_block Index of a key block containing the source for this key.
*
* @return ETS_FAILED if HMAC operation fails or invalid parameter, ETS_OK otherwise. ETS_OK doesn't necessarily mean that JTAG was enabled.
*/
int ets_jtag_enable_temporarily(const uint8_t *jtag_hmac_key, ets_efuse_block_t key_block);
/**
* @brief A crc8 algorithm used for MAC addresses in efuse
*
* @param unsigned char const *p : Pointer to original data.
*
* @param unsigned int len : Data length in byte.
*
* @return unsigned char: Crc value.
*/
unsigned char esp_crc8(unsigned char const *p, unsigned int len);
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* _ROM_EFUSE_H_ */

658
tools/sdk/esp32/include/esp_rom/include/esp32s2/rom/ets_sys.h Normal file
View File

@ -0,0 +1,658 @@
// Copyright 2010-2016 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#ifndef _ROM_ETS_SYS_H_
#define _ROM_ETS_SYS_H_
#include <stdint.h>
#include <stdbool.h>
#include "soc/soc.h"
#ifdef __cplusplus
extern "C" {
#endif
/** \defgroup ets_sys_apis, ets system related apis
* @brief ets system apis
*/
/** @addtogroup ets_sys_apis
* @{
*/
/************************************************************************
* NOTE
* Many functions in this header files can't be run in FreeRTOS.
* Please see the comment of the Functions.
* There are also some functions that doesn't work on FreeRTOS
* without listed in the header, such as:
* xtos functions start with "_xtos_" in ld file.
*
***********************************************************************
*/
/** \defgroup ets_apis, Espressif Task Scheduler related apis
* @brief ets apis
*/
/** @addtogroup ets_apis
* @{
*/
typedef enum {
ETS_OK = 0, /**< return successful in ets*/
ETS_FAILED = 1 /**< return failed in ets*/
} ETS_STATUS;
typedef ETS_STATUS ets_status_t;
typedef uint32_t ETSSignal;
typedef uint32_t ETSParam;
typedef struct ETSEventTag ETSEvent; /**< Event transmit/receive in ets*/
struct ETSEventTag {
ETSSignal sig; /**< Event signal, in same task, different Event with different signal*/
ETSParam par; /**< Event parameter, sometimes without usage, then will be set as 0*/
};
typedef void (*ETSTask)(ETSEvent *e); /**< Type of the Task processer*/
typedef void (* ets_idle_cb_t)(void *arg); /**< Type of the system idle callback*/
/**
* @brief Start the Espressif Task Scheduler, which is an infinit loop. Please do not add code after it.
*
* @param none
*
* @return none
*/
void ets_run(void);
/**
* @brief Set the Idle callback, when Tasks are processed, will call the callback before CPU goto sleep.
*
* @param ets_idle_cb_t func : The callback function.
*
* @param void *arg : Argument of the callback.
*
* @return None
*/
void ets_set_idle_cb(ets_idle_cb_t func, void *arg);
/**
* @brief Init a task with processer, priority, queue to receive Event, queue length.
*
* @param ETSTask task : The task processer.
*
* @param uint8_t prio : Task priority, 0-31, bigger num with high priority, one priority with one task.
*
* @param ETSEvent *queue : Queue belongs to the task, task always receives Events, Queue is circular used.
*
* @param uint8_t qlen : Queue length.
*
* @return None
*/
void ets_task(ETSTask task, uint8_t prio, ETSEvent *queue, uint8_t qlen);
/**
* @brief Post an event to an Task.
*
* @param uint8_t prio : Priority of the Task.
*
* @param ETSSignal sig : Event signal.
*
* @param ETSParam par : Event parameter
*
* @return ETS_OK : post successful
* @return ETS_FAILED : post failed
*/
ETS_STATUS ets_post(uint8_t prio, ETSSignal sig, ETSParam par);
/**
* @}
*/
/** \defgroup ets_boot_apis, Boot routing related apis
* @brief ets boot apis
*/
/** @addtogroup ets_apis
* @{
*/
extern const char *const exc_cause_table[40]; ///**< excption cause that defined by the core.*/
/**
* @brief Set Pro cpu Entry code, code can be called in PRO CPU when booting is not completed.
* When Pro CPU booting is completed, Pro CPU will call the Entry code if not NULL.
*
* @param uint32_t start : the PRO Entry code address value in uint32_t
*
* @return None
*/
void ets_set_user_start(uint32_t start);
/**
* @brief Set Pro cpu Startup code, code can be called when booting is not completed, or in Entry code.
* When Entry code completed, CPU will call the Startup code if not NULL, else call ets_run.
*
* @param uint32_t callback : the Startup code address value in uint32_t
*
* @return None : post successful
*/
void ets_set_startup_callback(uint32_t callback);
/**
* @brief Set App cpu Entry code, code can be called in PRO CPU.
* When APP booting is completed, APP CPU will call the Entry code if not NULL.
*
* @param uint32_t start : the APP Entry code address value in uint32_t, stored in register APPCPU_CTRL_REG_D.
*
* @return None
*/
void ets_set_appcpu_boot_addr(uint32_t start);
/**
* @}
*/
/** \defgroup ets_printf_apis, ets_printf related apis used in ets
* @brief ets printf apis
*/
/** @addtogroup ets_printf_apis
* @{
*/
/**
* @brief Printf the strings to uart or other devices, similar with printf, simple than printf.
* Can not print float point data format, or longlong data format.
* So we maybe only use this in ROM.
*
* @param const char *fmt : See printf.
*
* @param ... : See printf.
*
* @return int : the length printed to the output device.
*/
int ets_printf(const char *fmt, ...);
/**
* @brief Set the uart channel of ets_printf(uart_tx_one_char).
* ROM will set it base on the efuse and gpio setting, however, this can be changed after booting.
*
* @param uart_no : 0 for UART0, 1 for UART1, 2 for UART2.
*
* @return None
*/
void ets_set_printf_channel(uint8_t uart_no);
/**
* @brief Get the uart channel of ets_printf(uart_tx_one_char).
*
* @return uint8_t uart channel used by ets_printf(uart_tx_one_char).
*/
uint8_t ets_get_printf_channel(void);
/**
* @brief Output a char to uart, which uart to output(which is in uart module in ROM) is not in scope of the function.
* Can not print float point data format, or longlong data format
*
* @param char c : char to output.
*
* @return None
*/
void ets_write_char_uart(char c);
/**
* @brief Ets_printf have two output functions： putc1 and putc2, both of which will be called if need ouput.
* To install putc1, which is defaulted installed as ets_write_char_uart in none silent boot mode, as NULL in silent mode.
*
* @param void (*)(char) p: Output function to install.
*
* @return None
*/
void ets_install_putc1(void (*p)(char c));
/**
* @brief Ets_printf have two output functions： putc1 and putc2, both of which will be called if need ouput.
* To install putc2, which is defaulted installed as NULL.
*
* @param void (*)(char) p: Output function to install.
*
* @return None
*/
void ets_install_putc2(void (*p)(char c));
/**
* @brief Install putc1 as ets_write_char_uart.
* In silent boot mode(to void interfere the UART attached MCU), we can call this function, after booting ok.
*
* @param None
*
* @return None
*/
void ets_install_uart_printf(void);
#define ETS_PRINTF(...) ets_printf(...)
#define ETS_ASSERT(v) do { \
if (!(v)) { \
ets_printf("%s %u \n", __FILE__, __LINE__); \
while (1) {}; \
} \
} while (0);
/**
* @}
*/
/** \defgroup ets_timer_apis, ets_timer related apis used in ets
* @brief ets timer apis
*/
/** @addtogroup ets_timer_apis
* @{
*/
typedef void ETSTimerFunc(void *timer_arg);/**< timer handler*/
typedef struct _ETSTIMER_ {
struct _ETSTIMER_ *timer_next; /**< timer linker*/
uint32_t timer_expire; /**< abstruct time when timer expire*/
uint32_t timer_period; /**< timer period, 0 means timer is not periodic repeated*/
ETSTimerFunc *timer_func; /**< timer handler*/
void *timer_arg; /**< timer handler argument*/
} ETSTimer;
/**
* @brief Init ets timer, this timer range is 640 us to 429496 ms
* In FreeRTOS, please call FreeRTOS apis, never call this api.
*
* @param None
*
* @return None
*/
void ets_timer_init(void);
/**
* @brief In FreeRTOS, please call FreeRTOS apis, never call this api.
*
* @param None
*
* @return None
*/
void ets_timer_deinit(void);
/**
* @brief Arm an ets timer, this timer range is 640 us to 429496 ms.
* In FreeRTOS, please call FreeRTOS apis, never call this api.
*
* @param ETSTimer *timer : Timer struct pointer.
*
* @param uint32_t tmout : Timer value in ms, range is 1 to 429496.
*
* @param bool repeat : Timer is periodic repeated.
*
* @return None
*/
void ets_timer_arm(ETSTimer *timer, uint32_t tmout, bool repeat);
/**
* @brief Arm an ets timer, this timer range is 640 us to 429496 ms.
* In FreeRTOS, please call FreeRTOS apis, never call this api.
*
* @param ETSTimer *timer : Timer struct pointer.
*
* @param uint32_t tmout : Timer value in us, range is 1 to 429496729.
*
* @param bool repeat : Timer is periodic repeated.
*
* @return None
*/
void ets_timer_arm_us(ETSTimer *ptimer, uint32_t us, bool repeat);
/**
* @brief Disarm an ets timer.
* In FreeRTOS, please call FreeRTOS apis, never call this api.
*
* @param ETSTimer *timer : Timer struct pointer.
*
* @return None
*/
void ets_timer_disarm(ETSTimer *timer);
/**
* @brief Set timer callback and argument.
* In FreeRTOS, please call FreeRTOS apis, never call this api.
*
* @param ETSTimer *timer : Timer struct pointer.
*
* @param ETSTimerFunc *pfunction : Timer callback.
*
* @param void *parg : Timer callback argument.
*
* @return None
*/
void ets_timer_setfn(ETSTimer *ptimer, ETSTimerFunc *pfunction, void *parg);
/**
* @brief Unset timer callback and argument to NULL.
* In FreeRTOS, please call FreeRTOS apis, never call this api.
*
* @param ETSTimer *timer : Timer struct pointer.
*
* @return None
*/
void ets_timer_done(ETSTimer *ptimer);
/**
* @brief CPU do while loop for some time.
* In FreeRTOS task, please call FreeRTOS apis.
*
* @param uint32_t us : Delay time in us.
*
* @return None
*/
void ets_delay_us(uint32_t us);
/**
* @brief Set the real CPU ticks per us to the ets, so that ets_delay_us will be accurate.
* Call this function when CPU frequency is changed.
*
* @param uint32_t ticks_per_us : CPU ticks per us.
*
* @return None
*/
void ets_update_cpu_frequency(uint32_t ticks_per_us);
/**
* @brief Set the real CPU ticks per us to the ets, so that ets_delay_us will be accurate.
*
* @note This function only sets the tick rate for the current CPU. It is located in ROM,
* so the deep sleep stub can use it even if IRAM is not initialized yet.
*
* @param uint32_t ticks_per_us : CPU ticks per us.
*
* @return None
*/
void ets_update_cpu_frequency_rom(uint32_t ticks_per_us);
/**
* @brief Get the real CPU ticks per us to the ets.
* This function do not return real CPU ticks per us, just the record in ets. It can be used to check with the real CPU frequency.
*
* @param None
*
* @return uint32_t : CPU ticks per us record in ets.
*/
uint32_t ets_get_cpu_frequency(void);
/**
* @brief Get xtal_freq value, If value not stored in RTC_STORE5, than store.
*
* @param None
*
* @return uint32_t : if stored in efuse(not 0)
* clock = ets_efuse_get_xtal_freq() * 1000000;
* else if analog_8M in efuse
* clock = ets_get_xtal_scale() * 625 / 16 * ets_efuse_get_8M_clock();
* else clock = 40M.
*/
uint32_t ets_get_xtal_freq(void);
/**
* @brief Get the apb divisor. The xtal frequency gets divided
* by this value to generate the APB clock.
* When any types of reset happens, the default value is 2.
*
* @param None
*
* @return uint32_t : 1 or 2.
*/
uint32_t ets_get_xtal_div(void);
/**
* @brief Modifies the apb divisor. The xtal frequency gets divided by this to
* generate the APB clock.
*
* @note The xtal frequency divisor is 2 by default as the glitch detector
* doesn't properly stop glitches when it is 1. Please do not set the
* divisor to 1 before the PLL is active without being aware that you
* may be introducing a security risk.
*
* @param div Divisor. 1 = xtal freq, 2 = 1/2th xtal freq.
*/
void ets_set_xtal_div(int div);
/**
* @brief Get apb_freq value, If value not stored in RTC_STORE5, than store.
*
* @param None
*
* @return uint32_t : if rtc store the value (RTC_STORE5 high 16 bits and low 16 bits with same value), read from rtc register.
* clock = (REG_READ(RTC_STORE5) & 0xffff) << 12;
* else store ets_get_detected_xtal_freq() in.
*/
uint32_t ets_get_apb_freq(void);
/**
* @}
*/
/** \defgroup ets_intr_apis, ets interrupt configure related apis
* @brief ets intr apis
*/
/** @addtogroup ets_intr_apis
* @{
*/
typedef void (* ets_isr_t)(void *);/**< interrupt handler type*/
/**
* @brief Attach a interrupt handler to a CPU interrupt number.
* This function equals to _xtos_set_interrupt_handler_arg(i, func, arg).
* In FreeRTOS, please call FreeRTOS apis, never call this api.
*
* @param int i : CPU interrupt number.
*
* @param ets_isr_t func : Interrupt handler.
*
* @param void *arg : argument of the handler.
*
* @return None
*/
void ets_isr_attach(int i, ets_isr_t func, void *arg);
/**
* @brief Mask the interrupts which show in mask bits.
* This function equals to _xtos_ints_off(mask).
* In FreeRTOS, please call FreeRTOS apis, never call this api.
*
* @param uint32_t mask : BIT(i) means mask CPU interrupt number i.
*
* @return None
*/
void ets_isr_mask(uint32_t mask);
/**
* @brief Unmask the interrupts which show in mask bits.
* This function equals to _xtos_ints_on(mask).
* In FreeRTOS, please call FreeRTOS apis, never call this api.
*
* @param uint32_t mask : BIT(i) means mask CPU interrupt number i.
*
* @return None
*/
void ets_isr_unmask(uint32_t unmask);
/**
* @brief Lock the interrupt to level 2.
* This function direct set the CPU registers.
* In FreeRTOS, please call FreeRTOS apis, never call this api.
*
* @param None
*
* @return None
*/
void ets_intr_lock(void);
/**
* @brief Unlock the interrupt to level 0.
* This function direct set the CPU registers.
* In FreeRTOS, please call FreeRTOS apis, never call this api.
*
* @param None
*
* @return None
*/
void ets_intr_unlock(void);
/**
* @brief Unlock the interrupt to level 0, and CPU will go into power save mode(wait interrupt).
* This function direct set the CPU registers.
* In FreeRTOS, please call FreeRTOS apis, never call this api.
*
* @param None
*
* @return None
*/
void ets_waiti0(void);
/**
* @brief Attach an CPU interrupt to a hardware source.
* We have 4 steps to use an interrupt:
* 1.Attach hardware interrupt source to CPU. intr_matrix_set(0, ETS_WIFI_MAC_INTR_SOURCE, ETS_WMAC_INUM);
* 2.Set interrupt handler. xt_set_interrupt_handler(ETS_WMAC_INUM, func, NULL);
* 3.Enable interrupt for CPU. xt_ints_on(1 << ETS_WMAC_INUM);
* 4.Enable interrupt in the module.
*
* @param int cpu_no : The CPU which the interrupt number belongs.
*
* @param uint32_t model_num : The interrupt hardware source number, please see the interrupt hardware source table.
*
* @param uint32_t intr_num : The interrupt number CPU, please see the interrupt cpu using table.
*
* @return None
*/
void intr_matrix_set(int cpu_no, uint32_t model_num, uint32_t intr_num);
#define _ETSTR(v) # v
#define _ETS_SET_INTLEVEL(intlevel) ({ unsigned __tmp; \
__asm__ __volatile__( "rsil %0, " _ETSTR(intlevel) "\n" \
: "=a" (__tmp) : : "memory" ); \
})
#ifdef CONFIG_NONE_OS
#define ETS_INTR_LOCK() \
ets_intr_lock()
#define ETS_INTR_UNLOCK() \
ets_intr_unlock()
#define ETS_ISR_ATTACH \
ets_isr_attach
#define ETS_INTR_ENABLE(inum) \
ets_isr_unmask((1<<inum))
#define ETS_INTR_DISABLE(inum) \
ets_isr_mask((1<<inum))
#define ETS_WMAC_INTR_ATTACH(func, arg) \
ETS_ISR_ATTACH(ETS_WMAC_INUM, (func), (void *)(arg))
#define ETS_TG0_T0_INTR_ATTACH(func, arg) \
ETS_ISR_ATTACH(ETS_TG0_T0_INUM, (func), (void *)(arg))
#define ETS_GPIO_INTR_ATTACH(func, arg) \
ETS_ISR_ATTACH(ETS_GPIO_INUM, (func), (void *)(arg))
#define ETS_UART0_INTR_ATTACH(func, arg) \
ETS_ISR_ATTACH(ETS_UART0_INUM, (func), (void *)(arg))
#define ETS_WDT_INTR_ATTACH(func, arg) \
ETS_ISR_ATTACH(ETS_WDT_INUM, (func), (void *)(arg))
#define ETS_SLC_INTR_ATTACH(func, arg) \
ETS_ISR_ATTACH(ETS_SLC_INUM, (func), (void *)(arg))
#define ETS_BB_INTR_ENABLE() \
ETS_INTR_ENABLE(ETS_BB_INUM)
#define ETS_BB_INTR_DISABLE() \
ETS_INTR_DISABLE(ETS_BB_INUM)
#define ETS_UART0_INTR_ENABLE() \
ETS_INTR_ENABLE(ETS_UART0_INUM)
#define ETS_UART0_INTR_DISABLE() \
ETS_INTR_DISABLE(ETS_UART0_INUM)
#define ETS_GPIO_INTR_ENABLE() \
ETS_INTR_ENABLE(ETS_GPIO_INUM)
#define ETS_GPIO_INTR_DISABLE() \
ETS_INTR_DISABLE(ETS_GPIO_INUM)
#define ETS_WDT_INTR_ENABLE() \
ETS_INTR_ENABLE(ETS_WDT_INUM)
#define ETS_WDT_INTR_DISABLE() \
ETS_INTR_DISABLE(ETS_WDT_INUM)
#define ETS_TG0_T0_INTR_ENABLE() \
ETS_INTR_ENABLE(ETS_TG0_T0_INUM)
#define ETS_TG0_T0_INTR_DISABLE() \
ETS_INTR_DISABLE(ETS_TG0_T0_INUM)
#define ETS_SLC_INTR_ENABLE() \
ETS_INTR_ENABLE(ETS_SLC_INUM)
#define ETS_SLC_INTR_DISABLE() \
ETS_INTR_DISABLE(ETS_SLC_INUM)
#endif
/**
* @}
*/
#ifndef MAC2STR
#define MAC2STR(a) (a)[0], (a)[1], (a)[2], (a)[3], (a)[4], (a)[5]
#define MACSTR "%02x:%02x:%02x:%02x:%02x:%02x"
#endif
#define ETS_MEM_BAR() asm volatile ( "" : : : "memory" )
typedef enum {
OK = 0,
FAIL,
PENDING,
BUSY,
CANCEL,
} STATUS;
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* _ROM_ETS_SYS_H_ */

320
tools/sdk/esp32/include/esp_rom/include/esp32s2/rom/gpio.h Normal file
View File

@ -0,0 +1,320 @@
// Copyright 2010-2016 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#ifndef _ROM_GPIO_H_
#define _ROM_GPIO_H_
#include <stdint.h>
#include <stdbool.h>
#include "esp_attr.h"
#include "soc/gpio_reg.h"
#ifdef __cplusplus
extern "C" {
#endif
/** \defgroup gpio_apis, uart configuration and communication related apis
* @brief gpio apis
*/
/** @addtogroup gpio_apis
* @{
*/
#define GPIO_REG_READ(reg) READ_PERI_REG(reg)
#define GPIO_REG_WRITE(reg, val) WRITE_PERI_REG(reg, val)
#define GPIO_ID_PIN0 0
#define GPIO_ID_PIN(n) (GPIO_ID_PIN0+(n))
#define GPIO_PIN_ADDR(i) (GPIO_PIN0_REG + i*4)
#define GPIO_FUNC_IN_HIGH 0x38
#define GPIO_FUNC_IN_LOW 0x3C
#define GPIO_ID_IS_PIN_REGISTER(reg_id) \
((reg_id >= GPIO_ID_PIN0) && (reg_id <= GPIO_ID_PIN(GPIO_PIN_COUNT-1)))
#define GPIO_REGID_TO_PINIDX(reg_id) ((reg_id) - GPIO_ID_PIN0)
typedef enum {
GPIO_PIN_INTR_DISABLE = 0,
GPIO_PIN_INTR_POSEDGE = 1,
GPIO_PIN_INTR_NEGEDGE = 2,
GPIO_PIN_INTR_ANYEDGE = 3,
GPIO_PIN_INTR_LOLEVEL = 4,
GPIO_PIN_INTR_HILEVEL = 5
} GPIO_INT_TYPE;
#define GPIO_OUTPUT_SET(gpio_no, bit_value) \
((gpio_no < 32) ? gpio_output_set(bit_value<<gpio_no, (bit_value ? 0 : 1)<<gpio_no, 1<<gpio_no,0) : \
gpio_output_set_high(bit_value<<(gpio_no - 32), (bit_value ? 0 : 1)<<(gpio_no - 32), 1<<(gpio_no -32),0))
#define GPIO_DIS_OUTPUT(gpio_no) ((gpio_no < 32) ? gpio_output_set(0,0,0, 1<<gpio_no) : gpio_output_set_high(0,0,0, 1<<(gpio_no - 32)))
#define GPIO_INPUT_GET(gpio_no) ((gpio_no < 32) ? ((gpio_input_get()>>gpio_no)&BIT0) : ((gpio_input_get_high()>>(gpio_no - 32))&BIT0))
/* GPIO interrupt handler, registered through gpio_intr_handler_register */
typedef void (* gpio_intr_handler_fn_t)(uint32_t intr_mask, bool high, void *arg);
/**
* @brief Initialize GPIO. This includes reading the GPIO Configuration DataSet
* to initialize "output enables" and pin configurations for each gpio pin.
* Please do not call this function in SDK.
*
* @param None
*
* @return None
*/
void gpio_init(void);
/**
* @brief Change GPIO(0-31) pin output by setting, clearing, or disabling pins, GPIO0<->BIT(0).
* There is no particular ordering guaranteed; so if the order of writes is significant,
* calling code should divide a single call into multiple calls.
*
* @param uint32_t set_mask : the gpios that need high level.
*
* @param uint32_t clear_mask : the gpios that need low level.
*
* @param uint32_t enable_mask : the gpios that need be changed.
*
* @param uint32_t disable_mask : the gpios that need diable output.
*
* @return None
*/
void gpio_output_set(uint32_t set_mask, uint32_t clear_mask, uint32_t enable_mask, uint32_t disable_mask);
/**
* @brief Change GPIO(32-39) pin output by setting, clearing, or disabling pins, GPIO32<->BIT(0).
* There is no particular ordering guaranteed; so if the order of writes is significant,
* calling code should divide a single call into multiple calls.
*
* @param uint32_t set_mask : the gpios that need high level.
*
* @param uint32_t clear_mask : the gpios that need low level.
*
* @param uint32_t enable_mask : the gpios that need be changed.
*
* @param uint32_t disable_mask : the gpios that need diable output.
*
* @return None
*/
void gpio_output_set_high(uint32_t set_mask, uint32_t clear_mask, uint32_t enable_mask, uint32_t disable_mask);
/**
* @brief Sample the value of GPIO input pins(0-31) and returns a bitmask.
*
* @param None
*
* @return uint32_t : bitmask for GPIO input pins, BIT(0) for GPIO0.
*/
uint32_t gpio_input_get(void);
/**
* @brief Sample the value of GPIO input pins(32-39) and returns a bitmask.
*
* @param None
*
* @return uint32_t : bitmask for GPIO input pins, BIT(0) for GPIO32.
*/
uint32_t gpio_input_get_high(void);
/**
* @brief Register an application-specific interrupt handler for GPIO pin interrupts.
* Once the interrupt handler is called, it will not be called again until after a call to gpio_intr_ack.
* Please do not call this function in SDK.
*
* @param gpio_intr_handler_fn_t fn : gpio application-specific interrupt handler
*
* @param void *arg : gpio application-specific interrupt handler argument.
*
* @return None
*/
void gpio_intr_handler_register(gpio_intr_handler_fn_t fn, void *arg);
/**
* @brief Get gpio interrupts which happens but not processed.
* Please do not call this function in SDK.
*
* @param None
*
* @return uint32_t : bitmask for GPIO pending interrupts, BIT(0) for GPIO0.
*/
uint32_t gpio_intr_pending(void);
/**
* @brief Get gpio interrupts which happens but not processed.
* Please do not call this function in SDK.
*
* @param None
*
* @return uint32_t : bitmask for GPIO pending interrupts, BIT(0) for GPIO32.
*/
uint32_t gpio_intr_pending_high(void);
/**
* @brief Ack gpio interrupts to process pending interrupts.
* Please do not call this function in SDK.
*
* @param uint32_t ack_mask: bitmask for GPIO ack interrupts, BIT(0) for GPIO0.
*
* @return None
*/
void gpio_intr_ack(uint32_t ack_mask);
/**
* @brief Ack gpio interrupts to process pending interrupts.
* Please do not call this function in SDK.
*
* @param uint32_t ack_mask: bitmask for GPIO ack interrupts, BIT(0) for GPIO32.
*
* @return None
*/
void gpio_intr_ack_high(uint32_t ack_mask);
/**
* @brief Set GPIO to wakeup the ESP32.
* Please do not call this function in SDK.
*
* @param uint32_t i: gpio number.
*
* @param GPIO_INT_TYPE intr_state : only GPIO_PIN_INTR_LOLEVEL\GPIO_PIN_INTR_HILEVEL can be used
*
* @return None
*/
void gpio_pin_wakeup_enable(uint32_t i, GPIO_INT_TYPE intr_state);
/**
* @brief disable GPIOs to wakeup the ESP32.
* Please do not call this function in SDK.
*
* @param None
*
* @return None
*/
void gpio_pin_wakeup_disable(void);
/**
* @brief set gpio input to a signal, one gpio can input to several signals.
*
* @param uint32_t gpio : gpio number, 0~0x2f
* gpio == 0x3C, input 0 to signal
* gpio == 0x3A, input nothing to signal
* gpio == 0x38, input 1 to signal
*
* @param uint32_t signal_idx : signal index.
*
* @param bool inv : the signal is inv or not
*
* @return None
*/
void gpio_matrix_in(uint32_t gpio, uint32_t signal_idx, bool inv);
/**
* @brief set signal output to gpio, one signal can output to several gpios.
*
* @param uint32_t gpio : gpio number, 0~0x2f
*
* @param uint32_t signal_idx : signal index.
* signal_idx == 0x100, cancel output put to the gpio
*
* @param bool out_inv : the signal output is invert or not
*
* @param bool oen_inv : the signal output enable is invert or not
*
* @return None
*/
void gpio_matrix_out(uint32_t gpio, uint32_t signal_idx, bool out_inv, bool oen_inv);
/**
* @brief Select pad as a gpio function from IOMUX.
*
* @param uint32_t gpio_num : gpio number, 0~0x2f
*
* @return None
*/
void gpio_pad_select_gpio(uint32_t gpio_num);
/**
* @brief Set pad driver capability.
*
* @param uint32_t gpio_num : gpio number, 0~0x2f
*
* @param uint32_t drv : 0-3
*
* @return None
*/
void gpio_pad_set_drv(uint32_t gpio_num, uint32_t drv);
/**
* @brief Pull up the pad from gpio number.
*
* @param uint32_t gpio_num : gpio number, 0~0x2f
*
* @return None
*/
void gpio_pad_pullup(uint32_t gpio_num);
/**
* @brief Pull down the pad from gpio number.
*
* @param uint32_t gpio_num : gpio number, 0~0x2f
*
* @return None
*/
void gpio_pad_pulldown(uint32_t gpio_num);
/**
* @brief Unhold the pad from gpio number.
*
* @param uint32_t gpio_num : gpio number, 0~0x2f
*
* @return None
*/
void gpio_pad_unhold(uint32_t gpio_num);
/**
* @brief Hold the pad from gpio number.
*
* @param uint32_t gpio_num : gpio number, 0~0x2f
*
* @return None
*/
void gpio_pad_hold(uint32_t gpio_num);
/**
* @brief enable gpio pad input.
*
* @param uint32_t gpio_num : gpio number, 0~0x2f
*
* @return None
*/
void gpio_pad_input_enable(uint32_t gpio_num);
/**
* @brief disable gpio pad input.
*
* @param uint32_t gpio_num : gpio number, 0~0x2f
*
* @return None
*/
void gpio_pad_input_disable(uint32_t gpio_num);
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* _ROM_GPIO_H_ */

63
tools/sdk/esp32/include/esp_rom/include/esp32s2/rom/hmac.h Normal file
View File

@ -0,0 +1,63 @@
// Copyright 2018 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#ifndef _ROM_HMAC_H_
#define _ROM_HMAC_H_
#ifdef __cplusplus
extern "C" {
#endif
#include <stdint.h>
#include <stdlib.h>
#include "efuse.h"
void ets_hmac_enable(void);
void ets_hmac_disable(void);
/* Use the "upstream" HMAC key (ETS_EFUSE_KEY_PURPOSE_HMAC_UP)
to digest a message.
*/
int ets_hmac_calculate_message(ets_efuse_block_t key_block, const void *message, size_t message_len, uint8_t *hmac);
/* Calculate a downstream HMAC message to temporarily enable JTAG, or
to generate a Digital Signature data decryption key.
- purpose must be ETS_EFUSE_KEY_PURPOSE_HMAC_DOWN_DIGITAL_SIGNATURE
or ETS_EFUSE_KEY_PURPOSE_HMAC_DOWN_JTAG
- key_block must be in range ETS_EFUSE_BLOCK_KEY0 toETS_EFUSE_BLOCK_KEY6.
This efuse block must have the corresponding purpose set in "purpose", or
ETS_EFUSE_KEY_PURPOSE_HMAC_DOWN_ALL.
The result of this HMAC calculation is only made available "downstream" to the
corresponding hardware module, and cannot be accessed by software.
*/
int ets_hmac_calculate_downstream(ets_efuse_block_t key_block, ets_efuse_purpose_t purpose);
/* Invalidate a downstream HMAC value previously calculated by ets_hmac_calculate_downstream().
*
* - purpose must match a previous call to ets_hmac_calculate_downstream().
*
* After this function is called, the corresponding internal operation (JTAG or DS) will no longer
* have access to the generated key.
*/
int ets_hmac_invalidate_downstream(ets_efuse_purpose_t purpose);
#ifdef __cplusplus
}
#endif
#endif // _ROM_HMAC_H_

88
tools/sdk/esp32/include/esp_rom/include/esp32s2/rom/libc_stubs.h Normal file
View File

@ -0,0 +1,88 @@
// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#ifndef _ROM_LIBC_STUBS_H_
#define _ROM_LIBC_STUBS_H_
#include <stddef.h>
#include <stdint.h>
#include <stdio.h>
#include <stdarg.h>
#include <reent.h>
#include <errno.h>
#ifdef __cplusplus
extern "C" {
#endif
/*
ESP32-S2 ROM code contains implementations of some of C library functions.
Whenever a function in ROM needs to use a syscall, it calls a pointer to the corresponding syscall
implementation defined in the following struct.
The table itself, by default, is not allocated in RAM. There is a pointer, `syscall_table_ptr_pro`,
which can be set to point to the locations of syscall tables of CPU 0 (aka PRO CPU).
Location of this pointer in .bss segment of ROM code is defined in linker script.
So, before using any of the C library functions (except for pure functions and memcpy/memset functions),
application must allocate syscall table structure for each CPU being used, and populate it with pointers
to actual implementations of corresponding syscalls.
*/
struct syscall_stub_table
{
struct _reent* (*__getreent)(void);
void* (*_malloc_r)(struct _reent *r, size_t);
void (*_free_r)(struct _reent *r, void*);
void* (*_realloc_r)(struct _reent *r, void*, size_t);
void* (*_calloc_r)(struct _reent *r, size_t, size_t);
void (*_abort)(void);
int (*_system_r)(struct _reent *r, const char*);
int (*_rename_r)(struct _reent *r, const char*, const char*);
clock_t (*_times_r)(struct _reent *r, struct tms *);
int (*_gettimeofday_r) (struct _reent *r, struct timeval *, void *);
void (*_raise_r)(struct _reent *r);
int (*_unlink_r)(struct _reent *r, const char*);
int (*_link_r)(struct _reent *r, const char*, const char*);
int (*_stat_r)(struct _reent *r, const char*, struct stat *);
int (*_fstat_r)(struct _reent *r, int, struct stat *);
void* (*_sbrk_r)(struct _reent *r, ptrdiff_t);
int (*_getpid_r)(struct _reent *r);
int (*_kill_r)(struct _reent *r, int, int);
void (*_exit_r)(struct _reent *r, int);
int (*_close_r)(struct _reent *r, int);
int (*_open_r)(struct _reent *r, const char *, int, int);
int (*_write_r)(struct _reent *r, int, const void *, int);
int (*_lseek_r)(struct _reent *r, int, int, int);
int (*_read_r)(struct _reent *r, int, void *, int);
void (*_lock_init)(_lock_t *lock);
void (*_lock_init_recursive)(_lock_t *lock);
void (*_lock_close)(_lock_t *lock);
void (*_lock_close_recursive)(_lock_t *lock);
void (*_lock_acquire)(_lock_t *lock);
void (*_lock_acquire_recursive)(_lock_t *lock);
int (*_lock_try_acquire)(_lock_t *lock);
int (*_lock_try_acquire_recursive)(_lock_t *lock);
void (*_lock_release)(_lock_t *lock);
void (*_lock_release_recursive)(_lock_t *lock);
int (*_printf_float)(struct _reent *data, void *pdata, FILE * fp, int (*pfunc) (struct _reent *, FILE *, const char *, size_t len), va_list * ap);
int (*_scanf_float) (struct _reent *rptr, void *pdata, FILE *fp, va_list *ap);
};
extern struct syscall_stub_table* syscall_table_ptr_pro;
#ifdef __cplusplus
} // extern "C"
#endif
#endif /* _ROM_LIBC_STUBS_H_ */

176
tools/sdk/esp32/include/esp_rom/include/esp32s2/rom/lldesc.h Normal file
View File

@ -0,0 +1,176 @@
// Copyright 2010-2016 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#ifndef _ROM_LLDESC_H_
#define _ROM_LLDESC_H_
#include <stdint.h>
#include "sys/queue.h"
#ifdef __cplusplus
extern "C" {
#endif
#define LLDESC_TX_MBLK_SIZE 268 /* */
#define LLDESC_RX_SMBLK_SIZE 64 /* small block size, for small mgmt frame */
#define LLDESC_RX_MBLK_SIZE 524 /* rx is large sinec we want to contain mgmt frame in one block*/
#define LLDESC_RX_AMPDU_ENTRY_MBLK_SIZE 64 /* it is a small buffer which is a cycle link*/
#define LLDESC_RX_AMPDU_LEN_MBLK_SIZE 256 /*for ampdu entry*/
#ifdef ESP_MAC_5
#define LLDESC_TX_MBLK_NUM 116 /* 64K / 256 */
#define LLDESC_RX_MBLK_NUM 82 /* 64K / 512 MAX 172*/
#define LLDESC_RX_AMPDU_ENTRY_MBLK_NUM 4
#define LLDESC_RX_AMPDU_LEN_MLBK_NUM 12
#else
#ifdef SBUF_RXTX
#define LLDESC_TX_MBLK_NUM_MAX (2 * 48) /* 23K / 260 - 8 */
#define LLDESC_RX_MBLK_NUM_MAX (2 * 48) /* 23K / 524 */
#define LLDESC_TX_MBLK_NUM_MIN (2 * 16) /* 23K / 260 - 8 */
#define LLDESC_RX_MBLK_NUM_MIN (2 * 16) /* 23K / 524 */
#endif
#define LLDESC_TX_MBLK_NUM 10 //(2 * 32) /* 23K / 260 - 8 */
#ifdef IEEE80211_RX_AMPDU
#define LLDESC_RX_MBLK_NUM 30
#else
#define LLDESC_RX_MBLK_NUM 10
#endif /*IEEE80211_RX_AMPDU*/
#define LLDESC_RX_AMPDU_ENTRY_MBLK_NUM 4
#define LLDESC_RX_AMPDU_LEN_MLBK_NUM 8
#endif /* !ESP_MAC_5 */
/*
* SLC2 DMA Desc struct, aka lldesc_t
*
* --------------------------------------------------------------
* | own | EoF | sub_sof | 5'b0 | length [11:0] | size [11:0] |
* --------------------------------------------------------------
* | buf_ptr [31:0] |
* --------------------------------------------------------------
* | next_desc_ptr [31:0] |
* --------------------------------------------------------------
*/
/* this bitfield is start from the LSB!!! */
typedef struct lldesc_s {
volatile uint32_t size :12,
length:12,
offset: 5, /* h/w reserved 5bit, s/w use it as offset in buffer */
sosf : 1, /* start of sub-frame */
eof : 1, /* end of frame */
owner : 1; /* hw or sw */
volatile const uint8_t *buf; /* point to buffer data */
union{
volatile uint32_t empty;
STAILQ_ENTRY(lldesc_s) qe; /* pointing to the next desc */
};
} lldesc_t;
typedef struct tx_ampdu_entry_s{
uint32_t sub_len :12,
dili_num : 7,
: 1,
null_byte: 2,
data : 1,
enc : 1,
seq : 8;
} tx_ampdu_entry_t;
typedef struct lldesc_chain_s {
lldesc_t *head;
lldesc_t *tail;
} lldesc_chain_t;
#ifdef SBUF_RXTX
enum sbuf_mask_s {
SBUF_MOVE_NO = 0,
SBUF_MOVE_TX2RX,
SBUF_MOVE_RX2TX,
} ;
#define SBUF_MOVE_STEP 8
#endif
#define LLDESC_SIZE sizeof(struct lldesc_s)
/* SLC Descriptor */
#define LLDESC_OWNER_MASK 0x80000000
#define LLDESC_OWNER_SHIFT 31
#define LLDESC_SW_OWNED 0
#define LLDESC_HW_OWNED 1
#define LLDESC_EOF_MASK 0x40000000
#define LLDESC_EOF_SHIFT 30
#define LLDESC_SOSF_MASK 0x20000000
#define LLDESC_SOSF_SHIFT 29
#define LLDESC_LENGTH_MASK 0x00fff000
#define LLDESC_LENGTH_SHIFT 12
#define LLDESC_SIZE_MASK 0x00000fff
#define LLDESC_SIZE_SHIFT 0
#define LLDESC_ADDR_MASK 0x000fffff
void lldesc_build_chain(uint8_t *descptr, uint32_t desclen, uint8_t * mblkptr, uint32_t buflen, uint32_t blksz, uint8_t owner,
lldesc_t **head,
#ifdef TO_HOST_RESTART
lldesc_t ** one_before_tail,
#endif
lldesc_t **tail);
lldesc_t *lldesc_num2link(lldesc_t * head, uint16_t nblks);
lldesc_t *lldesc_set_owner(lldesc_t * head, uint16_t nblks, uint8_t owner);
static inline uint32_t lldesc_get_chain_length(lldesc_t *head)
{
lldesc_t *ds = head;
uint32_t len = 0;
while (ds) {
len += ds->length;
ds = STAILQ_NEXT(ds, qe);
}
return len;
}
static inline void lldesc_config(lldesc_t *ds, uint8_t owner, uint8_t eof, uint8_t sosf, uint16_t len)
{
ds->owner = owner;
ds->eof = eof;
ds->sosf = sosf;
ds->length = len;
}
#define LLDESC_CONFIG(_desc, _owner, _eof, _sosf, _len) do { \
(_desc)->owner = (_owner); \
(_desc)->eof = (_eof); \
(_desc)->sosf = (_sosf); \
(_desc)->length = (_len); \
} while(0)
#define LLDESC_FROM_HOST_CLEANUP(ds) LLDESC_CONFIG((ds), LLDESC_HW_OWNED, 0, 0, 0)
#define LLDESC_MAC_RX_CLEANUP(ds) LLDESC_CONFIG((ds), LLDESC_HW_OWNED, 0, 0, (ds)->size)
#define LLDESC_TO_HOST_CLEANUP(ds) LLDESC_CONFIG((ds), LLDESC_HW_OWNED, 0, 0, 0)
#ifdef __cplusplus
}
#endif
#endif /* _ROM_LLDESC_H_ */

38
tools/sdk/esp32/include/esp_rom/include/esp32s2/rom/md5_hash.h Normal file
View File

@ -0,0 +1,38 @@
/*
* MD5 internal definitions
* Copyright (c) 2003-2005, Jouni Malinen <j@w1.fi>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* Alternatively, this software may be distributed under the terms of BSD
* license.
*
* See README and COPYING for more details.
*/
#ifndef _ROM_MD5_HASH_H_
#define _ROM_MD5_HASH_H_
#include <stdint.h>
#ifdef __cplusplus
extern "C" {
#endif
struct MD5Context {
uint32_t buf[4];
uint32_t bits[2];
uint8_t in[64];
};
void MD5Init(struct MD5Context *context);
void MD5Update(struct MD5Context *context, unsigned char const *buf, unsigned len);
void MD5Final(unsigned char digest[16], struct MD5Context *context);
#ifdef __cplusplus
}
#endif
#endif /* _ROM_MD5_HASH_H_ */

776
tools/sdk/esp32/include/esp_rom/include/esp32s2/rom/miniz.h Normal file
View File

@ -0,0 +1,776 @@
#ifndef MINIZ_HEADER_INCLUDED
#define MINIZ_HEADER_INCLUDED
#include <stdlib.h>
// Defines to completely disable specific portions of miniz.c:
// If all macros here are defined the only functionality remaining will be CRC-32, adler-32, tinfl, and tdefl.
// Define MINIZ_NO_STDIO to disable all usage and any functions which rely on stdio for file I/O.
#define MINIZ_NO_STDIO
// If MINIZ_NO_TIME is specified then the ZIP archive functions will not be able to get the current time, or
// get/set file times, and the C run-time funcs that get/set times won't be called.
// The current downside is the times written to your archives will be from 1979.
#define MINIZ_NO_TIME
// Define MINIZ_NO_ARCHIVE_APIS to disable all ZIP archive API's.
#define MINIZ_NO_ARCHIVE_APIS
// Define MINIZ_NO_ARCHIVE_APIS to disable all writing related ZIP archive API's.
#define MINIZ_NO_ARCHIVE_WRITING_APIS
// Define MINIZ_NO_ZLIB_APIS to remove all ZLIB-style compression/decompression API's.
#define MINIZ_NO_ZLIB_APIS
// Define MINIZ_NO_ZLIB_COMPATIBLE_NAME to disable zlib names, to prevent conflicts against stock zlib.
#define MINIZ_NO_ZLIB_COMPATIBLE_NAMES
// Define MINIZ_NO_MALLOC to disable all calls to malloc, free, and realloc.
// Note if MINIZ_NO_MALLOC is defined then the user must always provide custom user alloc/free/realloc
// callbacks to the zlib and archive API's, and a few stand-alone helper API's which don't provide custom user
// functions (such as tdefl_compress_mem_to_heap() and tinfl_decompress_mem_to_heap()) won't work.
#define MINIZ_NO_MALLOC
#if defined(__TINYC__) && (defined(__linux) || defined(__linux__))
// TODO: Work around "error: include file 'sys\utime.h' when compiling with tcc on Linux
#define MINIZ_NO_TIME
#endif
#if !defined(MINIZ_NO_TIME) && !defined(MINIZ_NO_ARCHIVE_APIS)
#include <time.h>
#endif
//Hardcoded options for Xtensa - JD
#define MINIZ_X86_OR_X64_CPU 0
#define MINIZ_LITTLE_ENDIAN 1
#define MINIZ_USE_UNALIGNED_LOADS_AND_STORES 0
#define MINIZ_HAS_64BIT_REGISTERS 0
#define TINFL_USE_64BIT_BITBUF 0
#if defined(_M_IX86) || defined(_M_X64) || defined(__i386__) || defined(__i386) || defined(__i486__) || defined(__i486) || defined(i386) || defined(__ia64__) || defined(__x86_64__)
// MINIZ_X86_OR_X64_CPU is only used to help set the below macros.
#define MINIZ_X86_OR_X64_CPU 1
#endif
#if (__BYTE_ORDER__==__ORDER_LITTLE_ENDIAN__) || MINIZ_X86_OR_X64_CPU
// Set MINIZ_LITTLE_ENDIAN to 1 if the processor is little endian.
#define MINIZ_LITTLE_ENDIAN 1
#endif
#if MINIZ_X86_OR_X64_CPU
// Set MINIZ_USE_UNALIGNED_LOADS_AND_STORES to 1 on CPU's that permit efficient integer loads and stores from unaligned addresses.
#define MINIZ_USE_UNALIGNED_LOADS_AND_STORES 1
#endif
#if defined(_M_X64) || defined(_WIN64) || defined(__MINGW64__) || defined(_LP64) || defined(__LP64__) || defined(__ia64__) || defined(__x86_64__)
// Set MINIZ_HAS_64BIT_REGISTERS to 1 if operations on 64-bit integers are reasonably fast (and don't involve compiler generated calls to helper functions).
#define MINIZ_HAS_64BIT_REGISTERS 1
#endif
#ifdef __cplusplus
extern "C" {
#endif
// ------------------- zlib-style API Definitions.
// For more compatibility with zlib, miniz.c uses unsigned long for some parameters/struct members. Beware: mz_ulong can be either 32 or 64-bits!
typedef unsigned long mz_ulong;
// mz_free() internally uses the MZ_FREE() macro (which by default calls free() unless you've modified the MZ_MALLOC macro) to release a block allocated from the heap.
void mz_free(void *p);
#define MZ_ADLER32_INIT (1)
// mz_adler32() returns the initial adler-32 value to use when called with ptr==NULL.
mz_ulong mz_adler32(mz_ulong adler, const unsigned char *ptr, size_t buf_len);
#define MZ_CRC32_INIT (0)
// mz_crc32() returns the initial CRC-32 value to use when called with ptr==NULL.
mz_ulong mz_crc32(mz_ulong crc, const unsigned char *ptr, size_t buf_len);
// Compression strategies.
enum { MZ_DEFAULT_STRATEGY = 0, MZ_FILTERED = 1, MZ_HUFFMAN_ONLY = 2, MZ_RLE = 3, MZ_FIXED = 4 };
// Method
#define MZ_DEFLATED 8
#ifndef MINIZ_NO_ZLIB_APIS
// Heap allocation callbacks.
// Note that mz_alloc_func parameter types purpsosely differ from zlib's: items/size is size_t, not unsigned long.
typedef void *(*mz_alloc_func)(void *opaque, size_t items, size_t size);
typedef void (*mz_free_func)(void *opaque, void *address);
typedef void *(*mz_realloc_func)(void *opaque, void *address, size_t items, size_t size);
#define MZ_VERSION "9.1.15"
#define MZ_VERNUM 0x91F0
#define MZ_VER_MAJOR 9
#define MZ_VER_MINOR 1
#define MZ_VER_REVISION 15
#define MZ_VER_SUBREVISION 0
// Flush values. For typical usage you only need MZ_NO_FLUSH and MZ_FINISH. The other values are for advanced use (refer to the zlib docs).
enum { MZ_NO_FLUSH = 0, MZ_PARTIAL_FLUSH = 1, MZ_SYNC_FLUSH = 2, MZ_FULL_FLUSH = 3, MZ_FINISH = 4, MZ_BLOCK = 5 };
// Return status codes. MZ_PARAM_ERROR is non-standard.
enum { MZ_OK = 0, MZ_STREAM_END = 1, MZ_NEED_DICT = 2, MZ_ERRNO = -1, MZ_STREAM_ERROR = -2, MZ_DATA_ERROR = -3, MZ_MEM_ERROR = -4, MZ_BUF_ERROR = -5, MZ_VERSION_ERROR = -6, MZ_PARAM_ERROR = -10000 };
// Compression levels: 0-9 are the standard zlib-style levels, 10 is best possible compression (not zlib compatible, and may be very slow), MZ_DEFAULT_COMPRESSION=MZ_DEFAULT_LEVEL.
enum { MZ_NO_COMPRESSION = 0, MZ_BEST_SPEED = 1, MZ_BEST_COMPRESSION = 9, MZ_UBER_COMPRESSION = 10, MZ_DEFAULT_LEVEL = 6, MZ_DEFAULT_COMPRESSION = -1 };
// Window bits
#define MZ_DEFAULT_WINDOW_BITS 15
struct mz_internal_state;
// Compression/decompression stream struct.
typedef struct mz_stream_s
{
const unsigned char *next_in; // pointer to next byte to read
unsigned int avail_in; // number of bytes available at next_in
mz_ulong total_in; // total number of bytes consumed so far
unsigned char *next_out; // pointer to next byte to write
unsigned int avail_out; // number of bytes that can be written to next_out
mz_ulong total_out; // total number of bytes produced so far
char *msg; // error msg (unused)
struct mz_internal_state *state; // internal state, allocated by zalloc/zfree
mz_alloc_func zalloc; // optional heap allocation function (defaults to malloc)
mz_free_func zfree; // optional heap free function (defaults to free)
void *opaque; // heap alloc function user pointer
int data_type; // data_type (unused)
mz_ulong adler; // adler32 of the source or uncompressed data
mz_ulong reserved; // not used
} mz_stream;
typedef mz_stream *mz_streamp;
// Returns the version string of miniz.c.
const char *mz_version(void);
// mz_deflateInit() initializes a compressor with default options:
// Parameters:
// pStream must point to an initialized mz_stream struct.
// level must be between [MZ_NO_COMPRESSION, MZ_BEST_COMPRESSION].
// level 1 enables a specially optimized compression function that's been optimized purely for performance, not ratio.
// (This special func. is currently only enabled when MINIZ_USE_UNALIGNED_LOADS_AND_STORES and MINIZ_LITTLE_ENDIAN are defined.)
// Return values:
// MZ_OK on success.
// MZ_STREAM_ERROR if the stream is bogus.
// MZ_PARAM_ERROR if the input parameters are bogus.
// MZ_MEM_ERROR on out of memory.
int mz_deflateInit(mz_streamp pStream, int level);
// mz_deflateInit2() is like mz_deflate(), except with more control:
// Additional parameters:
// method must be MZ_DEFLATED
// window_bits must be MZ_DEFAULT_WINDOW_BITS (to wrap the deflate stream with zlib header/adler-32 footer) or -MZ_DEFAULT_WINDOW_BITS (raw deflate/no header or footer)
// mem_level must be between [1, 9] (it's checked but ignored by miniz.c)
int mz_deflateInit2(mz_streamp pStream, int level, int method, int window_bits, int mem_level, int strategy);
// Quickly resets a compressor without having to reallocate anything. Same as calling mz_deflateEnd() followed by mz_deflateInit()/mz_deflateInit2().
int mz_deflateReset(mz_streamp pStream);
// mz_deflate() compresses the input to output, consuming as much of the input and producing as much output as possible.
// Parameters:
// pStream is the stream to read from and write to. You must initialize/update the next_in, avail_in, next_out, and avail_out members.
// flush may be MZ_NO_FLUSH, MZ_PARTIAL_FLUSH/MZ_SYNC_FLUSH, MZ_FULL_FLUSH, or MZ_FINISH.
// Return values:
// MZ_OK on success (when flushing, or if more input is needed but not available, and/or there's more output to be written but the output buffer is full).
// MZ_STREAM_END if all input has been consumed and all output bytes have been written. Don't call mz_deflate() on the stream anymore.
// MZ_STREAM_ERROR if the stream is bogus.
// MZ_PARAM_ERROR if one of the parameters is invalid.
// MZ_BUF_ERROR if no forward progress is possible because the input and/or output buffers are empty. (Fill up the input buffer or free up some output space and try again.)
int mz_deflate(mz_streamp pStream, int flush);
// mz_deflateEnd() deinitializes a compressor:
// Return values:
// MZ_OK on success.
// MZ_STREAM_ERROR if the stream is bogus.
int mz_deflateEnd(mz_streamp pStream);
// mz_deflateBound() returns a (very) conservative upper bound on the amount of data that could be generated by deflate(), assuming flush is set to only MZ_NO_FLUSH or MZ_FINISH.
mz_ulong mz_deflateBound(mz_streamp pStream, mz_ulong source_len);
// Single-call compression functions mz_compress() and mz_compress2():
// Returns MZ_OK on success, or one of the error codes from mz_deflate() on failure.
int mz_compress(unsigned char *pDest, mz_ulong *pDest_len, const unsigned char *pSource, mz_ulong source_len);
int mz_compress2(unsigned char *pDest, mz_ulong *pDest_len, const unsigned char *pSource, mz_ulong source_len, int level);
// mz_compressBound() returns a (very) conservative upper bound on the amount of data that could be generated by calling mz_compress().
mz_ulong mz_compressBound(mz_ulong source_len);
// Initializes a decompressor.
int mz_inflateInit(mz_streamp pStream);
// mz_inflateInit2() is like mz_inflateInit() with an additional option that controls the window size and whether or not the stream has been wrapped with a zlib header/footer:
// window_bits must be MZ_DEFAULT_WINDOW_BITS (to parse zlib header/footer) or -MZ_DEFAULT_WINDOW_BITS (raw deflate).
int mz_inflateInit2(mz_streamp pStream, int window_bits);
// Decompresses the input stream to the output, consuming only as much of the input as needed, and writing as much to the output as possible.
// Parameters:
// pStream is the stream to read from and write to. You must initialize/update the next_in, avail_in, next_out, and avail_out members.
// flush may be MZ_NO_FLUSH, MZ_SYNC_FLUSH, or MZ_FINISH.
// On the first call, if flush is MZ_FINISH it's assumed the input and output buffers are both sized large enough to decompress the entire stream in a single call (this is slightly faster).
// MZ_FINISH implies that there are no more source bytes available beside what's already in the input buffer, and that the output buffer is large enough to hold the rest of the decompressed data.
// Return values:
// MZ_OK on success. Either more input is needed but not available, and/or there's more output to be written but the output buffer is full.
// MZ_STREAM_END if all needed input has been consumed and all output bytes have been written. For zlib streams, the adler-32 of the decompressed data has also been verified.
// MZ_STREAM_ERROR if the stream is bogus.
// MZ_DATA_ERROR if the deflate stream is invalid.
// MZ_PARAM_ERROR if one of the parameters is invalid.
// MZ_BUF_ERROR if no forward progress is possible because the input buffer is empty but the inflater needs more input to continue, or if the output buffer is not large enough. Call mz_inflate() again
// with more input data, or with more room in the output buffer (except when using single call decompression, described above).
int mz_inflate(mz_streamp pStream, int flush);
// Deinitializes a decompressor.
int mz_inflateEnd(mz_streamp pStream);
// Single-call decompression.
// Returns MZ_OK on success, or one of the error codes from mz_inflate() on failure.
int mz_uncompress(unsigned char *pDest, mz_ulong *pDest_len, const unsigned char *pSource, mz_ulong source_len);
// Returns a string description of the specified error code, or NULL if the error code is invalid.
const char *mz_error(int err);
// Redefine zlib-compatible names to miniz equivalents, so miniz.c can be used as a drop-in replacement for the subset of zlib that miniz.c supports.
// Define MINIZ_NO_ZLIB_COMPATIBLE_NAMES to disable zlib-compatibility if you use zlib in the same project.
#ifndef MINIZ_NO_ZLIB_COMPATIBLE_NAMES
typedef unsigned char Byte;
typedef unsigned int uInt;
typedef mz_ulong uLong;
typedef Byte Bytef;
typedef uInt uIntf;
typedef char charf;
typedef int intf;
typedef void *voidpf;
typedef uLong uLongf;
typedef void *voidp;
typedef void *const voidpc;
#define Z_NULL 0
#define Z_NO_FLUSH MZ_NO_FLUSH
#define Z_PARTIAL_FLUSH MZ_PARTIAL_FLUSH
#define Z_SYNC_FLUSH MZ_SYNC_FLUSH
#define Z_FULL_FLUSH MZ_FULL_FLUSH
#define Z_FINISH MZ_FINISH
#define Z_BLOCK MZ_BLOCK
#define Z_OK MZ_OK
#define Z_STREAM_END MZ_STREAM_END
#define Z_NEED_DICT MZ_NEED_DICT
#define Z_ERRNO MZ_ERRNO
#define Z_STREAM_ERROR MZ_STREAM_ERROR
#define Z_DATA_ERROR MZ_DATA_ERROR
#define Z_MEM_ERROR MZ_MEM_ERROR
#define Z_BUF_ERROR MZ_BUF_ERROR
#define Z_VERSION_ERROR MZ_VERSION_ERROR
#define Z_PARAM_ERROR MZ_PARAM_ERROR
#define Z_NO_COMPRESSION MZ_NO_COMPRESSION
#define Z_BEST_SPEED MZ_BEST_SPEED
#define Z_BEST_COMPRESSION MZ_BEST_COMPRESSION
#define Z_DEFAULT_COMPRESSION MZ_DEFAULT_COMPRESSION
#define Z_DEFAULT_STRATEGY MZ_DEFAULT_STRATEGY
#define Z_FILTERED MZ_FILTERED
#define Z_HUFFMAN_ONLY MZ_HUFFMAN_ONLY
#define Z_RLE MZ_RLE
#define Z_FIXED MZ_FIXED
#define Z_DEFLATED MZ_DEFLATED
#define Z_DEFAULT_WINDOW_BITS MZ_DEFAULT_WINDOW_BITS
#define alloc_func mz_alloc_func
#define free_func mz_free_func
#define internal_state mz_internal_state
#define z_stream mz_stream
#define deflateInit mz_deflateInit
#define deflateInit2 mz_deflateInit2
#define deflateReset mz_deflateReset
#define deflate mz_deflate
#define deflateEnd mz_deflateEnd
#define deflateBound mz_deflateBound
#define compress mz_compress
#define compress2 mz_compress2
#define compressBound mz_compressBound
#define inflateInit mz_inflateInit
#define inflateInit2 mz_inflateInit2
#define inflate mz_inflate
#define inflateEnd mz_inflateEnd
#define uncompress mz_uncompress
#define crc32 mz_crc32
#define adler32 mz_adler32
#define MAX_WBITS 15
#define MAX_MEM_LEVEL 9
#define zError mz_error
#define ZLIB_VERSION MZ_VERSION
#define ZLIB_VERNUM MZ_VERNUM
#define ZLIB_VER_MAJOR MZ_VER_MAJOR
#define ZLIB_VER_MINOR MZ_VER_MINOR
#define ZLIB_VER_REVISION MZ_VER_REVISION
#define ZLIB_VER_SUBREVISION MZ_VER_SUBREVISION
#define zlibVersion mz_version
#define zlib_version mz_version()
#endif // #ifndef MINIZ_NO_ZLIB_COMPATIBLE_NAMES
#endif // MINIZ_NO_ZLIB_APIS
// ------------------- Types and macros
typedef unsigned char mz_uint8;
typedef signed short mz_int16;
typedef unsigned short mz_uint16;
typedef unsigned int mz_uint32;
typedef unsigned int mz_uint;
typedef long long mz_int64;
typedef unsigned long long mz_uint64;
typedef int mz_bool;
#define MZ_FALSE (0)
#define MZ_TRUE (1)
// An attempt to work around MSVC's spammy "warning C4127: conditional expression is constant" message.
#ifdef _MSC_VER
#define MZ_MACRO_END while (0, 0)
#else
#define MZ_MACRO_END while (0)
#endif
// ------------------- ZIP archive reading/writing
#ifndef MINIZ_NO_ARCHIVE_APIS
enum
{
MZ_ZIP_MAX_IO_BUF_SIZE = 64*1024,
MZ_ZIP_MAX_ARCHIVE_FILENAME_SIZE = 260,
MZ_ZIP_MAX_ARCHIVE_FILE_COMMENT_SIZE = 256
};
typedef struct
{
mz_uint32 m_file_index;
mz_uint32 m_central_dir_ofs;
mz_uint16 m_version_made_by;
mz_uint16 m_version_needed;
mz_uint16 m_bit_flag;
mz_uint16 m_method;
#ifndef MINIZ_NO_TIME
time_t m_time;
#endif
mz_uint32 m_crc32;
mz_uint64 m_comp_size;
mz_uint64 m_uncomp_size;
mz_uint16 m_internal_attr;
mz_uint32 m_external_attr;
mz_uint64 m_local_header_ofs;
mz_uint32 m_comment_size;
char m_filename[MZ_ZIP_MAX_ARCHIVE_FILENAME_SIZE];
char m_comment[MZ_ZIP_MAX_ARCHIVE_FILE_COMMENT_SIZE];
} mz_zip_archive_file_stat;
typedef size_t (*mz_file_read_func)(void *pOpaque, mz_uint64 file_ofs, void *pBuf, size_t n);
typedef size_t (*mz_file_write_func)(void *pOpaque, mz_uint64 file_ofs, const void *pBuf, size_t n);
struct mz_zip_internal_state_tag;
typedef struct mz_zip_internal_state_tag mz_zip_internal_state;
typedef enum
{
MZ_ZIP_MODE_INVALID = 0,
MZ_ZIP_MODE_READING = 1,
MZ_ZIP_MODE_WRITING = 2,
MZ_ZIP_MODE_WRITING_HAS_BEEN_FINALIZED = 3
} mz_zip_mode;
typedef struct mz_zip_archive_tag
{
mz_uint64 m_archive_size;
mz_uint64 m_central_directory_file_ofs;
mz_uint m_total_files;
mz_zip_mode m_zip_mode;
mz_uint m_file_offset_alignment;
mz_alloc_func m_pAlloc;
mz_free_func m_pFree;
mz_realloc_func m_pRealloc;
void *m_pAlloc_opaque;
mz_file_read_func m_pRead;
mz_file_write_func m_pWrite;
void *m_pIO_opaque;
mz_zip_internal_state *m_pState;
} mz_zip_archive;
typedef enum
{
MZ_ZIP_FLAG_CASE_SENSITIVE = 0x0100,
MZ_ZIP_FLAG_IGNORE_PATH = 0x0200,
MZ_ZIP_FLAG_COMPRESSED_DATA = 0x0400,
MZ_ZIP_FLAG_DO_NOT_SORT_CENTRAL_DIRECTORY = 0x0800
} mz_zip_flags;
// ZIP archive reading
// Inits a ZIP archive reader.
// These functions read and validate the archive's central directory.
mz_bool mz_zip_reader_init(mz_zip_archive *pZip, mz_uint64 size, mz_uint32 flags);
mz_bool mz_zip_reader_init_mem(mz_zip_archive *pZip, const void *pMem, size_t size, mz_uint32 flags);
#ifndef MINIZ_NO_STDIO
mz_bool mz_zip_reader_init_file(mz_zip_archive *pZip, const char *pFilename, mz_uint32 flags);
#endif
// Returns the total number of files in the archive.
mz_uint mz_zip_reader_get_num_files(mz_zip_archive *pZip);
// Returns detailed information about an archive file entry.
mz_bool mz_zip_reader_file_stat(mz_zip_archive *pZip, mz_uint file_index, mz_zip_archive_file_stat *pStat);
// Determines if an archive file entry is a directory entry.
mz_bool mz_zip_reader_is_file_a_directory(mz_zip_archive *pZip, mz_uint file_index);
mz_bool mz_zip_reader_is_file_encrypted(mz_zip_archive *pZip, mz_uint file_index);
// Retrieves the filename of an archive file entry.
// Returns the number of bytes written to pFilename, or if filename_buf_size is 0 this function returns the number of bytes needed to fully store the filename.
mz_uint mz_zip_reader_get_filename(mz_zip_archive *pZip, mz_uint file_index, char *pFilename, mz_uint filename_buf_size);
// Attempts to locates a file in the archive's central directory.
// Valid flags: MZ_ZIP_FLAG_CASE_SENSITIVE, MZ_ZIP_FLAG_IGNORE_PATH
// Returns -1 if the file cannot be found.
int mz_zip_reader_locate_file(mz_zip_archive *pZip, const char *pName, const char *pComment, mz_uint flags);
// Extracts a archive file to a memory buffer using no memory allocation.
mz_bool mz_zip_reader_extract_to_mem_no_alloc(mz_zip_archive *pZip, mz_uint file_index, void *pBuf, size_t buf_size, mz_uint flags, void *pUser_read_buf, size_t user_read_buf_size);
mz_bool mz_zip_reader_extract_file_to_mem_no_alloc(mz_zip_archive *pZip, const char *pFilename, void *pBuf, size_t buf_size, mz_uint flags, void *pUser_read_buf, size_t user_read_buf_size);
// Extracts a archive file to a memory buffer.
mz_bool mz_zip_reader_extract_to_mem(mz_zip_archive *pZip, mz_uint file_index, void *pBuf, size_t buf_size, mz_uint flags);
mz_bool mz_zip_reader_extract_file_to_mem(mz_zip_archive *pZip, const char *pFilename, void *pBuf, size_t buf_size, mz_uint flags);
// Extracts a archive file to a dynamically allocated heap buffer.
void *mz_zip_reader_extract_to_heap(mz_zip_archive *pZip, mz_uint file_index, size_t *pSize, mz_uint flags);
void *mz_zip_reader_extract_file_to_heap(mz_zip_archive *pZip, const char *pFilename, size_t *pSize, mz_uint flags);
// Extracts a archive file using a callback function to output the file's data.
mz_bool mz_zip_reader_extract_to_callback(mz_zip_archive *pZip, mz_uint file_index, mz_file_write_func pCallback, void *pOpaque, mz_uint flags);
mz_bool mz_zip_reader_extract_file_to_callback(mz_zip_archive *pZip, const char *pFilename, mz_file_write_func pCallback, void *pOpaque, mz_uint flags);
#ifndef MINIZ_NO_STDIO
// Extracts a archive file to a disk file and sets its last accessed and modified times.
// This function only extracts files, not archive directory records.
mz_bool mz_zip_reader_extract_to_file(mz_zip_archive *pZip, mz_uint file_index, const char *pDst_filename, mz_uint flags);
mz_bool mz_zip_reader_extract_file_to_file(mz_zip_archive *pZip, const char *pArchive_filename, const char *pDst_filename, mz_uint flags);
#endif
// Ends archive reading, freeing all allocations, and closing the input archive file if mz_zip_reader_init_file() was used.
mz_bool mz_zip_reader_end(mz_zip_archive *pZip);
// ZIP archive writing
#ifndef MINIZ_NO_ARCHIVE_WRITING_APIS
// Inits a ZIP archive writer.
mz_bool mz_zip_writer_init(mz_zip_archive *pZip, mz_uint64 existing_size);
mz_bool mz_zip_writer_init_heap(mz_zip_archive *pZip, size_t size_to_reserve_at_beginning, size_t initial_allocation_size);
#ifndef MINIZ_NO_STDIO
mz_bool mz_zip_writer_init_file(mz_zip_archive *pZip, const char *pFilename, mz_uint64 size_to_reserve_at_beginning);
#endif
// Converts a ZIP archive reader object into a writer object, to allow efficient in-place file appends to occur on an existing archive.
// For archives opened using mz_zip_reader_init_file, pFilename must be the archive's filename so it can be reopened for writing. If the file can't be reopened, mz_zip_reader_end() will be called.
// For archives opened using mz_zip_reader_init_mem, the memory block must be growable using the realloc callback (which defaults to realloc unless you've overridden it).
// Finally, for archives opened using mz_zip_reader_init, the mz_zip_archive's user provided m_pWrite function cannot be NULL.
// Note: In-place archive modification is not recommended unless you know what you're doing, because if execution stops or something goes wrong before
// the archive is finalized the file's central directory will be hosed.
mz_bool mz_zip_writer_init_from_reader(mz_zip_archive *pZip, const char *pFilename);
// Adds the contents of a memory buffer to an archive. These functions record the current local time into the archive.
// To add a directory entry, call this method with an archive name ending in a forwardslash with empty buffer.
// level_and_flags - compression level (0-10, see MZ_BEST_SPEED, MZ_BEST_COMPRESSION, etc.) logically OR'd with zero or more mz_zip_flags, or just set to MZ_DEFAULT_COMPRESSION.
mz_bool mz_zip_writer_add_mem(mz_zip_archive *pZip, const char *pArchive_name, const void *pBuf, size_t buf_size, mz_uint level_and_flags);
mz_bool mz_zip_writer_add_mem_ex(mz_zip_archive *pZip, const char *pArchive_name, const void *pBuf, size_t buf_size, const void *pComment, mz_uint16 comment_size, mz_uint level_and_flags, mz_uint64 uncomp_size, mz_uint32 uncomp_crc32);
#ifndef MINIZ_NO_STDIO
// Adds the contents of a disk file to an archive. This function also records the disk file's modified time into the archive.
// level_and_flags - compression level (0-10, see MZ_BEST_SPEED, MZ_BEST_COMPRESSION, etc.) logically OR'd with zero or more mz_zip_flags, or just set to MZ_DEFAULT_COMPRESSION.
mz_bool mz_zip_writer_add_file(mz_zip_archive *pZip, const char *pArchive_name, const char *pSrc_filename, const void *pComment, mz_uint16 comment_size, mz_uint level_and_flags);
#endif
// Adds a file to an archive by fully cloning the data from another archive.
// This function fully clones the source file's compressed data (no recompression), along with its full filename, extra data, and comment fields.
mz_bool mz_zip_writer_add_from_zip_reader(mz_zip_archive *pZip, mz_zip_archive *pSource_zip, mz_uint file_index);
// Finalizes the archive by writing the central directory records followed by the end of central directory record.
// After an archive is finalized, the only valid call on the mz_zip_archive struct is mz_zip_writer_end().
// An archive must be manually finalized by calling this function for it to be valid.
mz_bool mz_zip_writer_finalize_archive(mz_zip_archive *pZip);
mz_bool mz_zip_writer_finalize_heap_archive(mz_zip_archive *pZip, void **pBuf, size_t *pSize);
// Ends archive writing, freeing all allocations, and closing the output file if mz_zip_writer_init_file() was used.
// Note for the archive to be valid, it must have been finalized before ending.
mz_bool mz_zip_writer_end(mz_zip_archive *pZip);
// Misc. high-level helper functions:
// mz_zip_add_mem_to_archive_file_in_place() efficiently (but not atomically) appends a memory blob to a ZIP archive.
// level_and_flags - compression level (0-10, see MZ_BEST_SPEED, MZ_BEST_COMPRESSION, etc.) logically OR'd with zero or more mz_zip_flags, or just set to MZ_DEFAULT_COMPRESSION.
mz_bool mz_zip_add_mem_to_archive_file_in_place(const char *pZip_filename, const char *pArchive_name, const void *pBuf, size_t buf_size, const void *pComment, mz_uint16 comment_size, mz_uint level_and_flags);
// Reads a single file from an archive into a heap block.
// Returns NULL on failure.
void *mz_zip_extract_archive_file_to_heap(const char *pZip_filename, const char *pArchive_name, size_t *pSize, mz_uint zip_flags);
#endif // #ifndef MINIZ_NO_ARCHIVE_WRITING_APIS
#endif // #ifndef MINIZ_NO_ARCHIVE_APIS
// ------------------- Low-level Decompression API Definitions
// Decompression flags used by tinfl_decompress().
// TINFL_FLAG_PARSE_ZLIB_HEADER: If set, the input has a valid zlib header and ends with an adler32 checksum (it's a valid zlib stream). Otherwise, the input is a raw deflate stream.
// TINFL_FLAG_HAS_MORE_INPUT: If set, there are more input bytes available beyond the end of the supplied input buffer. If clear, the input buffer contains all remaining input.
// TINFL_FLAG_USING_NON_WRAPPING_OUTPUT_BUF: If set, the output buffer is large enough to hold the entire decompressed stream. If clear, the output buffer is at least the size of the dictionary (typically 32KB).
// TINFL_FLAG_COMPUTE_ADLER32: Force adler-32 checksum computation of the decompressed bytes.
enum
{
TINFL_FLAG_PARSE_ZLIB_HEADER = 1,
TINFL_FLAG_HAS_MORE_INPUT = 2,
TINFL_FLAG_USING_NON_WRAPPING_OUTPUT_BUF = 4,
TINFL_FLAG_COMPUTE_ADLER32 = 8
};
// High level decompression functions:
// tinfl_decompress_mem_to_heap() decompresses a block in memory to a heap block allocated via malloc().
// On entry:
// pSrc_buf, src_buf_len: Pointer and size of the Deflate or zlib source data to decompress.
// On return:
// Function returns a pointer to the decompressed data, or NULL on failure.
// *pOut_len will be set to the decompressed data's size, which could be larger than src_buf_len on uncompressible data.
// The caller must call mz_free() on the returned block when it's no longer needed.
void *tinfl_decompress_mem_to_heap(const void *pSrc_buf, size_t src_buf_len, size_t *pOut_len, int flags);
// tinfl_decompress_mem_to_mem() decompresses a block in memory to another block in memory.
// Returns TINFL_DECOMPRESS_MEM_TO_MEM_FAILED on failure, or the number of bytes written on success.
#define TINFL_DECOMPRESS_MEM_TO_MEM_FAILED ((size_t)(-1))
size_t tinfl_decompress_mem_to_mem(void *pOut_buf, size_t out_buf_len, const void *pSrc_buf, size_t src_buf_len, int flags);
// tinfl_decompress_mem_to_callback() decompresses a block in memory to an internal 32KB buffer, and a user provided callback function will be called to flush the buffer.
// Returns 1 on success or 0 on failure.
typedef int (*tinfl_put_buf_func_ptr)(const void* pBuf, int len, void *pUser);
int tinfl_decompress_mem_to_callback(const void *pIn_buf, size_t *pIn_buf_size, tinfl_put_buf_func_ptr pPut_buf_func, void *pPut_buf_user, int flags);
struct tinfl_decompressor_tag; typedef struct tinfl_decompressor_tag tinfl_decompressor;
// Max size of LZ dictionary.
#define TINFL_LZ_DICT_SIZE 32768
// Return status.
typedef enum
{
TINFL_STATUS_BAD_PARAM = -3,
TINFL_STATUS_ADLER32_MISMATCH = -2,
TINFL_STATUS_FAILED = -1,
TINFL_STATUS_DONE = 0,
TINFL_STATUS_NEEDS_MORE_INPUT = 1,
TINFL_STATUS_HAS_MORE_OUTPUT = 2
} tinfl_status;
// Initializes the decompressor to its initial state.
#define tinfl_init(r) do { (r)->m_state = 0; } MZ_MACRO_END
#define tinfl_get_adler32(r) (r)->m_check_adler32
// Main low-level decompressor coroutine function. This is the only function actually needed for decompression. All the other functions are just high-level helpers for improved usability.
// This is a universal API, i.e. it can be used as a building block to build any desired higher level decompression API. In the limit case, it can be called once per every byte input or output.
tinfl_status tinfl_decompress(tinfl_decompressor *r, const mz_uint8 *pIn_buf_next, size_t *pIn_buf_size, mz_uint8 *pOut_buf_start, mz_uint8 *pOut_buf_next, size_t *pOut_buf_size, const mz_uint32 decomp_flags);
// Internal/private bits follow.
enum
{
TINFL_MAX_HUFF_TABLES = 3, TINFL_MAX_HUFF_SYMBOLS_0 = 288, TINFL_MAX_HUFF_SYMBOLS_1 = 32, TINFL_MAX_HUFF_SYMBOLS_2 = 19,
TINFL_FAST_LOOKUP_BITS = 10, TINFL_FAST_LOOKUP_SIZE = 1 << TINFL_FAST_LOOKUP_BITS
};
typedef struct
{
mz_uint8 m_code_size[TINFL_MAX_HUFF_SYMBOLS_0];
mz_int16 m_look_up[TINFL_FAST_LOOKUP_SIZE], m_tree[TINFL_MAX_HUFF_SYMBOLS_0 * 2];
} tinfl_huff_table;
#if MINIZ_HAS_64BIT_REGISTERS
#define TINFL_USE_64BIT_BITBUF 1
#endif
#if TINFL_USE_64BIT_BITBUF
typedef mz_uint64 tinfl_bit_buf_t;
#define TINFL_BITBUF_SIZE (64)
#else
typedef mz_uint32 tinfl_bit_buf_t;
#define TINFL_BITBUF_SIZE (32)
#endif
struct tinfl_decompressor_tag
{
mz_uint32 m_state, m_num_bits, m_zhdr0, m_zhdr1, m_z_adler32, m_final, m_type, m_check_adler32, m_dist, m_counter, m_num_extra, m_table_sizes[TINFL_MAX_HUFF_TABLES];
tinfl_bit_buf_t m_bit_buf;
size_t m_dist_from_out_buf_start;
tinfl_huff_table m_tables[TINFL_MAX_HUFF_TABLES];
mz_uint8 m_raw_header[4], m_len_codes[TINFL_MAX_HUFF_SYMBOLS_0 + TINFL_MAX_HUFF_SYMBOLS_1 + 137];
};
// ------------------- Low-level Compression API Definitions
// Set TDEFL_LESS_MEMORY to 1 to use less memory (compression will be slightly slower, and raw/dynamic blocks will be output more frequently).
#define TDEFL_LESS_MEMORY 1
// tdefl_init() compression flags logically OR'd together (low 12 bits contain the max. number of probes per dictionary search):
// TDEFL_DEFAULT_MAX_PROBES: The compressor defaults to 128 dictionary probes per dictionary search. 0=Huffman only, 1=Huffman+LZ (fastest/crap compression), 4095=Huffman+LZ (slowest/best compression).
enum
{
TDEFL_HUFFMAN_ONLY = 0, TDEFL_DEFAULT_MAX_PROBES = 128, TDEFL_MAX_PROBES_MASK = 0xFFF
};
// TDEFL_WRITE_ZLIB_HEADER: If set, the compressor outputs a zlib header before the deflate data, and the Adler-32 of the source data at the end. Otherwise, you'll get raw deflate data.
// TDEFL_COMPUTE_ADLER32: Always compute the adler-32 of the input data (even when not writing zlib headers).
// TDEFL_GREEDY_PARSING_FLAG: Set to use faster greedy parsing, instead of more efficient lazy parsing.
// TDEFL_NONDETERMINISTIC_PARSING_FLAG: Enable to decrease the compressor's initialization time to the minimum, but the output may vary from run to run given the same input (depending on the contents of memory).
// TDEFL_RLE_MATCHES: Only look for RLE matches (matches with a distance of 1)
// TDEFL_FILTER_MATCHES: Discards matches <= 5 chars if enabled.
// TDEFL_FORCE_ALL_STATIC_BLOCKS: Disable usage of optimized Huffman tables.
// TDEFL_FORCE_ALL_RAW_BLOCKS: Only use raw (uncompressed) deflate blocks.
// The low 12 bits are reserved to control the max # of hash probes per dictionary lookup (see TDEFL_MAX_PROBES_MASK).
enum
{
TDEFL_WRITE_ZLIB_HEADER = 0x01000,
TDEFL_COMPUTE_ADLER32 = 0x02000,
TDEFL_GREEDY_PARSING_FLAG = 0x04000,
TDEFL_NONDETERMINISTIC_PARSING_FLAG = 0x08000,
TDEFL_RLE_MATCHES = 0x10000,
TDEFL_FILTER_MATCHES = 0x20000,
TDEFL_FORCE_ALL_STATIC_BLOCKS = 0x40000,
TDEFL_FORCE_ALL_RAW_BLOCKS = 0x80000
};
// High level compression functions:
// tdefl_compress_mem_to_heap() compresses a block in memory to a heap block allocated via malloc().
// On entry:
// pSrc_buf, src_buf_len: Pointer and size of source block to compress.
// flags: The max match finder probes (default is 128) logically OR'd against the above flags. Higher probes are slower but improve compression.
// On return:
// Function returns a pointer to the compressed data, or NULL on failure.
// *pOut_len will be set to the compressed data's size, which could be larger than src_buf_len on uncompressible data.
// The caller must free() the returned block when it's no longer needed.
void *tdefl_compress_mem_to_heap(const void *pSrc_buf, size_t src_buf_len, size_t *pOut_len, int flags);
// tdefl_compress_mem_to_mem() compresses a block in memory to another block in memory.
// Returns 0 on failure.
size_t tdefl_compress_mem_to_mem(void *pOut_buf, size_t out_buf_len, const void *pSrc_buf, size_t src_buf_len, int flags);
// Compresses an image to a compressed PNG file in memory.
// On entry:
// pImage, w, h, and num_chans describe the image to compress. num_chans may be 1, 2, 3, or 4.
// The image pitch in bytes per scanline will be w*num_chans. The leftmost pixel on the top scanline is stored first in memory.
// level may range from [0,10], use MZ_NO_COMPRESSION, MZ_BEST_SPEED, MZ_BEST_COMPRESSION, etc. or a decent default is MZ_DEFAULT_LEVEL
// If flip is true, the image will be flipped on the Y axis (useful for OpenGL apps).
// On return:
// Function returns a pointer to the compressed data, or NULL on failure.
// *pLen_out will be set to the size of the PNG image file.
// The caller must mz_free() the returned heap block (which will typically be larger than *pLen_out) when it's no longer needed.
void *tdefl_write_image_to_png_file_in_memory_ex(const void *pImage, int w, int h, int num_chans, size_t *pLen_out, mz_uint level, mz_bool flip);
void *tdefl_write_image_to_png_file_in_memory(const void *pImage, int w, int h, int num_chans, size_t *pLen_out);
// Output stream interface. The compressor uses this interface to write compressed data. It'll typically be called TDEFL_OUT_BUF_SIZE at a time.
typedef mz_bool (*tdefl_put_buf_func_ptr)(const void* pBuf, int len, void *pUser);
// tdefl_compress_mem_to_output() compresses a block to an output stream. The above helpers use this function internally.
mz_bool tdefl_compress_mem_to_output(const void *pBuf, size_t buf_len, tdefl_put_buf_func_ptr pPut_buf_func, void *pPut_buf_user, int flags);
enum { TDEFL_MAX_HUFF_TABLES = 3, TDEFL_MAX_HUFF_SYMBOLS_0 = 288, TDEFL_MAX_HUFF_SYMBOLS_1 = 32, TDEFL_MAX_HUFF_SYMBOLS_2 = 19, TDEFL_LZ_DICT_SIZE = 32768, TDEFL_LZ_DICT_SIZE_MASK = TDEFL_LZ_DICT_SIZE - 1, TDEFL_MIN_MATCH_LEN = 3, TDEFL_MAX_MATCH_LEN = 258 };
// TDEFL_OUT_BUF_SIZE MUST be large enough to hold a single entire compressed output block (using static/fixed Huffman codes).
#if TDEFL_LESS_MEMORY
enum { TDEFL_LZ_CODE_BUF_SIZE = 24 * 1024, TDEFL_OUT_BUF_SIZE = (TDEFL_LZ_CODE_BUF_SIZE * 13 ) / 10, TDEFL_MAX_HUFF_SYMBOLS = 288, TDEFL_LZ_HASH_BITS = 12, TDEFL_LEVEL1_HASH_SIZE_MASK = 4095, TDEFL_LZ_HASH_SHIFT = (TDEFL_LZ_HASH_BITS + 2) / 3, TDEFL_LZ_HASH_SIZE = 1 << TDEFL_LZ_HASH_BITS };
#else
enum { TDEFL_LZ_CODE_BUF_SIZE = 64 * 1024, TDEFL_OUT_BUF_SIZE = (TDEFL_LZ_CODE_BUF_SIZE * 13 ) / 10, TDEFL_MAX_HUFF_SYMBOLS = 288, TDEFL_LZ_HASH_BITS = 15, TDEFL_LEVEL1_HASH_SIZE_MASK = 4095, TDEFL_LZ_HASH_SHIFT = (TDEFL_LZ_HASH_BITS + 2) / 3, TDEFL_LZ_HASH_SIZE = 1 << TDEFL_LZ_HASH_BITS };
#endif
// The low-level tdefl functions below may be used directly if the above helper functions aren't flexible enough. The low-level functions don't make any heap allocations, unlike the above helper functions.
typedef enum
{
TDEFL_STATUS_BAD_PARAM = -2,
TDEFL_STATUS_PUT_BUF_FAILED = -1,
TDEFL_STATUS_OKAY = 0,
TDEFL_STATUS_DONE = 1,
} tdefl_status;
// Must map to MZ_NO_FLUSH, MZ_SYNC_FLUSH, etc. enums
typedef enum
{
TDEFL_NO_FLUSH = 0,
TDEFL_SYNC_FLUSH = 2,
TDEFL_FULL_FLUSH = 3,
TDEFL_FINISH = 4
} tdefl_flush;
// tdefl's compression state structure.
typedef struct
{
tdefl_put_buf_func_ptr m_pPut_buf_func;
void *m_pPut_buf_user;
mz_uint m_flags, m_max_probes[2];
int m_greedy_parsing;
mz_uint m_adler32, m_lookahead_pos, m_lookahead_size, m_dict_size;
mz_uint8 *m_pLZ_code_buf, *m_pLZ_flags, *m_pOutput_buf, *m_pOutput_buf_end;
mz_uint m_num_flags_left, m_total_lz_bytes, m_lz_code_buf_dict_pos, m_bits_in, m_bit_buffer;
mz_uint m_saved_match_dist, m_saved_match_len, m_saved_lit, m_output_flush_ofs, m_output_flush_remaining, m_finished, m_block_index, m_wants_to_finish;
tdefl_status m_prev_return_status;
const void *m_pIn_buf;
void *m_pOut_buf;
size_t *m_pIn_buf_size, *m_pOut_buf_size;
tdefl_flush m_flush;
const mz_uint8 *m_pSrc;
size_t m_src_buf_left, m_out_buf_ofs;
mz_uint8 m_dict[TDEFL_LZ_DICT_SIZE + TDEFL_MAX_MATCH_LEN - 1];
mz_uint16 m_huff_count[TDEFL_MAX_HUFF_TABLES][TDEFL_MAX_HUFF_SYMBOLS];
mz_uint16 m_huff_codes[TDEFL_MAX_HUFF_TABLES][TDEFL_MAX_HUFF_SYMBOLS];
mz_uint8 m_huff_code_sizes[TDEFL_MAX_HUFF_TABLES][TDEFL_MAX_HUFF_SYMBOLS];
mz_uint8 m_lz_code_buf[TDEFL_LZ_CODE_BUF_SIZE];
mz_uint16 m_next[TDEFL_LZ_DICT_SIZE];
mz_uint16 m_hash[TDEFL_LZ_HASH_SIZE];
mz_uint8 m_output_buf[TDEFL_OUT_BUF_SIZE];
} tdefl_compressor;
// Initializes the compressor.
// There is no corresponding deinit() function because the tdefl API's do not dynamically allocate memory.
// pBut_buf_func: If **not** NULL, output data will be supplied to the specified callback. In this case, the user should call the tdefl_compress_buffer() API for compression.
// If pBut_buf_func is NULL the user should always call the tdefl_compress() API.
// flags: See the above enums (TDEFL_HUFFMAN_ONLY, TDEFL_WRITE_ZLIB_HEADER, etc.)
tdefl_status tdefl_init(tdefl_compressor *d, tdefl_put_buf_func_ptr pPut_buf_func, void *pPut_buf_user, int flags);
// Compresses a block of data, consuming as much of the specified input buffer as possible, and writing as much compressed data to the specified output buffer as possible.
tdefl_status tdefl_compress(tdefl_compressor *d, const void *pIn_buf, size_t *pIn_buf_size, void *pOut_buf, size_t *pOut_buf_size, tdefl_flush flush);
// tdefl_compress_buffer() is only usable when the tdefl_init() is called with a non-NULL tdefl_put_buf_func_ptr.
// tdefl_compress_buffer() always consumes the entire input buffer.
tdefl_status tdefl_compress_buffer(tdefl_compressor *d, const void *pIn_buf, size_t in_buf_size, tdefl_flush flush);
tdefl_status tdefl_get_prev_return_status(tdefl_compressor *d);
mz_uint32 tdefl_get_adler32(tdefl_compressor *d);
// Can't use tdefl_create_comp_flags_from_zip_params if MINIZ_NO_ZLIB_APIS isn't defined, because it uses some of its macros.
#ifndef MINIZ_NO_ZLIB_APIS
// Create tdefl_compress() flags given zlib-style compression parameters.
// level may range from [0,10] (where 10 is absolute max compression, but may be much slower on some files)
// window_bits may be -15 (raw deflate) or 15 (zlib)
// strategy may be either MZ_DEFAULT_STRATEGY, MZ_FILTERED, MZ_HUFFMAN_ONLY, MZ_RLE, or MZ_FIXED
mz_uint tdefl_create_comp_flags_from_zip_params(int level, int window_bits, int strategy);
#endif // #ifndef MINIZ_NO_ZLIB_APIS
#ifdef __cplusplus
}
#endif
#endif // MINIZ_HEADER_INCLUDED

299
tools/sdk/esp32/include/esp_rom/include/esp32s2/rom/opi_flash.h Normal file
View File

@ -0,0 +1,299 @@
/*
* copyright (c) Espressif System 2019
*
*/
#ifndef _ROM_OPI_FLASH_H_
#define _ROM_OPI_FLASH_H_
#include <stdio.h>
#include <string.h>
#include <stdint.h>
#include "spi_flash.h"
#ifdef __cplusplus
extern "C" {
#endif
typedef struct {
uint16_t cmd; /*!< Command value */
uint16_t cmdBitLen; /*!< Command byte length*/
uint32_t *addr; /*!< Point to address value*/
uint32_t addrBitLen; /*!< Address byte length*/
uint32_t *txData; /*!< Point to send data buffer*/
uint32_t txDataBitLen; /*!< Send data byte length.*/
uint32_t *rxData; /*!< Point to recevie data buffer*/
uint32_t rxDataBitLen; /*!< Recevie Data byte length.*/
uint32_t dummyBitLen;
} esp_rom_spi_cmd_t;
#define ESP_ROM_OPIFLASH_MUX_TAKE()
#define ESP_ROM_OPIFLASH_MUX_GIVE()
#define ESP_ROM_OPIFLASH_SEL_CS0 (BIT(0))
#define ESP_ROM_OPIFLASH_SEL_CS1 (BIT(1))
// Definition of MX25UM25645G Octa Flash
// SPI status register
#define ESP_ROM_SPIFLASH_BUSY_FLAG BIT0
#define ESP_ROM_SPIFLASH_WRENABLE_FLAG BIT1
#define ESP_ROM_SPIFLASH_BP0 BIT2
#define ESP_ROM_SPIFLASH_BP1 BIT3
#define ESP_ROM_SPIFLASH_BP2 BIT4
#define ESP_ROM_SPIFLASH_WR_PROTECT (ESP_ROM_SPIFLASH_BP0|ESP_ROM_SPIFLASH_BP1|ESP_ROM_SPIFLASH_BP2)
#define ESP_ROM_SPIFLASH_QE BIT9
#define FLASH_OP_MODE_RDCMD_DOUT 0x3B
#define ESP_ROM_FLASH_SECTOR_SIZE 0x1000
#define ESP_ROM_FLASH_BLOCK_SIZE_64K 0x10000
#define ESP_ROM_FLASH_PAGE_SIZE 256
// FLASH commands
#define ROM_FLASH_CMD_RDID 0x9F
#define ROM_FLASH_CMD_WRSR 0x01
#define ROM_FLASH_CMD_WRSR2 0x31 /* Not all SPI flash uses this command */
#define ROM_FLASH_CMD_WREN 0x06
#define ROM_FLASH_CMD_WRDI 0x04
#define ROM_FLASH_CMD_RDSR 0x05
#define ROM_FLASH_CMD_RDSR2 0x35 /* Not all SPI flash uses this command */
#define ROM_FLASH_CMD_ERASE_SEC 0x20
#define ROM_FLASH_CMD_ERASE_BLK_32K 0x52
#define ROM_FLASH_CMD_ERASE_BLK_64K 0xD8
#define ROM_FLASH_CMD_OTPEN 0x3A /* Enable OTP mode, not all SPI flash uses this command */
#define ROM_FLASH_CMD_RSTEN 0x66
#define ROM_FLASH_CMD_RST 0x99
#define ROM_FLASH_CMD_SE4B 0x21
#define ROM_FLASH_CMD_SE4B_OCT 0xDE21
#define ROM_FLASH_CMD_BE4B 0xDC
#define ROM_FLASH_CMD_BE4B_OCT 0x23DC
#define ROM_FLASH_CMD_RSTEN_OCT 0x9966
#define ROM_FLASH_CMD_RST_OCT 0x6699
#define ROM_FLASH_CMD_FSTRD4B_STR 0x13EC
#define ROM_FLASH_CMD_FSTRD4B_DTR 0x11EE
#define ROM_FLASH_CMD_FSTRD4B 0x0C
#define ROM_FLASH_CMD_PP4B 0x12
#define ROM_FLASH_CMD_PP4B_OCT 0xED12
#define ROM_FLASH_CMD_RDID_OCT 0x609F
#define ROM_FLASH_CMD_WREN_OCT 0xF906
#define ROM_FLASH_CMD_RDSR_OCT 0xFA05
#define ROM_FLASH_CMD_RDCR2 0x71
#define ROM_FLASH_CMD_RDCR2_OCT 0x8E71
#define ROM_FLASH_CMD_WRCR2 0x72
#define ROM_FLASH_CMD_WRCR2_OCT 0x8D72
// Definitions for GigaDevice GD25LX256E Flash
#define ROM_FLASH_CMD_RDFSR_GD 0x70
#define ROM_FLASH_CMD_RD_GD 0x03
#define ROM_FLASH_CMD_RD4B_GD 0x13
#define ROM_FLASH_CMD_FSTRD_GD 0x0B
#define ROM_FLASH_CMD_FSTRD4B_GD 0x0C
#define ROM_FLASH_CMD_FSTRD_OOUT_GD 0x8B
#define ROM_FLASH_CMD_FSTRD4B_OOUT_GD 0x7C
#define ROM_FLASH_CMD_FSTRD_OIOSTR_GD 0xCB
#define ROM_FLASH_CMD_FSTRD4B_OIOSTR_GD 0xCC
#define ROM_FLASH_CMD_FSTRD4B_OIODTR_GD 0xFD
#define ROM_FLASH_CMD_PP_GD 0x02
#define ROM_FLASH_CMD_PP4B_GD 0x12
#define ROM_FLASH_CMD_PP_OOUT_GD 0x82
#define ROM_FLASH_CMD_PP4B_OOUT_GD 0x84
#define ROM_FLASH_CMD_PP_OIO_GD 0xC2
#define ROM_FLASH_CMD_PP4B_OIOSTR_GD 0x8E
#define ROM_FLASH_CMD_SE_GD 0x20
#define ROM_FLASH_CMD_SE4B_GD 0x21
#define ROM_FLASH_CMD_BE32K_GD 0x52
#define ROM_FLASH_CMD_BE32K4B_GD 0x5C
#define ROM_FLASH_CMD_BE64K_GD 0xD8
#define ROM_FLASH_CMD_BE64K4B_GD 0xDC
#define ROM_FLASH_CMD_EN4B_GD 0xB7
#define ROM_FLASH_CMD_DIS4B_GD 0xE9
// spi user mode command config
/**
* @brief Config the spi user command
* @param spi_num spi port
* @param pcmd pointer to accept the spi command struct
*/
void esp_rom_spi_cmd_config(int spi_num, esp_rom_spi_cmd_t* pcmd);
/**
* @brief Start a spi user command sequence
* @param spi_num spi port
* @param rx_buf buffer pointer to receive data
* @param rx_len receive data length in byte
* @param cs_en_mask decide which cs to use, 0 for cs0, 1 for cs1
* @param is_write_erase to indicate whether this is a write or erase operation, since the CPU would check permission
*/
void esp_rom_spi_cmd_start(int spi_num, uint8_t* rx_buf, uint16_t rx_len, uint8_t cs_en_mask, bool is_write_erase);
/**
* @brief Config opi flash pads according to efuse settings.
*/
void esp_rom_opiflash_pin_config(void);
// set SPI read/write mode
/**
* @brief Set SPI operation mode
* @param spi_num spi port
* @param mode Flash Read Mode
*/
void esp_rom_spi_set_op_mode(int spi_num, esp_rom_spiflash_read_mode_t mode);
/**
* @brief Set data swap mode in DTR(DDR) mode
* @param spi_num spi port
* @param wr_swap to decide whether to swap fifo data in dtr write operation
* @param rd_swap to decide whether to swap fifo data in dtr read operation
*/
void esp_rom_spi_set_dtr_swap_mode(int spi, bool wr_swap, bool rd_swap);
/**
* @brief to send reset command in spi/opi-str/opi-dtr mode(for MX25UM25645G)
* @param spi_num spi port
*/
void esp_rom_opiflash_mode_reset(int spi_num);
#if 0
// MX25UM25645G opi flash interface
/**
* @brief To execute a flash operation command
* @param spi_num spi port
* @param mode Flash Read Mode
* @param cmd data to send in command field
* @param cmd_bit_len bit length of command field
* @param addr data to send in address field
* @param addr_bit_len bit length of address field
* @param dummy_bits bit length of dummy field
* @param mosi_data data buffer to be sent in mosi field
* @param mosi_bit_len bit length of data buffer to be sent in mosi field
* @param miso_data data buffer to accept data in miso field
* @param miso_bit_len bit length of data buffer to accept data in miso field
* @param cs_mark decide which cs pin to use. 0: cs0, 1: cs1
* @param is_write_erase_operation to indicate whether this a write or erase flash operation
*/
void esp_rom_opiflash_exec_cmd(int spi_num, esp_rom_spiflash_read_mode_t mode,
uint32_t cmd, int cmd_bit_len,
uint32_t addr, int addr_bit_len,
int dummy_bits,
uint8_t* mosi_data, int mosi_bit_len,
uint8_t* miso_data, int miso_bit_len,
uint32_t cs_mask,
bool is_write_erase_operation);
/**
* @brief send reset command to opi flash
* @param spi_num spi port
* @param mode Flash Operation Mode
*/
void esp_rom_opiflash_soft_reset(int spi_num, esp_rom_spiflash_read_mode_t mode);
/**
* @brief to read opi flash ID(for MX25UM25645G)
* @param spi_num spi port
* @param mode Flash Operation Mode
* @return opi flash id
*/
uint32_t esp_rom_opiflash_read_id(int spi_num, esp_rom_spiflash_read_mode_t mode);
/**
* @brief to read opi flash status register(for MX25UM25645G)
* @param spi_num spi port
* @param mode Flash Operation Mode
* @return opi flash status value
*/
uint8_t esp_rom_opiflash_rdsr(int spi_num, esp_rom_spiflash_read_mode_t mode);
/**
* @brief wait opi flash status register to be idle
* @param spi_num spi port
* @param mode Flash Operation Mode
*/
void esp_rom_opiflash_wait_idle(int spi_num, esp_rom_spiflash_read_mode_t mode);
/**
* @brief to read the config register2(for MX25UM25645G)
* @param spi_num spi port
* @param mode Flash Operation Mode
* @param addr the address of configure register
* @return value of config register2
*/
uint8_t esp_rom_opiflash_rdcr2(int spi_num, esp_rom_spiflash_read_mode_t mode, uint32_t addr);
/**
* @brief to write the config register2(for MX25UM25645G)
* @param spi_num spi port
* @param mode Flash Operation Mode
* @param addr the address of config register
* @param val the value to write
*/
void esp_rom_opiflash_wrcr2(int spi_num, esp_rom_spiflash_read_mode_t mode, uint32_t addr, uint8_t val);
/**
* @brief to erase flash sector(for MX25UM25645G)
* @param spi_num spi port
* @param address the sector address to be erased
* @param mode Flash operation mode
* @return flash operation result
*/
esp_rom_spiflash_result_t esp_rom_opiflash_erase_sector(int spi_num, uint32_t address, esp_rom_spiflash_read_mode_t mode);
/**
* @brief to erase flash block(for MX25UM25645G)
* @param spi_num spi port
* @param address the block address to be erased
* @param mode Flash operation mode
* @return flash operation result
*/
esp_rom_spiflash_result_t esp_rom_opiflash_erase_block_64k(int spi_num, uint32_t address, esp_rom_spiflash_read_mode_t mode);
/**
* @brief to erase a flash area define by start address and length(for MX25UM25645G)
* @param spi_num spi port
* @param start_addr the start address to be erased
* @param area_len the erea length to be erased
* @param mode flash operation mode
* @return flash operation result
*/
esp_rom_spiflash_result_t esp_rom_opiflash_erase_area(int spi_num, uint32_t start_addr, uint32_t area_len, esp_rom_spiflash_read_mode_t mode);
/**
* @brief to read data from opi flash(for MX25UM25645G)
* @param spi_num spi port
* @param mode flash operation mode
* @param flash_addr flash address to read data from
* @param data_addr data buffer to accept the data
* @param len data length to be read
* @return flash operation result
*/
esp_rom_spiflash_result_t esp_rom_opiflash_read(int spi_num, esp_rom_spiflash_read_mode_t mode, uint32_t flash_addr, uint8_t *data_addr, int len);
/**
* @brief to write data to opi flash(for MX25UM25645G)
* @param spi_num spi port
* @param mode flash operation mode
* @param flash_addr flash address to write data to
* @param data_addr data buffer to write to flash
* @param len data length to write
* @return flash operation result
*/
esp_rom_spiflash_result_t esp_rom_opiflash_write(int spi_num, esp_rom_spiflash_read_mode_t mode, uint32_t flash_addr, uint8_t *data_addr, uint32_t len);
/**
* @brief to set opi flash operation mode(for MX25UM25645G)
* @param spi_num spi port
* @param cur_mode current operation mode
* @param target the target operation mode to be set
*/
void esp_rom_opiflash_set_mode(int spi_num, esp_rom_spiflash_read_mode_t cur_mode, esp_rom_spiflash_read_mode_t target_mode);
#endif
#ifdef __cplusplus
}
#endif
#endif

45
tools/sdk/esp32/include/esp_rom/include/esp32s2/rom/rsa_pss.h Normal file
View File

@ -0,0 +1,45 @@
// Copyright 2015-2018 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#ifndef _ROM_RSA_PSS_H_
#define _ROM_RSA_PSS_H_
#include <stdint.h>
#include <stddef.h>
#ifdef __cplusplus
extern "C" {
#endif
#define ETS_SIG_LEN 384 /* Bytes */
#define ETS_DIGEST_LEN 32 /* SHA-256, bytes */
typedef struct {
uint8_t n[384]; /* Public key modulus */
uint32_t e; /* Public key exponent */
uint8_t rinv[384];
uint32_t mdash;
} ets_rsa_pubkey_t;
bool ets_rsa_pss_verify(const ets_rsa_pubkey_t *key, const uint8_t *sig, const uint8_t *digest, uint8_t *verified_digest);
void ets_mgf1_sha256(const uint8_t *mgfSeed, size_t seedLen, size_t maskLen, uint8_t *mask);
bool ets_emsa_pss_verify(const uint8_t *encoded_message, const uint8_t *mhash);
#ifdef __cplusplus
}
#endif
#endif

256
tools/sdk/esp32/include/esp_rom/include/esp32s2/rom/rtc.h Normal file
View File

@ -0,0 +1,256 @@
// Copyright 2010-2016 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#ifndef _ROM_RTC_H_
#define _ROM_RTC_H_
#include "ets_sys.h"
#include <stdbool.h>
#include <stdint.h>
#include "soc/soc.h"
#include "soc/rtc_cntl_reg.h"
#include "soc/reset_reasons.h"
#ifdef __cplusplus
extern "C" {
#endif
/** \defgroup rtc_apis, rtc registers and memory related apis
* @brief rtc apis
*/
/** @addtogroup rtc_apis
* @{
*/
/**************************************************************************************
* Note: *
* Some Rtc memory and registers are used, in ROM or in internal library. *
* Please do not use reserved or used rtc memory or registers. *
* *
*************************************************************************************
* RTC Memory & Store Register usage
*************************************************************************************
* rtc memory addr type size usage
* 0x3f421000(0x50000000) Slow SIZE_CP Co-Processor code/Reset Entry
* 0x3f421000+SIZE_CP Slow 8192-SIZE_CP
*
* 0x3ff80000(0x40070000) Fast 8192 deep sleep entry code
*
*************************************************************************************
* RTC store registers usage
* RTC_CNTL_STORE0_REG Reserved
* RTC_CNTL_STORE1_REG RTC_SLOW_CLK calibration value
* RTC_CNTL_STORE2_REG Boot time, low word
* RTC_CNTL_STORE3_REG Boot time, high word
* RTC_CNTL_STORE4_REG External XTAL frequency
* RTC_CNTL_STORE5_REG APB bus frequency
* RTC_CNTL_STORE6_REG FAST_RTC_MEMORY_ENTRY
* RTC_CNTL_STORE7_REG FAST_RTC_MEMORY_CRC
*************************************************************************************
*/
#define RTC_SLOW_CLK_CAL_REG RTC_CNTL_STORE1_REG
#define RTC_BOOT_TIME_LOW_REG RTC_CNTL_STORE2_REG
#define RTC_BOOT_TIME_HIGH_REG RTC_CNTL_STORE3_REG
#define RTC_XTAL_FREQ_REG RTC_CNTL_STORE4_REG
#define RTC_APB_FREQ_REG RTC_CNTL_STORE5_REG
#define RTC_ENTRY_ADDR_REG RTC_CNTL_STORE6_REG
#define RTC_RESET_CAUSE_REG RTC_CNTL_STORE6_REG
#define RTC_MEMORY_CRC_REG RTC_CNTL_STORE7_REG
#define RTC_DISABLE_ROM_LOG ((1 << 0) | (1 << 16)) //!< Disable logging from the ROM code.
typedef enum {
AWAKE = 0, //<CPU ON
LIGHT_SLEEP = BIT0, //CPU waiti, PLL ON. We don't need explicitly set this mode.
DEEP_SLEEP = BIT1 //CPU OFF, PLL OFF, only specific timer could wake up
} SLEEP_MODE;
typedef enum {
NO_MEAN = 0,
POWERON_RESET = 1, /**<1, Vbat power on reset*/
RTC_SW_SYS_RESET = 3, /**<3, Software reset digital core*/
DEEPSLEEP_RESET = 5, /**<5, Deep Sleep reset digital core*/
TG0WDT_SYS_RESET = 7, /**<7, Timer Group0 Watch dog reset digital core*/
TG1WDT_SYS_RESET = 8, /**<8, Timer Group1 Watch dog reset digital core*/
RTCWDT_SYS_RESET = 9, /**<9, RTC Watch dog Reset digital core*/
INTRUSION_RESET = 10, /**<10, Instrusion tested to reset CPU*/
TG0WDT_CPU_RESET = 11, /**<11, Time Group0 reset CPU*/
RTC_SW_CPU_RESET = 12, /**<12, Software reset CPU*/
RTCWDT_CPU_RESET = 13, /**<13, RTC Watch dog Reset CPU*/
RTCWDT_BROWN_OUT_RESET = 15, /**<15, Reset when the vdd voltage is not stable*/
RTCWDT_RTC_RESET = 16, /**<16, RTC Watch dog reset digital core and rtc module*/
TG1WDT_CPU_RESET = 17, /**<17, Time Group1 reset CPU*/
SUPER_WDT_RESET = 18, /**<18, super watchdog reset digital core and rtc module*/
GLITCH_RTC_RESET = 19, /**<19, glitch reset digital core and rtc module*/
EFUSE_RESET = 20, /**<20, efuse reset digital core*/
} RESET_REASON;
// Check if the reset reason defined in ROM is compatible with soc/reset_reasons.h
_Static_assert((soc_reset_reason_t)POWERON_RESET == RESET_REASON_CHIP_POWER_ON, "POWERON_RESET != RESET_REASON_CHIP_POWER_ON");
_Static_assert((soc_reset_reason_t)RTC_SW_SYS_RESET == RESET_REASON_CORE_SW, "RTC_SW_SYS_RESET != RESET_REASON_CORE_SW");
_Static_assert((soc_reset_reason_t)DEEPSLEEP_RESET == RESET_REASON_CORE_DEEP_SLEEP, "DEEPSLEEP_RESET != RESET_REASON_CORE_DEEP_SLEEP");
_Static_assert((soc_reset_reason_t)TG0WDT_SYS_RESET == RESET_REASON_CORE_MWDT0, "TG0WDT_SYS_RESET != RESET_REASON_CORE_MWDT0");
_Static_assert((soc_reset_reason_t)TG1WDT_SYS_RESET == RESET_REASON_CORE_MWDT1, "TG1WDT_SYS_RESET != RESET_REASON_CORE_MWDT1");
_Static_assert((soc_reset_reason_t)RTCWDT_SYS_RESET == RESET_REASON_CORE_RTC_WDT, "RTCWDT_SYS_RESET != RESET_REASON_CORE_RTC_WDT");
_Static_assert((soc_reset_reason_t)TG0WDT_CPU_RESET == RESET_REASON_CPU0_MWDT0, "TG0WDT_CPU_RESET != RESET_REASON_CPU0_MWDT0");
_Static_assert((soc_reset_reason_t)RTC_SW_CPU_RESET == RESET_REASON_CPU0_SW, "RTC_SW_CPU_RESET != RESET_REASON_CPU0_SW");
_Static_assert((soc_reset_reason_t)RTCWDT_CPU_RESET == RESET_REASON_CPU0_RTC_WDT, "RTCWDT_CPU_RESET != RESET_REASON_CPU0_RTC_WDT");
_Static_assert((soc_reset_reason_t)RTCWDT_BROWN_OUT_RESET == RESET_REASON_SYS_BROWN_OUT, "RTCWDT_BROWN_OUT_RESET != RESET_REASON_SYS_BROWN_OUT");
_Static_assert((soc_reset_reason_t)RTCWDT_RTC_RESET == RESET_REASON_SYS_RTC_WDT, "RTCWDT_RTC_RESET != RESET_REASON_SYS_RTC_WDT");
_Static_assert((soc_reset_reason_t)SUPER_WDT_RESET == RESET_REASON_SYS_SUPER_WDT, "SUPER_WDT_RESET != RESET_REASON_SYS_SUPER_WDT");
_Static_assert((soc_reset_reason_t)GLITCH_RTC_RESET == RESET_REASON_SYS_CLK_GLITCH, "GLITCH_RTC_RESET != RESET_REASON_SYS_CLK_GLITCH");
_Static_assert((soc_reset_reason_t)EFUSE_RESET == RESET_REASON_CORE_EFUSE_CRC, "EFUSE_RESET != RESET_REASON_CORE_EFUSE_CRC");
typedef enum {
NO_SLEEP = 0,
EXT_EVENT0_TRIG = BIT0,
EXT_EVENT1_TRIG = BIT1,
GPIO_TRIG = BIT2,
TIMER_EXPIRE = BIT3,
SDIO_TRIG = BIT4,
MAC_TRIG = BIT5,
UART0_TRIG = BIT6,
UART1_TRIG = BIT7,
TOUCH_TRIG = BIT8,
SAR_TRIG = BIT9,
BT_TRIG = BIT10,
RISCV_TRIG = BIT11,
XTAL_DEAD_TRIG = BIT12,
RISCV_TRAP_TRIG = BIT13,
USB_TRIG = BIT14
} WAKEUP_REASON;
typedef enum {
DISEN_WAKEUP = NO_SLEEP,
EXT_EVENT0_TRIG_EN = EXT_EVENT0_TRIG,
EXT_EVENT1_TRIG_EN = EXT_EVENT1_TRIG,
GPIO_TRIG_EN = GPIO_TRIG,
TIMER_EXPIRE_EN = TIMER_EXPIRE,
SDIO_TRIG_EN = SDIO_TRIG,
MAC_TRIG_EN = MAC_TRIG,
UART0_TRIG_EN = UART0_TRIG,
UART1_TRIG_EN = UART1_TRIG,
TOUCH_TRIG_EN = TOUCH_TRIG,
SAR_TRIG_EN = SAR_TRIG,
BT_TRIG_EN = BT_TRIG,
RISCV_TRIG_EN = RISCV_TRIG,
XTAL_DEAD_TRIG_EN = XTAL_DEAD_TRIG,
RISCV_TRAP_TRIG_EN = RISCV_TRAP_TRIG,
USB_TRIG_EN = USB_TRIG
} WAKEUP_ENABLE;
/**
* @brief Get the reset reason for CPU.
*
* @param int cpu_no : CPU no.
*
* @return RESET_REASON
*/
RESET_REASON rtc_get_reset_reason(int cpu_no);
/**
* @brief Get the wakeup cause for CPU.
*
* @param int cpu_no : CPU no.
*
* @return WAKEUP_REASON
*/
WAKEUP_REASON rtc_get_wakeup_cause(void);
/**
* @brief Get CRC for Fast RTC Memory.
*
* @param uint32_t start_addr : 0 - 0x7ff for Fast RTC Memory.
*
* @param uint32_t crc_len : 0 - 0x7ff, 0 for 4 byte, 0x7ff for 0x2000 byte.
*
* @return uint32_t : CRC32 result
*/
uint32_t calc_rtc_memory_crc(uint32_t start_addr, uint32_t crc_len);
/**
* @brief Set CRC of Fast RTC memory 0-0x7ff into RTC STORE7.
*
* @param None
*
* @return None
*/
void set_rtc_memory_crc(void);
/**
* @brief Suppress ROM log by setting specific RTC control register.
* @note This is not a permanent disable of ROM logging since the RTC register can not retain after chip reset.
*
* @param None
*
* @return None
*/
static inline void rtc_suppress_rom_log(void)
{
/* To disable logging in the ROM, only the least significant bit of the register is used,
* but since this register is also used to store the frequency of the main crystal (RTC_XTAL_FREQ_REG),
* you need to write to this register in the same format.
* Namely, the upper 16 bits and lower should be the same.
*/
REG_SET_BIT(RTC_CNTL_STORE4_REG, RTC_DISABLE_ROM_LOG);
}
/**
* @brief Fetch entry from RTC memory and RTC STORE reg
*
* @param uint32_t * entry_addr : the address to save entry
*
* @param RESET_REASON reset_reason : reset reason this time
*
* @return None
*/
void rtc_boot_control(uint32_t * entry_addr, RESET_REASON reset_reason);
/**
* @brief Software Reset digital core.
*
* It is not recommended to use this function in esp-idf, use
* esp_restart() instead.
*
* @param None
*
* @return None
*/
void software_reset(void);
/**
* @brief Software Reset digital core.
*
* It is not recommended to use this function in esp-idf, use
* esp_restart() instead.
*
* @param int cpu_no : The CPU to reset, 0 for PRO CPU, 1 for APP CPU.
*
* @return None
*/
void software_reset_cpu(int cpu_no);
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* _ROM_RTC_H_ */

116
tools/sdk/esp32/include/esp_rom/include/esp32s2/rom/secure_boot.h Normal file
View File

@ -0,0 +1,116 @@
/*
* SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
#include <stdint.h>
#include "ets_sys.h"
#include "rsa_pss.h"
#ifdef __cplusplus
extern "C" {
#endif
typedef struct ets_secure_boot_sig_block ets_secure_boot_sig_block_t;
typedef struct ets_secure_boot_signature ets_secure_boot_signature_t;
typedef struct ets_secure_boot_key_digests ets_secure_boot_key_digests_t;
/* Anti-FI measure: use full words for success/fail, instead of
0/non-zero
*/
typedef enum {
SB_SUCCESS = 0x3A5A5AA5,
SB_FAILED = 0x7533885E,
} ets_secure_boot_status_t;
/* Verify and stage-load the bootloader image
(reconfigures cache to map, loads trusted key digests from efuse,
copies the bootloader into the staging buffer.)
If allow_key_revoke is true and aggressive revoke efuse is set,
any failed signature has its associated key revoked in efuse.
If result is SB_SUCCESS, the "simple hash" of the bootloader
is copied into verified_hash.
*/
ets_secure_boot_status_t ets_secure_boot_verify_stage_bootloader(uint8_t *verified_hash, bool allow_key_revoke);
/* Verify bootloader image (reconfigures cache to map),
with key digests provided as parameters.)
Can be used to verify secure boot status before enabling
secure boot permanently.
If stage_load parameter is true, bootloader is copied into staging
buffer in RAM at the same time.
If result is SB_SUCCESS, the "simple hash" of the bootloader is
copied into verified_hash.
*/
ets_secure_boot_status_t ets_secure_boot_verify_bootloader_with_keys(uint8_t *verified_hash, const ets_secure_boot_key_digests_t *trusted_keys, bool stage_load);
/* Read key digests from efuse. Any revoked/missing digests will be
marked as NULL
*/
ETS_STATUS ets_secure_boot_read_key_digests(ets_secure_boot_key_digests_t *trusted_keys);
/* Verify supplied signature against supplied digest, using
supplied trusted key digests.
Doesn't reconfigure cache or any other hardware access except for RSA peripheral.
If result is SB_SUCCESS, the image_digest value is copied into verified_digest.
*/
ets_secure_boot_status_t ets_secure_boot_verify_signature(const ets_secure_boot_signature_t *sig, const uint8_t *image_digest, const ets_secure_boot_key_digests_t *trusted_keys, uint8_t *verified_digest);
/* Revoke a public key digest in efuse.
@param index Digest to revoke. Must be 0, 1 or 2.
*/
void ets_secure_boot_revoke_public_key_digest(int index);
#define CRC_SIGN_BLOCK_LEN 1196
#define SIG_BLOCK_PADDING 4096
#define ETS_SECURE_BOOT_V2_SIGNATURE_MAGIC 0xE7
/* Secure Boot V2 signature block
(Up to 3 in a signature sector are appended to the image)
*/
struct ets_secure_boot_sig_block {
uint8_t magic_byte;
uint8_t version;
uint8_t _reserved1;
uint8_t _reserved2;
uint8_t image_digest[32];
ets_rsa_pubkey_t key;
uint8_t signature[384];
uint32_t block_crc;
uint8_t _padding[16];
};
_Static_assert(sizeof(ets_secure_boot_sig_block_t) == 1216, "invalid sig block size");
#define SECURE_BOOT_NUM_BLOCKS 3
/* V2 Secure boot signature sector (up to 3 blocks) */
struct ets_secure_boot_signature {
ets_secure_boot_sig_block_t block[SECURE_BOOT_NUM_BLOCKS];
uint8_t _padding[4096 - (sizeof(ets_secure_boot_sig_block_t) * SECURE_BOOT_NUM_BLOCKS)];
};
_Static_assert(sizeof(ets_secure_boot_signature_t) == 4096, "invalid sig sector size");
#define MAX_KEY_DIGESTS 3
struct ets_secure_boot_key_digests {
const void *key_digests[MAX_KEY_DIGESTS];
bool allow_key_revoke;
};
#ifdef __cplusplus
}
#endif

74
tools/sdk/esp32/include/esp_rom/include/esp32s2/rom/sha.h Normal file
View File

@ -0,0 +1,74 @@
/*
ROM functions for hardware SHA support.
It is not recommended to use these functions directly. If using
them from esp-idf then use the esp_sha_lock_engine() and
esp_sha_lock_memory_block() functions in hwcrypto/sha.h to ensure
exclusive access.
*/
// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#ifndef _ROM_SHA_H_
#define _ROM_SHA_H_
#include <stdint.h>
#include <stdbool.h>
#include "ets_sys.h"
#ifdef __cplusplus
extern "C" {
#endif
typedef enum {
SHA1 = 0,
SHA2_224,
SHA2_256,
SHA2_384,
SHA2_512,
SHA2_512224,
SHA2_512256,
SHA2_512T,
SHA_TYPE_MAX
} SHA_TYPE;
typedef struct SHAContext {
bool start;
bool in_hardware; // Is this context currently in peripheral? Needs to be manually cleared if multiple SHAs are interleaved
SHA_TYPE type;
uint32_t state[16]; // For SHA1/SHA224/SHA256, used 8, other used 16
unsigned char buffer[128]; // For SHA1/SHA224/SHA256, used 64, other used 128
uint32_t total_bits[4];
} SHA_CTX;
void ets_sha_enable(void);
void ets_sha_disable(void);
ets_status_t ets_sha_init(SHA_CTX *ctx, SHA_TYPE type);
ets_status_t ets_sha_starts(SHA_CTX *ctx, uint16_t sha512_t);
void ets_sha_get_state(SHA_CTX *ctx);
void ets_sha_process(SHA_CTX *ctx, const unsigned char *input);
void ets_sha_update(SHA_CTX *ctx, const unsigned char *input, uint32_t input_bytes, bool update_ctx);
ets_status_t ets_sha_finish(SHA_CTX *ctx, unsigned char *output);
#ifdef __cplusplus
}
#endif
#endif /* _ROM_SHA_H_ */

578
tools/sdk/esp32/include/esp_rom/include/esp32s2/rom/spi_flash.h Normal file
View File

@ -0,0 +1,578 @@
// Copyright 2010-2016 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#ifndef _ROM_SPI_FLASH_H_
#define _ROM_SPI_FLASH_H_
#ifndef CONFIG_IDF_TARGET_ESP32S2
#error This file should only be included for ESP32-S2 target
#endif
#include <stdint.h>
#include <stdbool.h>
#include "esp_attr.h"
#include "soc/spi_mem_reg.h"
#ifdef __cplusplus
extern "C" {
#endif
/** \defgroup spi_flash_apis, spi flash operation related apis
* @brief spi_flash apis
*/
/** @addtogroup spi_flash_apis
* @{
*/
/*************************************************************
* Note
*************************************************************
* 1. ESP32 chip have 4 SPI slave/master, however, SPI0 is
* used as an SPI master to access Flash and ext-SRAM by
* Cache module. It will support Decryto read for Flash,
* read/write for ext-SRAM. And SPI1 is also used as an
* SPI master for Flash read/write and ext-SRAM read/write.
* It will support Encrypto write for Flash.
* 2. As an SPI master, SPI support Highest clock to 80M,
* however, Flash with 80M Clock should be configured
* for different Flash chips. If you want to use 80M
* clock We should use the SPI that is certified by
* Espressif. However, the certification is not started
* at the time, so please use 40M clock at the moment.
* 3. SPI Flash can use 2 lines or 4 lines mode. If you
* use 2 lines mode, you can save two pad SPIHD and
* SPIWP for gpio. ESP32 support configured SPI pad for
* Flash, the configuration is stored in efuse and flash.
* However, the configurations of pads should be certified
* by Espressif. If you use this function, please use 40M
* clock at the moment.
* 4. ESP32 support to use Common SPI command to configure
* Flash to QIO mode, if you failed to configure with fix
* command. With Common SPI Command, ESP32 can also provide
* a way to use same Common SPI command groups on different
* Flash chips.
* 5. This functions are not protected by packeting, Please use the
*************************************************************
*/
#define PERIPHS_SPI_FLASH_CMD SPI_MEM_CMD_REG(1)
#define PERIPHS_SPI_FLASH_ADDR SPI_MEM_ADDR_REG(1)
#define PERIPHS_SPI_FLASH_CTRL SPI_MEM_CTRL_REG(1)
#define PERIPHS_SPI_FLASH_CTRL1 SPI_MEM_CTRL1_REG(1)
#define PERIPHS_SPI_FLASH_STATUS SPI_MEM_RD_STATUS_REG(1)
#define PERIPHS_SPI_FLASH_USRREG SPI_MEM_USER_REG(1)
#define PERIPHS_SPI_FLASH_USRREG1 SPI_MEM_USER1_REG(1)
#define PERIPHS_SPI_FLASH_USRREG2 SPI_MEM_USER2_REG(1)
#define PERIPHS_SPI_FLASH_C0 SPI_MEM_W0_REG(1)
#define PERIPHS_SPI_FLASH_C1 SPI_MEM_W1_REG(1)
#define PERIPHS_SPI_FLASH_C2 SPI_MEM_W2_REG(1)
#define PERIPHS_SPI_FLASH_C3 SPI_MEM_W3_REG(1)
#define PERIPHS_SPI_FLASH_C4 SPI_MEM_W4_REG(1)
#define PERIPHS_SPI_FLASH_C5 SPI_MEM_W5_REG(1)
#define PERIPHS_SPI_FLASH_C6 SPI_MEM_W6_REG(1)
#define PERIPHS_SPI_FLASH_C7 SPI_MEM_W7_REG(1)
#define PERIPHS_SPI_FLASH_TX_CRC SPI_MEM_TX_CRC_REG(1)
#define SPI0_R_QIO_DUMMY_CYCLELEN 5
#define SPI0_R_QIO_ADDR_BITSLEN 23
#define SPI0_R_FAST_DUMMY_CYCLELEN 7
#define SPI0_R_DIO_DUMMY_CYCLELEN 3
#define SPI0_R_FAST_ADDR_BITSLEN 23
#define SPI0_R_SIO_ADDR_BITSLEN 23
#define SPI1_R_QIO_DUMMY_CYCLELEN 5
#define SPI1_R_QIO_ADDR_BITSLEN 23
#define SPI1_R_FAST_DUMMY_CYCLELEN 7
#define SPI1_R_DIO_DUMMY_CYCLELEN 3
#define SPI1_R_DIO_ADDR_BITSLEN 23
#define SPI1_R_FAST_ADDR_BITSLEN 23
#define SPI1_R_SIO_ADDR_BITSLEN 23
#define ESP_ROM_SPIFLASH_W_SIO_ADDR_BITSLEN 23
#define ESP_ROM_SPIFLASH_TWO_BYTE_STATUS_EN SPI_MEM_WRSR_2B
//SPI address register
#define ESP_ROM_SPIFLASH_BYTES_LEN 24
#define ESP_ROM_SPIFLASH_BUFF_BYTE_WRITE_NUM 32
#define ESP_ROM_SPIFLASH_BUFF_BYTE_READ_NUM 16
#define ESP_ROM_SPIFLASH_BUFF_BYTE_READ_BITS 0xf
//SPI status register
#define ESP_ROM_SPIFLASH_BUSY_FLAG BIT0
#define ESP_ROM_SPIFLASH_WRENABLE_FLAG BIT1
#define ESP_ROM_SPIFLASH_BP0 BIT2
#define ESP_ROM_SPIFLASH_BP1 BIT3
#define ESP_ROM_SPIFLASH_BP2 BIT4
#define ESP_ROM_SPIFLASH_WR_PROTECT (ESP_ROM_SPIFLASH_BP0|ESP_ROM_SPIFLASH_BP1|ESP_ROM_SPIFLASH_BP2)
#define ESP_ROM_SPIFLASH_QE BIT9
#define FLASH_ID_GD25LQ32C 0xC86016
typedef enum {
ESP_ROM_SPIFLASH_QIO_MODE = 0,
ESP_ROM_SPIFLASH_QOUT_MODE,
ESP_ROM_SPIFLASH_DIO_MODE,
ESP_ROM_SPIFLASH_DOUT_MODE,
ESP_ROM_SPIFLASH_FASTRD_MODE,
ESP_ROM_SPIFLASH_SLOWRD_MODE,
ESP_ROM_SPIFLASH_OPI_STR_MODE,
ESP_ROM_SPIFLASH_OPI_DTR_MODE,
ESP_ROM_SPIFLASH_OOUT_MODE,
ESP_ROM_SPIFLASH_OIO_STR_MODE,
ESP_ROM_SPIFLASH_OIO_DTR_MODE,
} esp_rom_spiflash_read_mode_t;
typedef enum {
ESP_ROM_SPIFLASH_RESULT_OK,
ESP_ROM_SPIFLASH_RESULT_ERR,
ESP_ROM_SPIFLASH_RESULT_TIMEOUT
} esp_rom_spiflash_result_t;
typedef struct {
uint32_t device_id;
uint32_t chip_size; // chip size in bytes
uint32_t block_size;
uint32_t sector_size;
uint32_t page_size;
uint32_t status_mask;
} esp_rom_spiflash_chip_t;
typedef struct {
uint8_t data_length;
uint8_t read_cmd0;
uint8_t read_cmd1;
uint8_t write_cmd;
uint16_t data_mask;
uint16_t data;
} esp_rom_spiflash_common_cmd_t;
/**
* @brief Fix the bug in SPI hardware communication with Flash/Ext-SRAM in High Speed.
* Please do not call this function in SDK.
*
* @param uint8_t spi: 0 for SPI0(Cache Access), 1 for SPI1(Flash read/write).
*
* @param uint8_t freqdiv: Pll is 80M, 4 for 20M, 3 for 26.7M, 2 for 40M, 1 for 80M.
*
* @return None
*/
void esp_rom_spiflash_fix_dummylen(uint8_t spi, uint8_t freqdiv);
/**
* @brief Select SPI Flash to QIO mode when WP pad is read from Flash.
* Please do not call this function in SDK.
*
* @param uint8_t wp_gpio_num: WP gpio number.
*
* @param uint32_t ishspi: 0 for spi, 1 for hspi, flash pad decided by strapping
* else, bit[5:0] spiclk, bit[11:6] spiq, bit[17:12] spid, bit[23:18] spics0, bit[29:24] spihd
*
* @return None
*/
void esp_rom_spiflash_select_qiomode(uint8_t wp_gpio_num, uint32_t ishspi);
/**
* @brief Set SPI Flash pad drivers.
* Please do not call this function in SDK.
*
* @param uint8_t wp_gpio_num: WP gpio number.
*
* @param uint32_t ishspi: 0 for spi, 1 for hspi, flash pad decided by strapping
* else, bit[5:0] spiclk, bit[11:6] spiq, bit[17:12] spid, bit[23:18] spics0, bit[29:24] spihd
*
* @param uint8_t *drvs: drvs[0]-bit[3:0] for cpiclk, bit[7:4] for spiq, drvs[1]-bit[3:0] for spid, drvs[1]-bit[7:4] for spid
* drvs[2]-bit[3:0] for spihd, drvs[2]-bit[7:4] for spiwp.
* Values usually read from falsh by rom code, function usually callde by rom code.
* if value with bit(3) set, the value is valid, bit[2:0] is the real value.
*
* @return None
*/
void esp_rom_spiflash_set_drvs(uint8_t wp_gpio_num, uint32_t ishspi, uint8_t *drvs);
/**
* @brief Select SPI Flash function for pads.
* Please do not call this function in SDK.
*
* @param uint32_t ishspi: 0 for spi, 1 for hspi, flash pad decided by strapping
* else, bit[5:0] spiclk, bit[11:6] spiq, bit[17:12] spid, bit[23:18] spics0, bit[29:24] spihd
*
* @return None
*/
void esp_rom_spiflash_select_padsfunc(uint32_t ishspi);
/**
* @brief SPI Flash init, clock divisor is 4, use 1 line Slow read mode.
* Please do not call this function in SDK.
*
* @param uint32_t ishspi: 0 for spi, 1 for hspi, flash pad decided by strapping
* else, bit[5:0] spiclk, bit[11:6] spiq, bit[17:12] spid, bit[23:18] spics0, bit[29:24] spihd
*
* @param uint8_t legacy: In legacy mode, more SPI command is used in line.
*
* @return None
*/
void esp_rom_spiflash_attach(uint32_t ishspi, bool legacy);
/**
* @brief SPI Read Flash status register. We use CMD 0x05 (RDSR).
* Please do not call this function in SDK.
*
* @param esp_rom_spiflash_chip_t *spi : The information for Flash, which is exported from ld file.
*
* @param uint32_t *status : The pointer to which to return the Flash status value.
*
* @return ESP_ROM_SPIFLASH_RESULT_OK : read OK.
* ESP_ROM_SPIFLASH_RESULT_ERR : read error.
* ESP_ROM_SPIFLASH_RESULT_TIMEOUT : read timeout.
*/
esp_rom_spiflash_result_t esp_rom_spiflash_read_status(esp_rom_spiflash_chip_t *spi, uint32_t *status);
/**
* @brief SPI Read Flash status register bits 8-15. We use CMD 0x35 (RDSR2).
* Please do not call this function in SDK.
*
* @param esp_rom_spiflash_chip_t *spi : The information for Flash, which is exported from ld file.
*
* @param uint32_t *status : The pointer to which to return the Flash status value.
*
* @return ESP_ROM_SPIFLASH_RESULT_OK : read OK.
* ESP_ROM_SPIFLASH_RESULT_ERR : read error.
* ESP_ROM_SPIFLASH_RESULT_TIMEOUT : read timeout.
*/
esp_rom_spiflash_result_t esp_rom_spiflash_read_statushigh(esp_rom_spiflash_chip_t *spi, uint32_t *status);
/**
* @brief Write status to Falsh status register.
* Please do not call this function in SDK.
*
* @param esp_rom_spiflash_chip_t *spi : The information for Flash, which is exported from ld file.
*
* @param uint32_t status_value : Value to .
*
* @return ESP_ROM_SPIFLASH_RESULT_OK : write OK.
* ESP_ROM_SPIFLASH_RESULT_ERR : write error.
* ESP_ROM_SPIFLASH_RESULT_TIMEOUT : write timeout.
*/
esp_rom_spiflash_result_t esp_rom_spiflash_write_status(esp_rom_spiflash_chip_t *spi, uint32_t status_value);
/**
* @brief Use a command to Read Flash status register.
* Please do not call this function in SDK.
*
* @param esp_rom_spiflash_chip_t *spi : The information for Flash, which is exported from ld file.
*
* @param uint32_t*status : The pointer to which to return the Flash status value.
*
* @return ESP_ROM_SPIFLASH_RESULT_OK : read OK.
* ESP_ROM_SPIFLASH_RESULT_ERR : read error.
* ESP_ROM_SPIFLASH_RESULT_TIMEOUT : read timeout.
*/
esp_rom_spiflash_result_t esp_rom_spiflash_read_user_cmd(uint32_t *status, uint8_t cmd);
/**
* @brief Config SPI Flash read mode when init.
* Please do not call this function in SDK.
*
* @param esp_rom_spiflash_read_mode_t mode : QIO/QOUT/DIO/DOUT/FastRD/SlowRD.
*
* This function does not try to set the QIO Enable bit in the status register, caller is responsible for this.
*
* @return ESP_ROM_SPIFLASH_RESULT_OK : config OK.
* ESP_ROM_SPIFLASH_RESULT_ERR : config error.
* ESP_ROM_SPIFLASH_RESULT_TIMEOUT : config timeout.
*/
esp_rom_spiflash_result_t esp_rom_spiflash_config_readmode(esp_rom_spiflash_read_mode_t mode);
/**
* @brief Config SPI Flash clock divisor.
* Please do not call this function in SDK.
*
* @param uint8_t freqdiv: clock divisor.
*
* @param uint8_t spi: 0 for SPI0, 1 for SPI1.
*
* @return ESP_ROM_SPIFLASH_RESULT_OK : config OK.
* ESP_ROM_SPIFLASH_RESULT_ERR : config error.
* ESP_ROM_SPIFLASH_RESULT_TIMEOUT : config timeout.
*/
esp_rom_spiflash_result_t esp_rom_spiflash_config_clk(uint8_t freqdiv, uint8_t spi);
/**
* @brief Send CommonCmd to Flash so that is can go into QIO mode, some Flash use different CMD.
* Please do not call this function in SDK.
*
* @param esp_rom_spiflash_common_cmd_t *cmd : A struct to show the action of a command.
*
* @return uint16_t 0 : do not send command any more.
* 1 : go to the next command.
* n > 1 : skip (n - 1) commands.
*/
uint16_t esp_rom_spiflash_common_cmd(esp_rom_spiflash_common_cmd_t *cmd);
/**
* @brief Unlock SPI write protect.
* Please do not call this function in SDK.
*
* @param None.
*
* @return ESP_ROM_SPIFLASH_RESULT_OK : Unlock OK.
* ESP_ROM_SPIFLASH_RESULT_ERR : Unlock error.
* ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Unlock timeout.
*/
esp_rom_spiflash_result_t esp_rom_spiflash_unlock(void);
/**
* @brief SPI write protect.
* Please do not call this function in SDK.
*
* @param None.
*
* @return ESP_ROM_SPIFLASH_RESULT_OK : Lock OK.
* ESP_ROM_SPIFLASH_RESULT_ERR : Lock error.
* ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Lock timeout.
*/
esp_rom_spiflash_result_t esp_rom_spiflash_lock(void);
/**
* @brief Update SPI Flash parameter.
* Please do not call this function in SDK.
*
* @param uint32_t deviceId : Device ID read from SPI, the low 32 bit.
*
* @param uint32_t chip_size : The Flash size.
*
* @param uint32_t block_size : The Flash block size.
*
* @param uint32_t sector_size : The Flash sector size.
*
* @param uint32_t page_size : The Flash page size.
*
* @param uint32_t status_mask : The Mask used when read status from Flash(use single CMD).
*
* @return ESP_ROM_SPIFLASH_RESULT_OK : Update OK.
* ESP_ROM_SPIFLASH_RESULT_ERR : Update error.
* ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Update timeout.
*/
esp_rom_spiflash_result_t esp_rom_spiflash_config_param(uint32_t deviceId, uint32_t chip_size, uint32_t block_size,
uint32_t sector_size, uint32_t page_size, uint32_t status_mask);
/**
* @brief Erase whole flash chip.
* Please do not call this function in SDK.
*
* @param None
*
* @return ESP_ROM_SPIFLASH_RESULT_OK : Erase OK.
* ESP_ROM_SPIFLASH_RESULT_ERR : Erase error.
* ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Erase timeout.
*/
esp_rom_spiflash_result_t esp_rom_spiflash_erase_chip(void);
/**
* @brief Erase a 64KB block of flash
* Uses SPI flash command D8H.
* Please do not call this function in SDK.
*
* @param uint32_t block_num : Which block to erase.
*
* @return ESP_ROM_SPIFLASH_RESULT_OK : Erase OK.
* ESP_ROM_SPIFLASH_RESULT_ERR : Erase error.
* ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Erase timeout.
*/
esp_rom_spiflash_result_t esp_rom_spiflash_erase_block(uint32_t block_num);
/**
* @brief Erase a sector of flash.
* Uses SPI flash command 20H.
* Please do not call this function in SDK.
*
* @param uint32_t sector_num : Which sector to erase.
*
* @return ESP_ROM_SPIFLASH_RESULT_OK : Erase OK.
* ESP_ROM_SPIFLASH_RESULT_ERR : Erase error.
* ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Erase timeout.
*/
esp_rom_spiflash_result_t esp_rom_spiflash_erase_sector(uint32_t sector_num);
/**
* @brief Erase some sectors.
* Please do not call this function in SDK.
*
* @param uint32_t start_addr : Start addr to erase, should be sector aligned.
*
* @param uint32_t area_len : Length to erase, should be sector aligned.
*
* @return ESP_ROM_SPIFLASH_RESULT_OK : Erase OK.
* ESP_ROM_SPIFLASH_RESULT_ERR : Erase error.
* ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Erase timeout.
*/
esp_rom_spiflash_result_t esp_rom_spiflash_erase_area(uint32_t start_addr, uint32_t area_len);
/**
* @brief Write Data to Flash, you should Erase it yourself if need.
* Please do not call this function in SDK.
*
* @param uint32_t dest_addr : Address to write, should be 4 bytes aligned.
*
* @param const uint32_t *src : The pointer to data which is to write.
*
* @param uint32_t len : Length to write, should be 4 bytes aligned.
*
* @return ESP_ROM_SPIFLASH_RESULT_OK : Write OK.
* ESP_ROM_SPIFLASH_RESULT_ERR : Write error.
* ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Write timeout.
*/
esp_rom_spiflash_result_t esp_rom_spiflash_write(uint32_t dest_addr, const uint32_t *src, int32_t len);
/**
* @brief Read Data from Flash, you should Erase it yourself if need.
* Please do not call this function in SDK.
*
* @param uint32_t src_addr : Address to read, should be 4 bytes aligned.
*
* @param uint32_t *dest : The buf to read the data.
*
* @param uint32_t len : Length to read, should be 4 bytes aligned.
*
* @return ESP_ROM_SPIFLASH_RESULT_OK : Read OK.
* ESP_ROM_SPIFLASH_RESULT_ERR : Read error.
* ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Read timeout.
*/
esp_rom_spiflash_result_t esp_rom_spiflash_read(uint32_t src_addr, uint32_t *dest, int32_t len);
/**
* @brief SPI1 go into encrypto mode.
* Please do not call this function in SDK.
*
* @param None
*
* @return None
*/
void esp_rom_spiflash_write_encrypted_enable(void);
/**
* @brief Prepare 32 Bytes data to encrpto writing, you should Erase it yourself if need.
* Please do not call this function in SDK.
*
* @param uint32_t flash_addr : Address to write, should be 32 bytes aligned.
*
* @param uint32_t *data : The pointer to data which is to write.
*
* @return ESP_ROM_SPIFLASH_RESULT_OK : Prepare OK.
* ESP_ROM_SPIFLASH_RESULT_ERR : Prepare error.
* ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Prepare timeout.
*/
esp_rom_spiflash_result_t esp_rom_spiflash_prepare_encrypted_data(uint32_t flash_addr, uint32_t *data);
/**
* @brief SPI1 go out of encrypto mode.
* Please do not call this function in SDK.
*
* @param None
*
* @return None
*/
void esp_rom_spiflash_write_encrypted_disable(void);
/**
* @brief Write data to flash with transparent encryption.
* @note Sectors to be written should already be erased.
*
* @note Please do not call this function in SDK.
*
* @param uint32_t flash_addr : Address to write, should be 32 byte aligned.
*
* @param uint32_t *data : The pointer to data to write. Note, this pointer must
* be 32 bit aligned and the content of the data will be
* modified by the encryption function.
*
* @param uint32_t len : Length to write, should be 32 bytes aligned.
*
* @return ESP_ROM_SPIFLASH_RESULT_OK : Data written successfully.
* ESP_ROM_SPIFLASH_RESULT_ERR : Encryption write error.
* ESP_ROM_SPIFLASH_RESULT_TIMEOUT : Encrypto write timeout.
*/
esp_rom_spiflash_result_t esp_rom_spiflash_write_encrypted(uint32_t flash_addr, uint32_t *data, uint32_t len);
/* TODO: figure out how to map these to their new names */
typedef enum {
SPI_ENCRYPT_DESTINATION_FLASH,
SPI_ENCRYPT_DESTINATION_PSRAM,
} SpiEncryptDest;
typedef esp_rom_spiflash_result_t SpiFlashOpResult;
SpiFlashOpResult SPI_Encrypt_Write(uint32_t flash_addr, const void* data, uint32_t len);
SpiFlashOpResult SPI_Encrypt_Write_Dest(SpiEncryptDest dest, uint32_t flash_addr, const void* data, uint32_t len);
void SPI_Write_Encrypt_Enable(void);
void SPI_Write_Encrypt_Disable(void);
/** @brief Wait until SPI flash write operation is complete
*
* @note Please do not call this function in SDK.
*
* Reads the Write In Progress bit of the SPI flash status register,
* repeats until this bit is zero (indicating write complete).
*
* @return ESP_ROM_SPIFLASH_RESULT_OK : Write is complete
* ESP_ROM_SPIFLASH_RESULT_ERR : Error while reading status.
*/
esp_rom_spiflash_result_t esp_rom_spiflash_wait_idle(esp_rom_spiflash_chip_t *spi);
/** @brief Enable Quad I/O pin functions
*
* @note Please do not call this function in SDK.
*
* Sets the HD & WP pin functions for Quad I/O modes, based on the
* efuse SPI pin configuration.
*
* @param wp_gpio_num - Number of the WP pin to reconfigure for quad I/O.
*
* @param spiconfig - Pin configuration, as returned from ets_efuse_get_spiconfig().
* - If this parameter is 0, default SPI pins are used and wp_gpio_num parameter is ignored.
* - If this parameter is 1, default HSPI pins are used and wp_gpio_num parameter is ignored.
* - For other values, this parameter encodes the HD pin number and also the CLK pin number. CLK pin selection is used
* to determine if HSPI or SPI peripheral will be used (use HSPI if CLK pin is the HSPI clock pin, otherwise use SPI).
* Both HD & WP pins are configured via GPIO matrix to map to the selected peripheral.
*/
void esp_rom_spiflash_select_qio_pins(uint8_t wp_gpio_num, uint32_t spiconfig);
/**
* @brief Clear WEL bit unconditionally.
*
* @return always ESP_ROM_SPIFLASH_RESULT_OK
*/
esp_rom_spiflash_result_t esp_rom_spiflash_write_disable(void);
/** @brief Global esp_rom_spiflash_chip_t structure used by ROM functions
*
*/
extern esp_rom_spiflash_chip_t g_rom_flashchip;
extern uint8_t g_rom_spiflash_dummy_len_plus[];
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* _ROM_SPI_FLASH_H_ */

456
tools/sdk/esp32/include/esp_rom/include/esp32s2/rom/uart.h Normal file
View File

@ -0,0 +1,456 @@
// Copyright 2010-2016 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#ifndef _ROM_UART_H_
#define _ROM_UART_H_
#include "esp_types.h"
#include "esp_attr.h"
#include "ets_sys.h"
#include "soc/soc.h"
#include "soc/uart_reg.h"
#ifdef __cplusplus
extern "C" {
#endif
/** \defgroup uart_apis, uart configuration and communication related apis
* @brief uart apis
*/
/** @addtogroup uart_apis
* @{
*/
#define RX_BUFF_SIZE 0x400
#define TX_BUFF_SIZE 100
//uart int enalbe register ctrl bits
#define UART_RCV_INTEN BIT0
#define UART_TRX_INTEN BIT1
#define UART_LINE_STATUS_INTEN BIT2
//uart int identification ctrl bits
#define UART_INT_FLAG_MASK 0x0E
//uart fifo ctrl bits
#define UART_CLR_RCV_FIFO BIT1
#define UART_CLR_TRX_FIFO BIT2
#define UART_RCVFIFO_TRG_LVL_BITS BIT6
//uart line control bits
#define UART_DIV_LATCH_ACCESS_BIT BIT7
//uart line status bits
#define UART_RCV_DATA_RDY_FLAG BIT0
#define UART_RCV_OVER_FLOW_FLAG BIT1
#define UART_RCV_PARITY_ERR_FLAG BIT2
#define UART_RCV_FRAME_ERR_FLAG BIT3
#define UART_BRK_INT_FLAG BIT4
#define UART_TRX_FIFO_EMPTY_FLAG BIT5
#define UART_TRX_ALL_EMPTY_FLAG BIT6 // include fifo and shift reg
#define UART_RCV_ERR_FLAG BIT7
//send and receive message frame head
#define FRAME_FLAG 0x7E
typedef enum {
UART_LINE_STATUS_INT_FLAG = 0x06,
UART_RCV_FIFO_INT_FLAG = 0x04,
UART_RCV_TMOUT_INT_FLAG = 0x0C,
UART_TXBUFF_EMPTY_INT_FLAG = 0x02
} UartIntType; //consider bit0 for int_flag
typedef enum {
RCV_ONE_BYTE = 0x0,
RCV_FOUR_BYTE = 0x1,
RCV_EIGHT_BYTE = 0x2,
RCV_FOURTEEN_BYTE = 0x3
} UartRcvFifoTrgLvl;
typedef enum {
FIVE_BITS = 0x0,
SIX_BITS = 0x1,
SEVEN_BITS = 0x2,
EIGHT_BITS = 0x3
} UartBitsNum4Char;
typedef enum {
ONE_STOP_BIT = 1,
ONE_HALF_STOP_BIT = 2,
TWO_STOP_BIT = 3
} UartStopBitsNum;
typedef enum {
NONE_BITS = 0,
ODD_BITS = 2,
EVEN_BITS = 3
} UartParityMode;
typedef enum {
STICK_PARITY_DIS = 0,
STICK_PARITY_EN = 2
} UartExistParity;
typedef enum {
BIT_RATE_9600 = 9600,
BIT_RATE_19200 = 19200,
BIT_RATE_38400 = 38400,
BIT_RATE_57600 = 57600,
BIT_RATE_115200 = 115200,
BIT_RATE_230400 = 230400,
BIT_RATE_460800 = 460800,
BIT_RATE_921600 = 921600
} UartBautRate;
typedef enum {
NONE_CTRL,
HARDWARE_CTRL,
XON_XOFF_CTRL
} UartFlowCtrl;
typedef enum {
EMPTY,
UNDER_WRITE,
WRITE_OVER
} RcvMsgBuffState;
typedef struct {
uint8_t *pRcvMsgBuff;
uint8_t *pWritePos;
uint8_t *pReadPos;
uint8_t TrigLvl;
RcvMsgBuffState BuffState;
} RcvMsgBuff;
typedef struct {
uint32_t TrxBuffSize;
uint8_t *pTrxBuff;
} TrxMsgBuff;
typedef enum {
BAUD_RATE_DET,
WAIT_SYNC_FRM,
SRCH_MSG_HEAD,
RCV_MSG_BODY,
RCV_ESC_CHAR,
} RcvMsgState;
typedef struct {
UartBautRate baut_rate;
UartBitsNum4Char data_bits;
UartExistParity exist_parity;
UartParityMode parity; // chip size in byte
UartStopBitsNum stop_bits;
UartFlowCtrl flow_ctrl;
uint8_t buff_uart_no; //indicate which uart use tx/rx buffer
RcvMsgBuff rcv_buff;
// TrxMsgBuff trx_buff;
RcvMsgState rcv_state;
int received;
} UartDevice;
/**
* @brief Init uart device struct value and reset uart0/uart1 rx.
* Please do not call this function in SDK.
*
* @param rxBuffer, must be a pointer to RX_BUFF_SIZE bytes or NULL
*
* @return None
*/
void uartAttach(void *rxBuffer);
/**
* @brief Init uart0 or uart1 for UART download booting mode.
* Please do not call this function in SDK.
*
* @param uint8_t uart_no : 0 for UART0, else for UART1.
*
* @param uint32_t clock : clock used by uart module, to adjust baudrate.
*
* @return None
*/
void Uart_Init(uint8_t uart_no, uint32_t clock);
/**
* @brief Modify uart baudrate.
* This function will reset RX/TX fifo for uart.
*
* @param uint8_t uart_no : 0 for UART0, 1 for UART1.
*
* @param uint32_t DivLatchValue : (clock << 4)/baudrate.
*
* @return None
*/
void uart_div_modify(uint8_t uart_no, uint32_t DivLatchValue);
/**
* @brief Re-calculate UART baudrate divisor for a given (changed)
* clock speed.
* This function will not reset RX/TX fifo for uart.
*
* @param uint8_t uart_no : 0 for UART0, 1 for UART1.
*
* @param uint32_t clock : clock used by uart module, to adjust baudrate.
*
* @return None
*/
void uart_div_reinit(uint8_t uart_no, uint32_t clock);
/**
* @brief Init uart0 or uart1 for UART download booting mode.
* Please do not call this function in SDK.
*
* @param uint8_t uart_no : 0 for UART0, 1 for UART1.
*
* @param uint8_t is_sync : 0, only one UART module, easy to detect, wait until detected;
* 1, two UART modules, hard to detect, detect and return.
*
* @return None
*/
int uart_baudrate_detect(uint8_t uart_no, uint8_t is_sync);
/**
* @brief Switch printf channel of uart_tx_one_char.
* Please do not call this function when printf.
*
* @param uint8_t uart_no : 0 for UART0, 1 for UART1.
*
* @return None
*/
void uart_tx_switch(uint8_t uart_no);
/**
* @brief Switch message exchange channel for UART download booting.
* Please do not call this function in SDK.
*
* @param uint8_t uart_no : 0 for UART0, 1 for UART1.
*
* @return None
*/
void uart_buff_switch(uint8_t uart_no);
/**
* @brief Output a char to printf channel, wait until fifo not full.
*
* @param None
*
* @return OK.
*/
STATUS uart_tx_one_char(uint8_t TxChar);
/**
* @brief Output a char to message exchange channel, wait until fifo not full.
* Please do not call this function in SDK.
*
* @param None
*
* @return OK.
*/
STATUS uart_tx_one_char2(uint8_t TxChar);
/**
* @brief Wait until uart tx full empty.
*
* @param uint8_t uart_no : 0 for UART0, 1 for UART1.
*
* @return None.
*/
void uart_tx_flush(uint8_t uart_no);
/**
* @brief Wait until uart tx full empty and the last char send ok.
*
* @param uart_no : 0 for UART0, 1 for UART1, 2 for UART2
*
* The function defined in ROM code has a bug, so we define the correct version
* here for compatibility.
*/
void uart_tx_wait_idle(uint8_t uart_no);
/**
* @brief Get an input char from message channel.
* Please do not call this function in SDK.
*
* @param uint8_t *pRxChar : the pointer to store the char.
*
* @return OK for successful.
* FAIL for failed.
*/
STATUS uart_rx_one_char(uint8_t *pRxChar);
/**
* @brief Get an input char from message channel, wait until successful.
* Please do not call this function in SDK.
*
* @param None
*
* @return char : input char value.
*/
char uart_rx_one_char_block(void);
/**
* @brief Get an input string line from message channel.
* Please do not call this function in SDK.
*
* @param uint8_t *pString : the pointer to store the string.
*
* @param uint8_t MaxStrlen : the max string length, incude '\0'.
*
* @return OK.
*/
STATUS UartRxString(uint8_t *pString, uint8_t MaxStrlen);
/**
* @brief Process uart recevied information in the interrupt handler.
* Please do not call this function in SDK.
*
* @param void *para : the message receive buffer.
*
* @return None
*/
void uart_rx_intr_handler(void *para);
/**
* @brief Get an char from receive buffer.
* Please do not call this function in SDK.
*
* @param RcvMsgBuff *pRxBuff : the pointer to the struct that include receive buffer.
*
* @param uint8_t *pRxByte : the pointer to store the char.
*
* @return OK for successful.
* FAIL for failed.
*/
STATUS uart_rx_readbuff( RcvMsgBuff *pRxBuff, uint8_t *pRxByte);
/**
* @brief Get all chars from receive buffer.
* Please do not call this function in SDK.
*
* @param uint8_t *pCmdLn : the pointer to store the string.
*
* @return OK for successful.
* FAIL for failed.
*/
STATUS UartGetCmdLn(uint8_t *pCmdLn);
/**
* @brief Get uart configuration struct.
* Please do not call this function in SDK.
*
* @param None
*
* @return UartDevice * : uart configuration struct pointer.
*/
UartDevice *GetUartDevice(void);
/**
* @brief Send an packet to download tool, with SLIP escaping.
* Please do not call this function in SDK.
*
* @param uint8_t *p : the pointer to output string.
*
* @param int len : the string length.
*
* @return None.
*/
void send_packet(uint8_t *p, int len);
/**
* @brief Receive an packet from download tool, with SLIP escaping.
* Please do not call this function in SDK.
*
* @param uint8_t *p : the pointer to input string.
*
* @param int len : If string length > len, the string will be truncated.
*
* @param uint8_t is_sync : 0, only one UART module;
* 1, two UART modules.
*
* @return int : the length of the string.
*/
int recv_packet(uint8_t *p, int len, uint8_t is_sync);
/**
* @brief Send an packet to download tool, with SLIP escaping.
* Please do not call this function in SDK.
*
* @param uint8_t *pData : the pointer to input string.
*
* @param uint16_t DataLen : the string length.
*
* @return OK for successful.
* FAIL for failed.
*/
STATUS SendMsg(uint8_t *pData, uint16_t DataLen);
/**
* @brief Receive an packet from download tool, with SLIP escaping.
* Please do not call this function in SDK.
*
* @param uint8_t *pData : the pointer to input string.
*
* @param uint16_t MaxDataLen : If string length > MaxDataLen, the string will be truncated.
*
* @param uint8_t is_sync : 0, only one UART module;
* 1, two UART modules.
*
* @return OK for successful.
* FAIL for failed.
*/
STATUS RcvMsg(uint8_t *pData, uint16_t MaxDataLen, uint8_t is_sync);
/**
* @brief Check if this UART is in download connection.
* Please do not call this function in SDK.
*
* @param uint8_t uart_no : 0 for UART0, 1 for UART1.
*
* @return ETS_NO_BOOT = 0 for no.
* SEL_UART_BOOT = BIT(1) for yes.
*/
uint8_t UartConnCheck(uint8_t uart_no);
/**
* @brief Initialize the USB ACM UART
* Needs to be fed a buffer of at least 128 bytes (ESP_ROM_CDC_ACM_WORK_BUF_MIN),
* plus any rx buffer you may want to have.
*
* @param cdc_acm_work_mem Pointer to work mem for CDC-ACM code
* @param cdc_acm_work_mem_len Length of work mem
*/
void Uart_Init_USB(void *cdc_acm_work_mem, int cdc_acm_work_mem_len);
/**
* @brief Install handler to reset the chip when a RTS change has been detected on the CDC-ACM 'UART'.
*/
void uart_usb_enable_reset_on_rts(void);
extern UartDevice UartDev;
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* _ROM_UART_H_ */

262
tools/sdk/esp32/include/esp_rom/include/esp32s2/rom/usb/cdc_acm.h Normal file
View File

@ -0,0 +1,262 @@
/*******************************************************************************
*
* Copyright(c) 2015,2016 Intel Corporation.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************/
#pragma once
#include <stdint.h>
#ifdef __cplusplus
extern "C" {
#endif
typedef void cdc_acm_device;
extern cdc_acm_device *uart_acm_dev;
#define ACM_BYTES_PER_TX 64
//ACM statuses are negative to distinguish from USB_DC_* status codes
#define ACM_STATUS_LINESTATE_CHANGED -1
#define ACM_STATUS_LINECODING_CHANGED -2
#define ACM_STATUS_TX -3
#define ACM_STATUS_RX -4
typedef void(*uart_irq_callback_t)(cdc_acm_device *dev, int status);
/**
* @brief Get amount of received characters in buffer
*
* @returns character count
*/
int cdc_acm_rx_fifo_cnt(cdc_acm_device *dev);
/*
* @brief Poll the device for input.
*
* @return -ENOTSUP Since underlying USB device controller always uses
* interrupts, polled mode UART APIs are not implemented for the UART interface
* exported by CDC ACM driver. Apps should use fifo_read API instead.
*/
int cdc_acm_poll_in(cdc_acm_device *dev, unsigned char *c);
/*
* @brief Output a character in polled mode.
*
* The UART poll method for USB UART is simulated by waiting till
* we get the next BULK In upcall from the USB device controller or 100 ms.
*
* @return the same character which is sent
*/
unsigned char cdc_acm_poll_out(cdc_acm_device *dev, unsigned char c);
/**
* @brief Fill FIFO with data
*
* @param dev CDC ACM device struct.
* @param tx_data Data to transmit.
* @param len Number of bytes to send.
*
* @return Number of bytes sent.
*/
int cdc_acm_fifo_fill(cdc_acm_device *dev, const uint8_t *tx_data, int len);
/**
* @brief Read data from FIFO
*
* @param dev CDC ACM device struct.
* @param rx_data Pointer to data container.
* @param size Container size.
*
* @return Number of bytes read.
*/
int cdc_acm_fifo_read(cdc_acm_device *dev, uint8_t *rx_data, const int size);
/**
* @brief Enable TX interrupt
*
* @param dev CDC ACM device struct.
*
* @return N/A.
*/
void cdc_acm_irq_tx_enable(cdc_acm_device *dev);
/**
* @brief Disable TX interrupt
*
* @param dev CDC ACM device struct.
*
* @return N/A.
*/
void cdc_acm_irq_tx_disable(cdc_acm_device *dev);
/**
* @brief Check if Tx IRQ has been raised
*
* @param dev CDC ACM device struct.
*
* @return 1 if a Tx IRQ is pending, 0 otherwise.
*/
int cdc_acm_irq_tx_ready(cdc_acm_device *dev);
/**
* @brief Enable RX interrupt
*
* @param dev CDC ACM device struct.
*
* @return N/A
*/
void cdc_acm_irq_rx_enable(cdc_acm_device *dev);
/**
* @brief Disable RX interrupt
*
* @param dev CDC ACM device struct.
*
* @return N/A.
*/
void cdc_acm_irq_rx_disable(cdc_acm_device *dev);
/**
* @brief Enable line state interrupt
*
* @param dev CDC ACM device struct.
*
* @return N/A.
*/
void cdc_acm_irq_state_enable(cdc_acm_device *dev);
/**
* @brief Disable line state interrupt
*
* @param dev CDC ACM device struct.
*
* @return N/A.
*/
void cdc_acm_irq_state_disable(cdc_acm_device *dev);
/**
* @brief Check if Rx IRQ has been raised
*
* @param dev CDC ACM device struct.
*
* @return 1 if an IRQ is ready, 0 otherwise.
*/
int cdc_acm_irq_rx_ready(cdc_acm_device *dev);
/**
* @brief Check if Tx or Rx IRQ is pending
*
* @param dev CDC ACM device struct.
*
* @return 1 if a Tx or Rx IRQ is pending, 0 otherwise.
*/
int cdc_acm_irq_is_pending(cdc_acm_device *dev);
/**
* @brief Set the callback function pointer for IRQ.
*
* @param dev CDC ACM device struct.
* @param cb Callback function pointer.
*
* @return N/A
*/
void cdc_acm_irq_callback_set(cdc_acm_device *dev, uart_irq_callback_t cb);
/**
* @brief Manipulate line control for UART.
*
* @param dev CDC ACM device struct
* @param ctrl The line control to be manipulated
* @param val Value to set the line control
*
* @return 0 if successful, failed otherwise.
*/
int cdc_acm_line_ctrl_set(cdc_acm_device *dev, uint32_t ctrl, uint32_t val);
/**
* @brief Manipulate line control for UART.
*
* @param dev CDC ACM device struct
* @param ctrl The line control to be manipulated
* @param val Value to set the line control
*
* @return 0 if successful, failed otherwise.
*/
int cdc_acm_line_ctrl_get(cdc_acm_device *dev, uint32_t ctrl, uint32_t *val);
/**
* @brief Initialize UART channel
*
* This routine is called to reset the chip in a quiescent state.
* It is assumed that this function is called only once per UART.
*
* @param mem_chunk Memory chunk to use for internal use
* @param mem_chunk_size Size of the memory chunk in bytes
*
* @return dev or NULL
*/
cdc_acm_device *cdc_acm_init(void *mem_chunk, int mem_chunk_size);
/** Common line controls for UART.*/
#define LINE_CTRL_BAUD_RATE (1 << 0)
#define LINE_CTRL_RTS (1 << 1)
#define LINE_CTRL_DTR (1 << 2)
#define LINE_CTRL_DCD (1 << 3)
#define LINE_CTRL_DSR (1 << 4)
/* Common communication errors for UART.*/
/** @brief Overrun error */
#define UART_ERROR_OVERRUN (1 << 0)
/** @brief Parity error */
#define UART_ERROR_PARITY (1 << 1)
/** @brief Framing error */
#define UART_ERROR_FRAMING (1 << 2)
/**
* @brief Break interrupt error:
*
* A break interrupt was received. This happens when the serial input is
* held at a logic '0' state for longer than the sum of start time + data bits
* + parity + stop bits.
*/
#define UART_ERROR_BREAK (1 << 3)
#ifdef __cplusplus
}
#endif

30
tools/sdk/esp32/include/esp_rom/include/esp32s2/rom/usb/chip_usb_dw_wrapper.h Normal file
View File

@ -0,0 +1,30 @@
// Copyright 2019-2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#pragma once
#include <stdint.h>
#ifdef __cplusplus
extern "C" {
#endif
int chip_usb_dw_init(void);
int chip_usb_dw_did_persist(void);
void chip_usb_dw_prepare_persist(void);
uint32_t chip_usb_get_persist_flags(void);
void chip_usb_set_persist_flags(uint32_t flags);
#ifdef __cplusplus
}
#endif

180
tools/sdk/esp32/include/esp_rom/include/esp32s2/rom/usb/cpio.h Normal file
View File

@ -0,0 +1,180 @@
// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/**
* Archive to parse cpio data in the newc and crc formats. Generate a cpio archive like that by e.g.
* find . | cpio -o -H newc > archive.cpio
*/
#pragma once
#include <stdio.h>
#include <stdint.h>
#include <stdbool.h>
#ifdef __cplusplus
extern "C" {
#endif
#define CPIO_MODE_FILETYPE_MASK 0xF000
#define CPIO_MODE_FILETYPE_SOCKET 0xC000
#define CPIO_MODE_FILETYPE_SYMLINK 0xA000
#define CPIO_MODE_FILETYPE_REGULAR 0x8000
#define CPIO_MODE_FILETYPE_BLOCKDEV 0x6000
#define CPIO_MODE_FILETYPE_DIR 0x4000
#define CPIO_MODE_FILETYPE_CHARDEV 0x2000
#define CPIO_MODE_FILETYPE_FIFO 0x1000
#define CPIO_MODE_SUID 0x0800
#define CPIO_MODE_SGID 0x0400
#define CPIO_MODE_STICKY 0x0200
typedef struct {
size_t filesize;
char *name;
uint32_t mode;
uint32_t check;
} cpio_file_t;
typedef enum {
CPIO_RET_MORE = 0,
CPIO_RET_DONE,
CPIO_RET_ERR
} cpio_ret_t;
typedef struct cpio_handle_data_t cpio_handle_data_t;
typedef cpio_handle_data_t *cpio_handle_t;
typedef enum {
CPIO_RSN_FILE_ALL = 0,
CPIO_RSN_FILE_INITIAL,
CPIO_RSN_FILE_MORE,
CPIO_RSN_FILE_END
} cpio_callback_reason_t;
/**
* Callback for cpio file data.
*
* This callback will be called by the library to indicate data for a file is available.
*
* For files in the cpio archive that fit entirely in the internal buffer, or when no internal
* buffer is available, are entirely contained in the buffer fed to cpio_feed(), this callback
* is only called once, with reason=CPIO_RNS_FILE_ALL. fileinfo will contain the information
* for that specific file (name, size, ...), buff_offset will be 0, buff_len is the file
* size and buff contains all the information for the file.
*
* For files that do not fit in the buffer, this callback will be called multiple times.
* The initial time with reason=CPIO_RSN_FILE_INITIAL, when more data is available with
* CPIO_RSN_FILE_MORE and finally with CPIO_RSN_FILE_END. For these calls, fileinfo
* will again contain file information. buff will be the information contained in the
* file at offset buff_offset, and the length of this buffer will be in buff_len.
*
* The library guarantees to feed all file data to the callback consequitively, so
* within the same file, the buff_offset from a call will always be (buff_offset+buff_len)
* from the call before that. If cpio_start is
*
* The library also guarantees every file in the cpio archive will either generate a single
* callback call with CPIO_RSN_ALL, or multiple with in sequence CPIO_RSN_FILE_INITIAL, 0 or
* more CPIO_RSN_FILE_MORE and finally a CPIO_RSN_FILE_END.
*
* When a non-zero buffer size is passed to cpio_start, the library guarantees that all callback
* calls with a reason of CPIO_RSN_FILE_INITIAL and CPIO_RSN_FILE_MORE will have a buffer
* filled with exactly this amount of bytes.
*
*/
typedef void (*cpio_callback_t)(cpio_callback_reason_t reason, cpio_file_t *fileinfo, size_t buff_offset, size_t buff_len, char *buff, void *arg);
/**
* @brief Initialize a cpio handle.
*
* Call this to start parsing a cpio archive. You can set the callback that handles the
* files/data here.
*
* @param callback The callback that will handle the data of the files inside the cpio archive
*
* @param cbarg User-supplied argument. The callback will be called with this as an argument.
*
* @param buflen Length of internal buffer used.
* If this is zero, the callback will be called with data that lives in the data buffer
* supplied to the cpio library by whomever called cpio_feed(). Because this library has
* no power over that buffer, the callback can be passed as little as 1 and as many as
* INT_MAX bytes at a time.
* If this is non-zero, the library will allocate an internal buffer of this size. All
* cpio_feed()-calls will be rebuffered, and the callback is guaranteed to only be called
* with this many bytes in the buffer, given there's enough data in the file to fill it.
*
* @param memchunk Chunk of memory to allocate everything (handle, I/O buffer, filename buffer) in. Minimum size
* (estimate) is 160+buflen+sizeof(largest filename/path).
* @param memchunklen Size of the mem chunk
*
* @return
* - Success: A pointer to a cpio handle
* - Error: NULL
*
*/
cpio_handle_t cpio_start(cpio_callback_t callback, void *cbarg, size_t buflen, void *memchunk, int memchunklen);
/**
* @brief Feed data from a cpio archive into the library
*
* This routine is used to feed consecutive data of the cpio archive into the library. While processing,
* the library can call the callback function one or more times if needed.
*
* @param cpio Handle obtained by calling cpio_start()
*
* @param buffer Pointer to buffer containing cpio archive data
*
* @param len Length of the buffer, in bytes
*
* @return
* - CPIO_RET_MORE: CPIO archive isn't done yet, please feed more data.
* - CPIO_RET_DONE: CPUI archive is finished.
* - CPIO_RET_ERR: Invalid CPIO archive data; decoding aborted.
*
*/
cpio_ret_t cpio_feed(cpio_handle_t cpio, char *buffer, int len);
/**
* @brief Indicate there is no more cpio data to be fed into the archive
*
* This call is to be called when the source data is exhausted. Normally, the library can find the end of the
* cpio archive by looking for the end marker,
*
* @param timer_conf Pointer of LEDC timer configure struct
*
*
* @return
* - CPIO_RET_DONE on success
* - CPIO_RET_ERR when cpio archive is invalid
*
*/
cpio_ret_t cpio_done(cpio_handle_t cpio);
/**
* @brief Free the memory allocated for a cpio handle.
*
* @param cpio Handle obtained by calling cpio_start()
*
* @return
* - CPIO_RET_DONE on success
*
*/
cpio_ret_t cpio_destroy(cpio_handle_t cpio);
#ifdef __cplusplus
}
#endif

174
tools/sdk/esp32/include/esp_rom/include/esp32s2/rom/usb/usb_cdc.h Normal file
View File

@ -0,0 +1,174 @@
/* usb_cdc.h - USB CDC-ACM and CDC-ECM public header */
/*
* Copyright (c) 2017 PHYTEC Messtechnik GmbH
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @brief USB Communications Device Class (CDC) public header
*
* Header follows the Class Definitions for
* Communications Devices Specification (CDC120-20101103-track.pdf),
* PSTN Devices Specification (PSTN120.pdf) and
* Ethernet Control Model Devices Specification (ECM120.pdf).
* Header is limited to ACM and ECM Subclasses.
*/
#pragma once
#include <stdint.h>
#include <sys/cdefs.h>
#ifdef __cplusplus
extern "C" {
#endif
/** CDC Specification release number in BCD format */
#define CDC_SRN_1_20 0x0120
/** Communications Class Subclass Codes */
#define ACM_SUBCLASS 0x02
#define ECM_SUBCLASS 0x06
#define EEM_SUBCLASS 0x0c
/** Communications Class Protocol Codes */
#define AT_CMD_V250_PROTOCOL 0x01
#define EEM_PROTOCOL 0x07
/**
* @brief Data Class Interface Codes
* @note CDC120-20101103-track.pdf, 4.5, Table 6
*/
#define DATA_INTERFACE_CLASS 0x0A
/**
* @brief Values for the bDescriptorType Field
* @note CDC120-20101103-track.pdf, 5.2.3, Table 12
*/
#define CS_INTERFACE 0x24
#define CS_ENDPOINT 0x25
/**
* @brief bDescriptor SubType for Communications
* Class Functional Descriptors
* @note CDC120-20101103-track.pdf, 5.2.3, Table 13
*/
#define HEADER_FUNC_DESC 0x00
#define CALL_MANAGEMENT_FUNC_DESC 0x01
#define ACM_FUNC_DESC 0x02
#define UNION_FUNC_DESC 0x06
#define ETHERNET_FUNC_DESC 0x0F
/**
* @brief PSTN Subclass Specific Requests
* for ACM devices
* @note PSTN120.pdf, 6.3, Table 13
*/
#define CDC_SEND_ENC_CMD 0x00
#define CDC_GET_ENC_RSP 0x01
#define SET_LINE_CODING 0x20
#define GET_LINE_CODING 0x21
#define SET_CONTROL_LINE_STATE 0x22
/** Control Signal Bitmap Values for SetControlLineState */
#define SET_CONTROL_LINE_STATE_RTS 0x02
#define SET_CONTROL_LINE_STATE_DTR 0x01
/** UART State Bitmap Values */
#define SERIAL_STATE_OVERRUN 0x40
#define SERIAL_STATE_PARITY 0x20
#define SERIAL_STATE_FRAMING 0x10
#define SERIAL_STATE_RING 0x08
#define SERIAL_STATE_BREAK 0x04
#define SERIAL_STATE_TX_CARRIER 0x02
#define SERIAL_STATE_RX_CARRIER 0x01
/**
* @brief Class-Specific Request Codes for Ethernet subclass
* @note ECM120.pdf, 6.2, Table 6
*/
#define SET_ETHERNET_MULTICAST_FILTERS 0x40
#define SET_ETHERNET_PM_FILTER 0x41
#define GET_ETHERNET_PM_FILTER 0x42
#define SET_ETHERNET_PACKET_FILTER 0x43
#define GET_ETHERNET_STATISTIC 0x44
/** Ethernet Packet Filter Bitmap */
#define PACKET_TYPE_MULTICAST 0x10
#define PACKET_TYPE_BROADCAST 0x08
#define PACKET_TYPE_DIRECTED 0x04
#define PACKET_TYPE_ALL_MULTICAST 0x02
#define PACKET_TYPE_PROMISCUOUS 0x01
/** Header Functional Descriptor */
struct cdc_header_descriptor {
uint8_t bFunctionLength;
uint8_t bDescriptorType;
uint8_t bDescriptorSubtype;
uint16_t bcdCDC;
} __packed;
/** Union Interface Functional Descriptor */
struct cdc_union_descriptor {
uint8_t bFunctionLength;
uint8_t bDescriptorType;
uint8_t bDescriptorSubtype;
uint8_t bControlInterface;
uint8_t bSubordinateInterface0;
} __packed;
/** Call Management Functional Descriptor */
struct cdc_cm_descriptor {
uint8_t bFunctionLength;
uint8_t bDescriptorType;
uint8_t bDescriptorSubtype;
uint8_t bmCapabilities;
uint8_t bDataInterface;
} __packed;
/** Abstract Control Management Functional Descriptor */
struct cdc_acm_descriptor {
uint8_t bFunctionLength;
uint8_t bDescriptorType;
uint8_t bDescriptorSubtype;
uint8_t bmCapabilities;
} __packed;
/** Data structure for GET_LINE_CODING / SET_LINE_CODING class requests */
struct cdc_acm_line_coding {
uint32_t dwDTERate;
uint8_t bCharFormat;
uint8_t bParityType;
uint8_t bDataBits;
} __packed;
/** Data structure for the notification about SerialState */
struct cdc_acm_notification {
uint8_t bmRequestType;
uint8_t bNotificationType;
uint16_t wValue;
uint16_t wIndex;
uint16_t wLength;
uint16_t data;
} __packed;
/** Ethernet Networking Functional Descriptor */
struct cdc_ecm_descriptor {
uint8_t bFunctionLength;
uint8_t bDescriptorType;
uint8_t bDescriptorSubtype;
uint8_t iMACAddress;
uint32_t bmEthernetStatistics;
uint16_t wMaxSegmentSize;
uint16_t wNumberMCFilters;
uint8_t bNumberPowerFilters;
} __packed;
#ifdef __cplusplus
}
#endif

249
tools/sdk/esp32/include/esp_rom/include/esp32s2/rom/usb/usb_common.h Normal file
View File

@ -0,0 +1,249 @@
/***************************************************************************
*
*
* Copyright(c) 2015,2016 Intel Corporation.
* Copyright(c) 2017 PHYTEC Messtechnik GmbH
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
***************************************************************************/
/**
* @file
* @brief useful constants and macros for the USB application
*
* This file contains useful constants and macros for the USB applications.
*/
#pragma once
#include <stdint.h>
#include <sys/cdefs.h>
#ifdef __cplusplus
extern "C" {
#endif
#define BCD(x) ((((x) / 10) << 4) | ((x) / 10))
/* Descriptor size in bytes */
#define USB_DEVICE_DESC_SIZE 18
#define USB_CONFIGURATION_DESC_SIZE 9
#define USB_INTERFACE_DESC_SIZE 9
#define USB_ENDPOINT_DESC_SIZE 7
#define USB_STRING_DESC_SIZE 4
#define USB_HID_DESC_SIZE 9
#define USB_DFU_DESC_SIZE 9
#define USB_DEVICE_QUAL_DESC_SIZE 10
#define USB_INTERFACE_ASSOC_DESC_SIZE 8
/* Descriptor type */
#define USB_DEVICE_DESC 0x01
#define USB_CONFIGURATION_DESC 0x02
#define USB_STRING_DESC 0x03
#define USB_INTERFACE_DESC 0x04
#define USB_ENDPOINT_DESC 0x05
#define USB_DEVICE_QUAL_DESC 0x06
#define USB_INTERFACE_ASSOC_DESC 0x0B
#define USB_DEVICE_CAPABILITY_DESC 0x10
#define USB_HID_DESC 0x21
#define USB_HID_REPORT_DESC 0x22
#define USB_DFU_FUNCTIONAL_DESC 0x21
#define USB_ASSOCIATION_DESC 0x0B
#define USB_BINARY_OBJECT_STORE_DESC 0x0F
/* Useful define */
#define USB_1_1 0x0110
#define USB_2_0 0x0200
/* Set USB version to 2.1 so that the host will request the BOS descriptor */
#define USB_2_1 0x0210
#define BCDDEVICE_RELNUM (BCD(KERNEL_VERSION_MAJOR) << 8 | \
BCD(KERNEL_VERSION_MINOR))
/* 100mA max power, per 2mA units */
/* USB 1.1 spec indicates 100mA(max) per unit load, up to 5 loads */
#define MAX_LOW_POWER 0x32
#define MAX_HIGH_POWER 0xFA
/* bmAttributes:
* D7:Reserved, always 1,
* D6:Self-Powered -> 1,
* D5:Remote Wakeup -> 0,
* D4...0:Reserved -> 0
*/
#define USB_CONFIGURATION_ATTRIBUTES 0xC0
/* Classes */
#define COMMUNICATION_DEVICE_CLASS 0x02
#define COMMUNICATION_DEVICE_CLASS_DATA 0x0A
#define HID_CLASS 0x03
#define MASS_STORAGE_CLASS 0x08
#define WIRELESS_DEVICE_CLASS 0xE0
#define MISC_CLASS 0xEF
#define CUSTOM_CLASS 0xFF
#define DFU_DEVICE_CLASS 0xFE
/* Sub-classes */
#define CDC_NCM_SUBCLASS 0x0d
#define BOOT_INTERFACE_SUBCLASS 0x01
#define SCSI_TRANSPARENT_SUBCLASS 0x06
#define DFU_INTERFACE_SUBCLASS 0x01
#define RF_SUBCLASS 0x01
#define CUSTOM_SUBCLASS 0xFF
#define COMMON_SUBCLASS 0x02
/* Misc subclasses */
#define MISC_RNDIS_SUBCLASS 0x04
#define CDC_ABSTRACT_CONTROL_MODEL 0x02
/* Protocols */
#define V25TER_PROTOCOL 0x01
#define MOUSE_PROTOCOL 0x02
#define BULK_ONLY_PROTOCOL 0x50
#define DFU_RUNTIME_PROTOCOL 0x01
#define DFU_MODE_PROTOCOL 0x02
#define BLUETOOTH_PROTOCOL 0x01
/* CDC ACM protocols */
#define ACM_VENDOR_PROTOCOL 0xFF
/* Misc protocols */
#define MISC_ETHERNET_PROTOCOL 0x01
#define IAD_PROTOCOL 0x01
/** Standard Device Descriptor */
struct usb_device_descriptor {
uint8_t bLength;
uint8_t bDescriptorType;
uint16_t bcdUSB;
uint8_t bDeviceClass;
uint8_t bDeviceSubClass;
uint8_t bDeviceProtocol;
uint8_t bMaxPacketSize0;
uint16_t idVendor;
uint16_t idProduct;
uint16_t bcdDevice;
uint8_t iManufacturer;
uint8_t iProduct;
uint8_t iSerialNumber;
uint8_t bNumConfigurations;
} __packed;
/** Unicode (UTF16LE) String Descriptor */
struct usb_string_descriptor {
uint8_t bLength;
uint8_t bDescriptorType;
uint16_t bString;
} __packed;
/** Association Descriptor */
struct usb_association_descriptor {
uint8_t bLength;
uint8_t bDescriptorType;
uint8_t bFirstInterface;
uint8_t bInterfaceCount;
uint8_t bFunctionClass;
uint8_t bFunctionSubClass;
uint8_t bFunctionProtocol;
uint8_t iFunction;
} __packed;
/** Standard Configuration Descriptor */
struct usb_cfg_descriptor {
uint8_t bLength;
uint8_t bDescriptorType;
uint16_t wTotalLength;
uint8_t bNumInterfaces;
uint8_t bConfigurationValue;
uint8_t iConfiguration;
uint8_t bmAttributes;
uint8_t bMaxPower;
} __packed;
/** Standard Interface Descriptor */
struct usb_if_descriptor {
uint8_t bLength;
uint8_t bDescriptorType;
uint8_t bInterfaceNumber;
uint8_t bAlternateSetting;
uint8_t bNumEndpoints;
uint8_t bInterfaceClass;
uint8_t bInterfaceSubClass;
uint8_t bInterfaceProtocol;
uint8_t iInterface;
} __packed;
/** Standard Endpoint Descriptor */
struct usb_ep_descriptor {
uint8_t bLength;
uint8_t bDescriptorType;
uint8_t bEndpointAddress;
uint8_t bmAttributes;
uint16_t wMaxPacketSize;
uint8_t bInterval;
} __packed;
struct string_descriptor_zero {
uint8_t bLength;
uint8_t bDescriptorType;
uint16_t wBcdLang[];
} __packed;
struct string_descriptor {
uint8_t bLength;
uint8_t bDescriptorType;
uint16_t bString[];
} __packed;
#define ROM_MAX_CFG_DESC_CNT 1
struct rom_usb_descriptors {
const struct usb_device_descriptor *device_descr;
const void *config_descr[ROM_MAX_CFG_DESC_CNT];
int string_count; // including string_descriptor_zero
const struct string_descriptor_zero *string0_descr;
const struct string_descriptor *string_descrs[];
};
/* Descriptors defined in the ROM */
extern struct usb_device_descriptor general_device_descr;
extern const void* acm_config_descr;
extern const void* dfu_config_descr;
extern const struct string_descriptor str_manu_descr;
extern const struct string_descriptor str_prod_descr;
extern const struct string_descriptor_zero string0_descr;
extern const struct rom_usb_descriptors acm_usb_descriptors;
extern const struct rom_usb_descriptors dfu_usb_descriptors;
extern const struct rom_usb_descriptors *rom_usb_curr_desc;
/* ROM patch: set the ACM descriptor with the correct serial number.
* Only needed on ESP32-S2, on later chips the ROM descriptor is correct.
*/
void rom_usb_cdc_set_descriptor_patch(void);
#ifdef __cplusplus
}
#endif

392
tools/sdk/esp32/include/esp_rom/include/esp32s2/rom/usb/usb_dc.h Normal file
View File

@ -0,0 +1,392 @@
/* usb_dc.h - USB device controller driver interface */
/*
* Copyright (c) 2016 Intel Corporation.
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @brief USB device controller APIs
*
* This file contains the USB device controller APIs. All device controller
* drivers should implement the APIs described in this file.
*/
#pragma once
#include <stdint.h>
#ifdef __cplusplus
extern "C" {
#endif
/**
* USB endpoint direction and number.
*/
#define USB_EP_DIR_MASK 0x80
#define USB_EP_DIR_IN 0x80
#define USB_EP_DIR_OUT 0x00
/**
* USB Driver Status Codes
*/
enum usb_dc_status_code {
USB_DC_ERROR, /* USB error reported by the controller */
USB_DC_RESET, /* USB reset */
/* USB connection established, hardware enumeration is completed */
USB_DC_CONNECTED,
USB_DC_CONFIGURED, /* USB configuration done */
USB_DC_DISCONNECTED, /* USB connection lost */
USB_DC_SUSPEND, /* USB connection suspended by the HOST */
USB_DC_RESUME, /* USB connection resumed by the HOST */
USB_DC_INTERFACE, /* USB interface selected */
USB_DC_SET_HALT, /* Set Feature ENDPOINT_HALT received */
USB_DC_CLEAR_HALT, /* Clear Feature ENDPOINT_HALT received */
USB_DC_UNKNOWN /* Initial USB connection status */
};
/**
* USB Endpoint Callback Status Codes
*/
enum usb_dc_ep_cb_status_code {
USB_DC_EP_SETUP, /* SETUP received */
/* Out transaction on this EP, data is available for read */
USB_DC_EP_DATA_OUT,
USB_DC_EP_DATA_IN, /* In transaction done on this EP */
};
/**
* USB Endpoint type
*/
enum usb_dc_ep_type {
USB_DC_EP_CONTROL = 0, /* Control type endpoint */
USB_DC_EP_ISOCHRONOUS, /* Isochronous type endpoint */
USB_DC_EP_BULK, /* Bulk type endpoint */
USB_DC_EP_INTERRUPT /* Interrupt type endpoint */
};
/**
* USB Endpoint Configuration.
*/
struct usb_dc_ep_cfg_data {
/** The number associated with the EP in the device
* configuration structure
* IN EP = 0x80 | \<endpoint number\>
* OUT EP = 0x00 | \<endpoint number\>
*/
uint8_t ep_addr;
uint16_t ep_mps; /** Endpoint max packet size */
enum usb_dc_ep_type ep_type; /** Endpoint type */
};
/**
* Callback function signature for the USB Endpoint status
*/
typedef void (*usb_dc_ep_callback)(uint8_t ep,
enum usb_dc_ep_cb_status_code cb_status);
/**
* Callback function signature for the device
*/
typedef void (*usb_dc_status_callback)(enum usb_dc_status_code cb_status,
uint8_t *param);
/**
* @brief attach USB for device connection
*
* Function to attach USB for device connection. Upon success, the USB PLL
* is enabled, and the USB device is now capable of transmitting and receiving
* on the USB bus and of generating interrupts.
*
* @return 0 on success, negative errno code on fail.
*/
int usb_dc_attach(void);
/**
* @brief detach the USB device
*
* Function to detach the USB device. Upon success, the USB hardware PLL
* is powered down and USB communication is disabled.
*
* @return 0 on success, negative errno code on fail.
*/
int usb_dc_detach(void);
/**
* @brief reset the USB device
*
* This function returns the USB device and firmware back to it's initial state.
* N.B. the USB PLL is handled by the usb_detach function
*
* @return 0 on success, negative errno code on fail.
*/
int usb_dc_reset(void);
/**
* @brief set USB device address
*
* @param[in] addr device address
*
* @return 0 on success, negative errno code on fail.
*/
int usb_dc_set_address(const uint8_t addr);
/**
* @brief set USB device controller status callback
*
* Function to set USB device controller status callback. The registered
* callback is used to report changes in the status of the device controller.
*
* @param[in] cb callback function
*
* @return 0 on success, negative errno code on fail.
*/
int usb_dc_set_status_callback(const usb_dc_status_callback cb);
/**
* @brief check endpoint capabilities
*
* Function to check capabilities of an endpoint. usb_dc_ep_cfg_data structure
* provides the endpoint configuration parameters: endpoint address,
* endpoint maximum packet size and endpoint type.
* The driver should check endpoint capabilities and return 0 if the
* endpoint configuration is possible.
*
* @param[in] cfg Endpoint config
*
* @return 0 on success, negative errno code on fail.
*/
int usb_dc_ep_check_cap(const struct usb_dc_ep_cfg_data *const cfg);
/**
* @brief configure endpoint
*
* Function to configure an endpoint. usb_dc_ep_cfg_data structure provides
* the endpoint configuration parameters: endpoint address, endpoint maximum
* packet size and endpoint type.
*
* @param[in] cfg Endpoint config
*
* @return 0 on success, negative errno code on fail.
*/
int usb_dc_ep_configure(const struct usb_dc_ep_cfg_data *const cfg);
/**
* @brief set stall condition for the selected endpoint
*
* @param[in] ep Endpoint address corresponding to the one
* listed in the device configuration table
*
* @return 0 on success, negative errno code on fail.
*/
int usb_dc_ep_set_stall(const uint8_t ep);
/**
* @brief clear stall condition for the selected endpoint
*
* @param[in] ep Endpoint address corresponding to the one
* listed in the device configuration table
*
* @return 0 on success, negative errno code on fail.
*/
int usb_dc_ep_clear_stall(const uint8_t ep);
/**
* @brief check if selected endpoint is stalled
*
* @param[in] ep Endpoint address corresponding to the one
* listed in the device configuration table
* @param[out] stalled Endpoint stall status
*
* @return 0 on success, negative errno code on fail.
*/
int usb_dc_ep_is_stalled(const uint8_t ep, uint8_t *const stalled);
/**
* @brief halt the selected endpoint
*
* @param[in] ep Endpoint address corresponding to the one
* listed in the device configuration table
*
* @return 0 on success, negative errno code on fail.
*/
int usb_dc_ep_halt(const uint8_t ep);
/**
* @brief enable the selected endpoint
*
* Function to enable the selected endpoint. Upon success interrupts are
* enabled for the corresponding endpoint and the endpoint is ready for
* transmitting/receiving data.
*
* @param[in] ep Endpoint address corresponding to the one
* listed in the device configuration table
*
* @return 0 on success, negative errno code on fail.
*/
int usb_dc_ep_enable(const uint8_t ep);
/**
* @brief disable the selected endpoint
*
* Function to disable the selected endpoint. Upon success interrupts are
* disabled for the corresponding endpoint and the endpoint is no longer able
* for transmitting/receiving data.
*
* @param[in] ep Endpoint address corresponding to the one
* listed in the device configuration table
*
* @return 0 on success, negative errno code on fail.
*/
int usb_dc_ep_disable(const uint8_t ep);
/**
* @brief flush the selected endpoint
*
* @param[in] ep Endpoint address corresponding to the one
* listed in the device configuration table
*
* @return 0 on success, negative errno code on fail.
*/
int usb_dc_ep_flush(const uint8_t ep);
/**
* @brief write data to the specified endpoint
*
* This function is called to write data to the specified endpoint. The supplied
* usb_ep_callback function will be called when data is transmitted out.
*
* @param[in] ep Endpoint address corresponding to the one
* listed in the device configuration table
* @param[in] data pointer to data to write
* @param[in] data_len length of data requested to write. This may
* be zero for a zero length status packet.
* @param[out] ret_bytes bytes scheduled for transmission. This value
* may be NULL if the application expects all
* bytes to be written
*
* @return 0 on success, negative errno code on fail.
*/
int usb_dc_ep_write(const uint8_t ep, const uint8_t *const data,
const uint32_t data_len, uint32_t *const ret_bytes);
/**
* @brief Indicate if the write to an IN endpoint (using usb_dc_ep_write) would block
* to wait until the endpoint has enoug space
*
* @param[in] ep Endpoint address corresponding to the one
* listed in the device configuration table
*
* @return 0 when writable, 0 when not, negative errno code on fail.
*/
int usb_dc_ep_write_would_block(const uint8_t ep);
/**
* @brief read data from the specified endpoint
*
* This function is called by the Endpoint handler function, after an OUT
* interrupt has been received for that EP. The application must only call this
* function through the supplied usb_ep_callback function. This function clears
* the ENDPOINT NAK, if all data in the endpoint FIFO has been read,
* so as to accept more data from host.
*
* @param[in] ep Endpoint address corresponding to the one
* listed in the device configuration table
* @param[in] data pointer to data buffer to write to
* @param[in] max_data_len max length of data to read
* @param[out] read_bytes Number of bytes read. If data is NULL and
* max_data_len is 0 the number of bytes
* available for read should be returned.
*
* @return 0 on success, negative errno code on fail.
*/
int usb_dc_ep_read(const uint8_t ep, uint8_t *const data,
const uint32_t max_data_len, uint32_t *const read_bytes);
/**
* @brief set callback function for the specified endpoint
*
* Function to set callback function for notification of data received and
* available to application or transmit done on the selected endpoint,
* NULL if callback not required by application code.
*
* @param[in] ep Endpoint address corresponding to the one
* listed in the device configuration table
* @param[in] cb callback function
*
* @return 0 on success, negative errno code on fail.
*/
int usb_dc_ep_set_callback(const uint8_t ep, const usb_dc_ep_callback cb);
/**
* @brief read data from the specified endpoint
*
* This is similar to usb_dc_ep_read, the difference being that, it doesn't
* clear the endpoint NAKs so that the consumer is not bogged down by further
* upcalls till he is done with the processing of the data. The caller should
* reactivate ep by invoking usb_dc_ep_read_continue() do so.
*
* @param[in] ep Endpoint address corresponding to the one
* listed in the device configuration table
* @param[in] data pointer to data buffer to write to
* @param[in] max_data_len max length of data to read
* @param[out] read_bytes Number of bytes read. If data is NULL and
* max_data_len is 0 the number of bytes
* available for read should be returned.
*
* @return 0 on success, negative errno code on fail.
*/
int usb_dc_ep_read_wait(uint8_t ep, uint8_t *data, uint32_t max_data_len,
uint32_t *read_bytes);
/**
* @brief Continue reading data from the endpoint
*
* Clear the endpoint NAK and enable the endpoint to accept more data
* from the host. Usually called after usb_dc_ep_read_wait() when the consumer
* is fine to accept more data. Thus these calls together acts as flow control
* mechanism.
*
* @param[in] ep Endpoint address corresponding to the one
* listed in the device configuration table
*
* @return 0 on success, negative errno code on fail.
*/
int usb_dc_ep_read_continue(uint8_t ep);
/**
* @brief Get endpoint max packet size
*
* @param[in] ep Endpoint address corresponding to the one
* listed in the device configuration table
*
* @return enpoint max packet size (mps)
*/
int usb_dc_ep_mps(uint8_t ep);
//Hack - fake interrupts by pollinfg
void usb_dc_check_poll_for_interrupts(void);
//Prepare for USB persist. You should reboot after this.
int usb_dc_prepare_persist(void);
void usb_dw_isr_handler(void);
int usb_dc_ep_write_would_block(const uint8_t ep);
#ifdef __cplusplus
}
#endif

34
tools/sdk/esp32/include/esp_rom/include/esp32s2/rom/usb/usb_descriptor.h Normal file
View File

@ -0,0 +1,34 @@
// Copyright 2019-2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#pragma once
#include <stdint.h>
#include <stdbool.h>
#ifdef __cplusplus
extern "C" {
#endif
#define USB_DESCRIPTOR_TYPE_ACM 0
#define USB_DESCRIPTOR_TYPE_DFU 1
void usb_set_current_descriptor(int descriptor_type);
bool usb_get_descriptor(uint16_t type_index, uint16_t lang_id,
int32_t *len, uint8_t **data);
#ifdef __cplusplus
}
#endif

401
tools/sdk/esp32/include/esp_rom/include/esp32s2/rom/usb/usb_device.h Normal file
View File

@ -0,0 +1,401 @@
/*
* LPCUSB, an USB device driver for LPC microcontrollers
* Copyright (C) 2006 Bertrik Sikken (bertrik@sikken.nl)
* Copyright (c) 2016 Intel Corporation
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/**
* @file
* @brief USB device core layer APIs and structures
*
* This file contains the USB device core layer APIs and structures.
*/
#pragma once
#include <stddef.h>
#include <sys/cdefs.h>
#include "usb_dc.h"
#ifdef __cplusplus
extern "C" {
#endif
/*************************************************************************
* USB configuration
**************************************************************************/
#define MAX_PACKET_SIZE0 64 /**< maximum packet size for EP 0 */
//Note: for FS this should be 8, 16, 32, 64 bytes. HS can go up to 512.
/*************************************************************************
* USB application interface
**************************************************************************/
/** setup packet definitions */
struct usb_setup_packet {
uint8_t bmRequestType; /**< characteristics of the specific request */
uint8_t bRequest; /**< specific request */
uint16_t wValue; /**< request specific parameter */
uint16_t wIndex; /**< request specific parameter */
uint16_t wLength; /**< length of data transferred in data phase */
} __packed;
_Static_assert(sizeof(struct usb_setup_packet) == 8, "USB setup packet struct size error");
/**
* Callback function signature for the device
*/
typedef void (*usb_status_callback)(enum usb_dc_status_code status_code,
uint8_t *param);
/**
* Callback function signature for the USB Endpoint status
*/
typedef void (*usb_ep_callback)(uint8_t ep,
enum usb_dc_ep_cb_status_code cb_status);
/**
* Function which handles Class specific requests corresponding to an
* interface number specified in the device descriptor table
*/
typedef int (*usb_request_handler) (struct usb_setup_packet *detup,
int32_t *transfer_len, uint8_t **payload_data);
/**
* Function for interface runtime configuration
*/
typedef void (*usb_interface_config)(uint8_t bInterfaceNumber);
/*
* USB Endpoint Configuration
*/
struct usb_ep_cfg_data {
/**
* Callback function for notification of data received and
* available to application or transmit done, NULL if callback
* not required by application code
*/
usb_ep_callback ep_cb;
/**
* The number associated with the EP in the device configuration
* structure
* IN EP = 0x80 | \<endpoint number\>
* OUT EP = 0x00 | \<endpoint number\>
*/
uint8_t ep_addr;
};
/**
* USB Interface Configuration
*/
struct usb_interface_cfg_data {
/** Handler for USB Class specific Control (EP 0) communications */
usb_request_handler class_handler;
/** Handler for USB Vendor specific commands */
usb_request_handler vendor_handler;
/**
* The custom request handler gets a first chance at handling
* the request before it is handed over to the 'chapter 9' request
* handler
*/
usb_request_handler custom_handler;
/**
* This data area, allocated by the application, is used to store
* Class specific command data and must be large enough to store the
* largest payload associated with the largest supported Class'
* command set. This data area may be used for USB IN or OUT
* communications
*/
uint8_t *payload_data;
/**
* This data area, allocated by the application, is used to store
* Vendor specific payload
*/
uint8_t *vendor_data;
};
/*
* @brief USB device configuration
*
* The Application instantiates this with given parameters added
* using the "usb_set_config" function. Once this function is called
* changes to this structure will result in undefined behaviour. This structure
* may only be updated after calls to usb_deconfig
*/
struct usb_cfg_data {
/**
* USB device description, see
* http://www.beyondlogic.org/usbnutshell/usb5.shtml#DeviceDescriptors
*/
const uint8_t *usb_device_description;
/** Pointer to interface descriptor */
const void *interface_descriptor;
/** Function for interface runtime configuration */
usb_interface_config interface_config;
/** Callback to be notified on USB connection status change */
usb_status_callback cb_usb_status;
/** USB interface (Class) handler and storage space */
struct usb_interface_cfg_data interface;
/** Number of individual endpoints in the device configuration */
uint8_t num_endpoints;
/**
* Pointer to an array of endpoint structs of length equal to the
* number of EP associated with the device description,
* not including control endpoints
*/
struct usb_ep_cfg_data *endpoint;
};
/*
* @brief configure USB controller
*
* Function to configure USB controller.
* Configuration parameters must be valid or an error is returned
*
* @param[in] config Pointer to configuration structure
*
* @return 0 on success, negative errno code on fail
*/
int usb_set_config(struct usb_cfg_data *config);
/*
* @brief return the USB device to it's initial state
*
* @return 0 on success, negative errno code on fail
*/
int usb_deconfig(void);
/*
* @brief enable USB for host/device connection
*
* Function to enable USB for host/device connection.
* Upon success, the USB module is no longer clock gated in hardware,
* it is now capable of transmitting and receiving on the USB bus and
* of generating interrupts.
*
* @return 0 on success, negative errno code on fail.
*/
int usb_enable(struct usb_cfg_data *config);
/*
* @brief disable the USB device.
*
* Function to disable the USB device.
* Upon success, the specified USB interface is clock gated in hardware,
* it is no longer capable of generating interrupts.
*
* @return 0 on success, negative errno code on fail
*/
int usb_disable(void);
/*
* @brief Check if a write to an in ep would block until there is enough space
* in the fifo
*
* @param[in] ep Endpoint address corresponding to the one listed in the
* device configuration table
*
* @return 0 if free to write, 1 if a write would block, negative errno code on fail
*/
int usb_write_would_block(uint8_t ep);
/*
* @brief write data to the specified endpoint
*
* Function to write data to the specified endpoint. The supplied
* usb_ep_callback will be called when transmission is done.
*
* @param[in] ep Endpoint address corresponding to the one listed in the
* device configuration table
* @param[in] data Pointer to data to write
* @param[in] data_len Length of data requested to write. This may be zero for
* a zero length status packet.
* @param[out] bytes_ret Bytes written to the EP FIFO. This value may be NULL if
* the application expects all bytes to be written
*
* @return 0 on success, negative errno code on fail
*/
int usb_write(uint8_t ep, const uint8_t *data, uint32_t data_len,
uint32_t *bytes_ret);
/*
* @brief read data from the specified endpoint
*
* This function is called by the Endpoint handler function, after an
* OUT interrupt has been received for that EP. The application must
* only call this function through the supplied usb_ep_callback function.
*
* @param[in] ep Endpoint address corresponding to the one listed in
* the device configuration table
* @param[in] data Pointer to data buffer to write to
* @param[in] max_data_len Max length of data to read
* @param[out] ret_bytes Number of bytes read. If data is NULL and
* max_data_len is 0 the number of bytes available
* for read is returned.
*
* @return 0 on success, negative errno code on fail
*/
int usb_read(uint8_t ep, uint8_t *data, uint32_t max_data_len,
uint32_t *ret_bytes);
/*
* @brief set STALL condition on the specified endpoint
*
* This function is called by USB device class handler code to set stall
* conditionin on endpoint.
*
* @param[in] ep Endpoint address corresponding to the one listed in
* the device configuration table
*
* @return 0 on success, negative errno code on fail
*/
int usb_ep_set_stall(uint8_t ep);
/*
* @brief clears STALL condition on the specified endpoint
*
* This function is called by USB device class handler code to clear stall
* conditionin on endpoint.
*
* @param[in] ep Endpoint address corresponding to the one listed in
* the device configuration table
*
* @return 0 on success, negative errno code on fail
*/
int usb_ep_clear_stall(uint8_t ep);
/**
* @brief read data from the specified endpoint
*
* This is similar to usb_ep_read, the difference being that, it doesn't
* clear the endpoint NAKs so that the consumer is not bogged down by further
* upcalls till he is done with the processing of the data. The caller should
* reactivate ep by invoking usb_ep_read_continue() do so.
*
* @param[in] ep Endpoint address corresponding to the one
* listed in the device configuration table
* @param[in] data pointer to data buffer to write to
* @param[in] max_data_len max length of data to read
* @param[out] read_bytes Number of bytes read. If data is NULL and
* max_data_len is 0 the number of bytes
* available for read should be returned.
*
* @return 0 on success, negative errno code on fail.
*/
int usb_ep_read_wait(uint8_t ep, uint8_t *data, uint32_t max_data_len,
uint32_t *read_bytes);
/**
* @brief Continue reading data from the endpoint
*
* Clear the endpoint NAK and enable the endpoint to accept more data
* from the host. Usually called after usb_ep_read_wait() when the consumer
* is fine to accept more data. Thus these calls together acts as flow control
* mechanism.
*
* @param[in] ep Endpoint address corresponding to the one
* listed in the device configuration table
*
* @return 0 on success, negative errno code on fail.
*/
int usb_ep_read_continue(uint8_t ep);
/**
* Callback function signature for transfer completion.
*/
typedef void (*usb_transfer_callback)(uint8_t ep, int tsize, void *priv);
/* USB transfer flags */
#define USB_TRANS_READ BIT(0) /** Read transfer flag */
#define USB_TRANS_WRITE BIT(1) /** Write transfer flag */
#define USB_TRANS_NO_ZLP BIT(2) /** No zero-length packet flag */
/**
* @brief Transfer management endpoint callback
*
* If a USB class driver wants to use high-level transfer functions, driver
* needs to register this callback as usb endpoint callback.
*/
void usb_transfer_ep_callback(uint8_t ep, enum usb_dc_ep_cb_status_code);
/**
* @brief Start a transfer
*
* Start a usb transfer to/from the data buffer. This function is asynchronous
* and can be executed in IRQ context. The provided callback will be called
* on transfer completion (or error) in thread context.
*
* @param[in] ep Endpoint address corresponding to the one
* listed in the device configuration table
* @param[in] data Pointer to data buffer to write-to/read-from
* @param[in] dlen Size of data buffer
* @param[in] flags Transfer flags (USB_TRANS_READ, USB_TRANS_WRITE...)
* @param[in] cb Function called on transfer completion/failure
* @param[in] priv Data passed back to the transfer completion callback
*
* @return 0 on success, negative errno code on fail.
*/
int usb_transfer(uint8_t ep, uint8_t *data, size_t dlen, unsigned int flags,
usb_transfer_callback cb, void *priv);
/**
* @brief Start a transfer and block-wait for completion
*
* Synchronous version of usb_transfer, wait for transfer completion before
* returning.
*
* @param[in] ep Endpoint address corresponding to the one
* listed in the device configuration table
* @param[in] data Pointer to data buffer to write-to/read-from
* @param[in] dlen Size of data buffer
* @param[in] flags Transfer flags
*
* @return number of bytes transferred on success, negative errno code on fail.
*/
int usb_transfer_sync(uint8_t ep, uint8_t *data, size_t dlen, unsigned int flags);
/**
* @brief Cancel any ongoing transfer on the specified endpoint
*
* @param[in] ep Endpoint address corresponding to the one
* listed in the device configuration table
*
* @return 0 on success, negative errno code on fail.
*/
void usb_cancel_transfer(uint8_t ep);
void usb_dev_resume(int configuration);
int usb_dev_get_configuration(void);
#ifdef __cplusplus
}
#endif

147
tools/sdk/esp32/include/esp_rom/include/esp32s2/rom/usb/usb_dfu.h Normal file
View File

@ -0,0 +1,147 @@
/***************************************************************************
*
* Copyright(c) 2015,2016 Intel Corporation.
* Copyright(c) 2017 PHYTEC Messtechnik GmbH
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
***************************************************************************/
/**
* @file
* @brief USB Device Firmware Upgrade (DFU) public header
*
* Header follows the Device Class Specification for
* Device Firmware Upgrade Version 1.1
*/
#pragma once
#include <stdint.h>
#include <stddef.h>
#include "usb_device.h"
#ifdef __cplusplus
extern "C" {
#endif
/** DFU Class Subclass */
#define DFU_SUBCLASS 0x01
/** DFU Class runtime Protocol */
#define DFU_RT_PROTOCOL 0x01
/** DFU Class DFU mode Protocol */
#define DFU_MODE_PROTOCOL 0x02
/**
* @brief DFU Class Specific Requests
*/
#define DFU_DETACH 0x00
#define DFU_DNLOAD 0x01
#define DFU_UPLOAD 0x02
#define DFU_GETSTATUS 0x03
#define DFU_CLRSTATUS 0x04
#define DFU_GETSTATE 0x05
#define DFU_ABORT 0x06
/** DFU FUNCTIONAL descriptor type */
#define DFU_FUNC_DESC 0x21
/** DFU attributes DFU Functional Descriptor */
#define DFU_ATTR_WILL_DETACH 0x08
#define DFU_ATTR_MANIFESTATION_TOLERANT 0x04
#define DFU_ATTR_CAN_UPLOAD 0x02
#define DFU_ATTR_CAN_DNLOAD 0x01
/** DFU Specification release */
#define DFU_VERSION 0x0110
/** Run-Time Functional Descriptor */
struct dfu_runtime_descriptor {
uint8_t bLength;
uint8_t bDescriptorType;
uint8_t bmAttributes;
uint16_t wDetachTimeOut;
uint16_t wTransferSize;
uint16_t bcdDFUVersion;
} __packed;
/** bStatus values for the DFU_GETSTATUS response */
enum dfu_status {
statusOK,
errTARGET,
errFILE,
errWRITE,
errERASE,
errCHECK_ERASED,
errPROG,
errVERIFY,
errADDRESS,
errNOTDONE,
errFIRMWARE,
errVENDOR,
errUSB,
errPOR,
errUNKNOWN,
errSTALLEDPKT
};
/** bState values for the DFU_GETSTATUS response */
enum dfu_state {
appIDLE,
appDETACH,
dfuIDLE,
dfuDNLOAD_SYNC,
dfuDNBUSY,
dfuDNLOAD_IDLE,
dfuMANIFEST_SYNC,
dfuMANIFEST,
dfuMANIFEST_WAIT_RST,
dfuUPLOAD_IDLE,
dfuERROR,
};
/*
These callbacks are made public so the ACM driver can call them to handle the switch to DFU.
*/
int dfu_class_handle_req(struct usb_setup_packet *pSetup,
int32_t *data_len, uint8_t **data);
void dfu_status_cb(enum usb_dc_status_code status, uint8_t *param);
int usb_dfu_init(void);
int dfu_custom_handle_req(struct usb_setup_packet *pSetup,
int32_t *data_len, uint8_t **data);
typedef void(*usb_dfu_detach_routine_t)(int delay);
void usb_dfu_set_detach_cb(usb_dfu_detach_routine_t cb);
#ifdef __cplusplus
}
#endif

40
tools/sdk/esp32/include/esp_rom/include/esp32s2/rom/usb/usb_os_glue.h Normal file
View File

@ -0,0 +1,40 @@
// Copyright 2019-2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#pragma once
#include <stdint.h>
#ifdef __cplusplus
extern "C" {
#endif
typedef void(*usb_osglue_intdisena_routine_t)(void);
typedef int(*usb_osglue_wait_routine_t)(int delay_us);
typedef struct {
/* Disable USB interrupt */
usb_osglue_intdisena_routine_t int_dis_proc;
/* Enable USB interrupt */
usb_osglue_intdisena_routine_t int_ena_proc;
/* Wait for a set amount of uS. Return the amount actually waited. If delay_us is 0, just yield.*/
usb_osglue_wait_routine_t wait_proc;
} usb_osglue_data_t;
extern usb_osglue_data_t rom_usb_osglue;
#ifdef __cplusplus
}
#endif

50
tools/sdk/esp32/include/esp_rom/include/esp32s2/rom/usb/usb_persist.h Normal file
View File

@ -0,0 +1,50 @@
// Copyright 2019-2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#pragma once
#include <stdint.h>
#ifdef __cplusplus
extern "C" {
#endif
// USB persistence flags.
//This bit indicates persistence has been enabled, that is, the USB initialization routines should not
//reset the USB device as the device still is initialized and the host detected it with the same cdcacm/dfu
//descriptor as the ROM uses; we can just re-initialize the software side and have at 'er.
#define USBDC_PERSIST_ENA (1<<31)
//This bit indicates to the ROM that we rebooted because of a request to go into DFU mode; the ROM should
//honour this request.
#define USBDC_BOOT_DFU (1<<30)
//This being non-0 indicates a memory location where a 'testament' is stored, aka a piece of text that should be output
//after a reboot. Can contain core dump info or something.
#define USBDC_TESTAMENT_LOC_MASK 0x7FFFF //bits 19-0; this is added to a base address of 0x3FF80000.
//The testament is a FIFO. The ROM will output all data between textstart and textend; if textend is lower than textstart it will
//output everything from textstart to memend, then memstart to textend.
typedef struct {
char *memstart; //start of memory region
char *memend; //end of memory region
char *textstart; //start of text to output
char *textend;
} usbdc_testament_t;
#ifdef __cplusplus
}
#endif

53
tools/sdk/esp32/include/esp_rom/include/esp32s3/rom/aes.h Normal file
View File

@ -0,0 +1,53 @@
// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#pragma once
#include <stdint.h>
#include <stdbool.h>
#ifdef __cplusplus
extern "C" {
#endif
enum AES_TYPE {
AES_ENC,
AES_DEC,
};
enum AES_BITS {
AES128,
AES192,
AES256
};
void ets_aes_enable(void);
void ets_aes_disable(void);
void ets_aes_set_endian(bool key_word_swap, bool key_byte_swap,
bool in_word_swap, bool in_byte_swap,
bool out_word_swap, bool out_byte_swap);
int ets_aes_setkey(enum AES_TYPE type, const void *key, enum AES_BITS bits);
int ets_aes_setkey_enc(const void *key, enum AES_BITS bits);
int ets_aes_setkey_dec(const void *key, enum AES_BITS bits);
void ets_aes_block(const void *input, void *output);
#ifdef __cplusplus
}
#endif

17
tools/sdk/esp32/include/esp_rom/include/esp32s3/rom/apb_backup_dma.h Normal file
View File

@ -0,0 +1,17 @@
/*
* SPDX-FileCopyrightText: 2019-2021 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
#ifdef __cplusplus
extern "C" {
#endif
void ets_apb_backup_init_lock_func(void(* _apb_backup_lock)(void), void(* _apb_backup_unlock)(void));
#ifdef __cplusplus
}
#endif

40
tools/sdk/esp32/include/esp_rom/include/esp32s3/rom/bigint.h Normal file
View File

@ -0,0 +1,40 @@
// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#pragma once
#include <stdint.h>
#include <stdbool.h>
#ifdef __cplusplus
extern "C" {
#endif
void ets_bigint_enable(void);
void ets_bigint_disable(void);
int ets_bigint_multiply(const uint32_t *x, const uint32_t *y, uint32_t len_words);
int ets_bigint_modmult(const uint32_t *x, const uint32_t *y, const uint32_t *m, uint32_t m_dash, const uint32_t *rb, uint32_t len_words);
int ets_bigint_modexp(const uint32_t *x, const uint32_t *y, const uint32_t *m, uint32_t m_dash, const uint32_t *rb, bool constant_time, uint32_t len_words);
void ets_bigint_wait_finish(void);
int ets_bigint_getz(uint32_t *z, uint32_t len_words);
#ifdef __cplusplus
}
#endif

Some files were not shown because too many files have changed in this diff Show More