443 lines
11 KiB
C++
443 lines
11 KiB
C++
/*
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Esp.cpp - ESP31B-specific APIs
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Copyright (c) 2015 Ivan Grokhotkov. All rights reserved.
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This library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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This library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with this library; if not, write to the Free Software
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Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include "Arduino.h"
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#include "Esp.h"
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#include "esp_sleep.h"
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#include "esp_spi_flash.h"
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#include <memory>
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#include <soc/soc.h>
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#include <esp_partition.h>
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extern "C" {
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#include "esp_ota_ops.h"
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#include "esp_image_format.h"
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}
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#include <MD5Builder.h>
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#include "soc/spi_reg.h"
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#include "esp_system.h"
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#ifdef ESP_IDF_VERSION_MAJOR // IDF 4+
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#if CONFIG_IDF_TARGET_ESP32 // ESP32/PICO-D4
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#include "esp32/rom/spi_flash.h"
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#include "soc/efuse_reg.h"
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#define ESP_FLASH_IMAGE_BASE 0x1000 // Flash offset containing flash size and spi mode
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#elif CONFIG_IDF_TARGET_ESP32S2
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#include "esp32s2/rom/spi_flash.h"
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#include "soc/efuse_reg.h"
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#define ESP_FLASH_IMAGE_BASE 0x1000
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#elif CONFIG_IDF_TARGET_ESP32S3
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#include "esp32s3/rom/spi_flash.h"
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#include "soc/efuse_reg.h"
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#define ESP_FLASH_IMAGE_BASE 0x0000 // Esp32s3 is located at 0x0000
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#elif CONFIG_IDF_TARGET_ESP32C3
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#include "esp32c3/rom/spi_flash.h"
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#define ESP_FLASH_IMAGE_BASE 0x0000 // Esp32c3 is located at 0x0000
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#else
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#error Target CONFIG_IDF_TARGET is not supported
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#endif
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#else // ESP32 Before IDF 4.0
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#include "rom/spi_flash.h"
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#define ESP_FLASH_IMAGE_BASE 0x1000
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#endif
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// REG_SPI_BASE is not defined for S3/C3 ??
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#if CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C3
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#ifndef REG_SPI_BASE
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#define REG_SPI_BASE(i) (DR_REG_SPI1_BASE + (((i)>1) ? (((i)* 0x1000) + 0x20000) : (((~(i)) & 1)* 0x1000 )))
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#endif // REG_SPI_BASE
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#endif // TARGET
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/**
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* User-defined Literals
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* usage:
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*
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* uint32_t = test = 10_MHz; // --> 10000000
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*/
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unsigned long long operator"" _kHz(unsigned long long x)
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{
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return x * 1000;
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}
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unsigned long long operator"" _MHz(unsigned long long x)
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{
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return x * 1000 * 1000;
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}
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unsigned long long operator"" _GHz(unsigned long long x)
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{
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return x * 1000 * 1000 * 1000;
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}
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unsigned long long operator"" _kBit(unsigned long long x)
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{
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return x * 1024;
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}
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unsigned long long operator"" _MBit(unsigned long long x)
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{
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return x * 1024 * 1024;
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}
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unsigned long long operator"" _GBit(unsigned long long x)
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{
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return x * 1024 * 1024 * 1024;
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}
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unsigned long long operator"" _kB(unsigned long long x)
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{
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return x * 1024;
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}
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unsigned long long operator"" _MB(unsigned long long x)
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{
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return x * 1024 * 1024;
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}
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unsigned long long operator"" _GB(unsigned long long x)
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{
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return x * 1024 * 1024 * 1024;
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}
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EspClass ESP;
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void EspClass::deepSleep(uint32_t time_us)
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{
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esp_deep_sleep(time_us);
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}
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void EspClass::restart(void)
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{
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esp_restart();
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}
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uint32_t EspClass::getHeapSize(void)
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{
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multi_heap_info_t info;
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heap_caps_get_info(&info, MALLOC_CAP_INTERNAL);
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return info.total_free_bytes + info.total_allocated_bytes;
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}
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uint32_t EspClass::getFreeHeap(void)
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{
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return heap_caps_get_free_size(MALLOC_CAP_INTERNAL);
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}
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uint32_t EspClass::getMinFreeHeap(void)
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{
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return heap_caps_get_minimum_free_size(MALLOC_CAP_INTERNAL);
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}
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uint32_t EspClass::getMaxAllocHeap(void)
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{
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return heap_caps_get_largest_free_block(MALLOC_CAP_INTERNAL);
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}
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uint32_t EspClass::getPsramSize(void)
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{
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if(psramFound()){
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multi_heap_info_t info;
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heap_caps_get_info(&info, MALLOC_CAP_SPIRAM);
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return info.total_free_bytes + info.total_allocated_bytes;
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}
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return 0;
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}
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uint32_t EspClass::getFreePsram(void)
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{
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if(psramFound()){
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return heap_caps_get_free_size(MALLOC_CAP_SPIRAM);
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}
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return 0;
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}
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uint32_t EspClass::getMinFreePsram(void)
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{
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if(psramFound()){
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return heap_caps_get_minimum_free_size(MALLOC_CAP_SPIRAM);
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}
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return 0;
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}
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uint32_t EspClass::getMaxAllocPsram(void)
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{
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if(psramFound()){
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return heap_caps_get_largest_free_block(MALLOC_CAP_SPIRAM);
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}
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return 0;
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}
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static uint32_t sketchSize(sketchSize_t response) {
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esp_image_metadata_t data;
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const esp_partition_t *running = esp_ota_get_running_partition();
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if (!running) return 0;
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const esp_partition_pos_t running_pos = {
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.offset = running->address,
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.size = running->size,
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};
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data.start_addr = running_pos.offset;
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esp_image_verify(ESP_IMAGE_VERIFY, &running_pos, &data);
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if (response) {
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return running_pos.size - data.image_len;
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} else {
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return data.image_len;
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}
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}
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uint32_t EspClass::getSketchSize () {
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return sketchSize(SKETCH_SIZE_TOTAL);
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}
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String EspClass::getSketchMD5()
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{
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static String result;
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if (result.length()) {
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return result;
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}
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uint32_t lengthLeft = getSketchSize();
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const esp_partition_t *running = esp_ota_get_running_partition();
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if (!running) {
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log_e("Partition could not be found");
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return String();
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}
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const size_t bufSize = SPI_FLASH_SEC_SIZE;
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std::unique_ptr<uint8_t[]> buf(new uint8_t[bufSize]);
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uint32_t offset = 0;
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if(!buf.get()) {
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log_e("Not enough memory to allocate buffer");
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return String();
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}
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MD5Builder md5;
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md5.begin();
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while( lengthLeft > 0) {
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size_t readBytes = (lengthLeft < bufSize) ? lengthLeft : bufSize;
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if (!ESP.flashRead(running->address + offset, reinterpret_cast<uint32_t*>(buf.get()), (readBytes + 3) & ~3)) {
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log_e("Could not read buffer from flash");
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return String();
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}
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md5.add(buf.get(), readBytes);
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lengthLeft -= readBytes;
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offset += readBytes;
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}
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md5.calculate();
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result = md5.toString();
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return result;
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}
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uint32_t EspClass::getFreeSketchSpace () {
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const esp_partition_t* _partition = esp_ota_get_next_update_partition(NULL);
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if(!_partition){
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return 0;
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}
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return _partition->size;
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}
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uint8_t EspClass::getChipRevision(void)
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{
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esp_chip_info_t chip_info;
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esp_chip_info(&chip_info);
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return chip_info.revision;
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}
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const char * EspClass::getChipModel(void)
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{
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#if CONFIG_IDF_TARGET_ESP32
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uint32_t chip_ver = REG_GET_FIELD(EFUSE_BLK0_RDATA3_REG, EFUSE_RD_CHIP_VER_PKG);
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uint32_t pkg_ver = chip_ver & 0x7;
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switch (pkg_ver) {
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case EFUSE_RD_CHIP_VER_PKG_ESP32D0WDQ6 :
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return "ESP32-D0WDQ6";
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case EFUSE_RD_CHIP_VER_PKG_ESP32D0WDQ5 :
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return "ESP32-D0WDQ5";
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case EFUSE_RD_CHIP_VER_PKG_ESP32D2WDQ5 :
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return "ESP32-D2WDQ5";
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case EFUSE_RD_CHIP_VER_PKG_ESP32PICOD2 :
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return "ESP32-PICO-D2";
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case EFUSE_RD_CHIP_VER_PKG_ESP32PICOD4 :
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return "ESP32-PICO-D4";
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case EFUSE_RD_CHIP_VER_PKG_ESP32PICOV302 :
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return "ESP32-PICO-V3-02";
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default:
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return "Unknown";
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}
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#elif CONFIG_IDF_TARGET_ESP32S2
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uint32_t pkg_ver = REG_GET_FIELD(EFUSE_RD_MAC_SPI_SYS_3_REG, EFUSE_PKG_VERSION);
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switch (pkg_ver) {
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case 0:
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return "ESP32-S2";
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case 1:
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return "ESP32-S2FH16";
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case 2:
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return "ESP32-S2FH32";
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default:
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return "ESP32-S2 (Unknown)";
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}
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#elif CONFIG_IDF_TARGET_ESP32S3
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return "ESP32-S3";
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#elif CONFIG_IDF_TARGET_ESP32C3
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return "ESP32-C3";
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#endif
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}
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uint8_t EspClass::getChipCores(void)
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{
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esp_chip_info_t chip_info;
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esp_chip_info(&chip_info);
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return chip_info.cores;
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}
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const char * EspClass::getSdkVersion(void)
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{
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return esp_get_idf_version();
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}
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uint32_t ESP_getFlashChipId(void)
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{
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uint32_t id = g_rom_flashchip.device_id;
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id = ((id & 0xff) << 16) | ((id >> 16) & 0xff) | (id & 0xff00);
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return id;
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}
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uint32_t EspClass::getFlashChipSize(void)
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{
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uint32_t id = (ESP_getFlashChipId() >> 16) & 0xFF;
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return 2 << (id - 1);
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}
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uint32_t EspClass::getFlashChipSpeed(void)
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{
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esp_image_header_t fhdr;
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if(flashRead(ESP_FLASH_IMAGE_BASE, (uint32_t*)&fhdr, sizeof(esp_image_header_t)) && fhdr.magic != ESP_IMAGE_HEADER_MAGIC) {
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return 0;
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}
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return magicFlashChipSpeed(fhdr.spi_speed);
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}
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FlashMode_t EspClass::getFlashChipMode(void)
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{
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#if CONFIG_IDF_TARGET_ESP32S2
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uint32_t spi_ctrl = REG_READ(PERIPHS_SPI_FLASH_CTRL);
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#else
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uint32_t spi_ctrl = REG_READ(SPI_CTRL_REG(0));
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#endif
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/* Not all of the following constants are already defined in older versions of spi_reg.h, so do it manually for now*/
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if (spi_ctrl & BIT(24)) { //SPI_FREAD_QIO
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return (FM_QIO);
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} else if (spi_ctrl & BIT(20)) { //SPI_FREAD_QUAD
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return (FM_QOUT);
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} else if (spi_ctrl & BIT(23)) { //SPI_FREAD_DIO
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return (FM_DIO);
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} else if (spi_ctrl & BIT(14)) { // SPI_FREAD_DUAL
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return (FM_DOUT);
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} else if (spi_ctrl & BIT(13)) { //SPI_FASTRD_MODE
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return (FM_FAST_READ);
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} else {
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return (FM_SLOW_READ);
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}
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return (FM_DOUT);
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}
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uint32_t EspClass::magicFlashChipSize(uint8_t byte)
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{
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switch(byte & 0x0F) {
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case 0x0: // 8 MBit (1MB)
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return (1_MB);
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case 0x1: // 16 MBit (2MB)
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return (2_MB);
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case 0x2: // 32 MBit (4MB)
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return (4_MB);
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case 0x3: // 64 MBit (8MB)
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return (8_MB);
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case 0x4: // 128 MBit (16MB)
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return (16_MB);
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default: // fail?
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return 0;
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}
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}
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uint32_t EspClass::magicFlashChipSpeed(uint8_t byte)
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{
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switch(byte & 0x0F) {
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case 0x0: // 40 MHz
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return (40_MHz);
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case 0x1: // 26 MHz
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return (26_MHz);
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case 0x2: // 20 MHz
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return (20_MHz);
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case 0xf: // 80 MHz
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return (80_MHz);
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default: // fail?
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return 0;
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}
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}
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FlashMode_t EspClass::magicFlashChipMode(uint8_t byte)
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{
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FlashMode_t mode = (FlashMode_t) byte;
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if(mode > FM_SLOW_READ) {
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mode = FM_UNKNOWN;
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}
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return mode;
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}
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bool EspClass::flashEraseSector(uint32_t sector)
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{
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return spi_flash_erase_sector(sector) == ESP_OK;
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}
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// Warning: These functions do not work with encrypted flash
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bool EspClass::flashWrite(uint32_t offset, uint32_t *data, size_t size)
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{
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return spi_flash_write(offset, (uint32_t*) data, size) == ESP_OK;
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}
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bool EspClass::flashRead(uint32_t offset, uint32_t *data, size_t size)
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{
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return spi_flash_read(offset, (uint32_t*) data, size) == ESP_OK;
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}
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bool EspClass::partitionEraseRange(const esp_partition_t *partition, uint32_t offset, size_t size)
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{
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return esp_partition_erase_range(partition, offset, size) == ESP_OK;
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}
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bool EspClass::partitionWrite(const esp_partition_t *partition, uint32_t offset, uint32_t *data, size_t size)
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{
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return esp_partition_write(partition, offset, data, size) == ESP_OK;
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}
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bool EspClass::partitionRead(const esp_partition_t *partition, uint32_t offset, uint32_t *data, size_t size)
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{
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return esp_partition_read(partition, offset, data, size) == ESP_OK;
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}
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uint64_t EspClass::getEfuseMac(void)
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{
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uint64_t _chipmacid = 0LL;
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esp_efuse_mac_get_default((uint8_t*) (&_chipmacid));
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return _chipmacid;
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}
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