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This commit is contained in:
Pavel Brychta
2022-07-07 08:53:01 +02:00
commit 4868978856
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62
components/arduino_tinyusb/CMakeLists.txt Executable file
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idf_component_register(REQUIRES esp_rom freertos soc PRIV_REQUIRES arduino main)
if(CONFIG_TINYUSB_ENABLED)
### variables ###
#################
# if(IDF_TARGET STREQUAL "esp32s2")
set(compile_options
"-DCFG_TUSB_MCU=OPT_MCU_ESP32S2"
"-DCFG_TUSB_DEBUG=${CONFIG_TINYUSB_DEBUG_LEVEL}"
"-Wno-type-limits" # needed for the vanila tinyusb with turned off classes
)
# elseif(IDF_TARGET STREQUAL "esp32s3")
# set(compile_options
# "-DCFG_TUSB_MCU=OPT_MCU_ESP32S2"
# "-DCFG_TUSB_DEBUG=${CONFIG_TINYUSB_DEBUG_LEVEL}"
# "-Wno-type-limits" # needed for the vanila tinyusb with turned off classes
# )
# endif()
idf_component_get_property(FREERTOS_ORIG_INCLUDE_PATH freertos
ORIG_INCLUDE_PATH)
set(includes_private
# tusb:
"${COMPONENT_DIR}/tinyusb/hw/bsp/"
"${COMPONENT_DIR}/tinyusb/src/"
"${COMPONENT_DIR}/tinyusb/src/device"
)
set(includes_public
# tusb:
"${FREERTOS_ORIG_INCLUDE_PATH}"
"${COMPONENT_DIR}/tinyusb/src/"
# espressif:
"${COMPONENT_DIR}/include")
set(srcs
# espressif:
"${COMPONENT_DIR}/src/dcd_esp32sx.c"
# tusb:
#"${COMPONENT_DIR}/tinyusb/src/portable/espressif/esp32sx/dcd_esp32sx.c"
"${COMPONENT_DIR}/tinyusb/src/class/cdc/cdc_device.c"
"${COMPONENT_DIR}/tinyusb/src/class/hid/hid_device.c"
"${COMPONENT_DIR}/tinyusb/src/class/midi/midi_device.c"
"${COMPONENT_DIR}/tinyusb/src/class/msc/msc_device.c"
"${COMPONENT_DIR}/tinyusb/src/class/video/video_device.c"
"${COMPONENT_DIR}/tinyusb/src/class/dfu/dfu_rt_device.c"
"${COMPONENT_DIR}/tinyusb/src/class/vendor/vendor_device.c"
"${COMPONENT_DIR}/tinyusb/src/common/tusb_fifo.c"
"${COMPONENT_DIR}/tinyusb/src/device/usbd_control.c"
"${COMPONENT_DIR}/tinyusb/src/device/usbd.c"
"${COMPONENT_DIR}/tinyusb/src/tusb.c")
### tinyusb lib ###
###################
add_library(arduino_tinyusb STATIC ${srcs})
target_include_directories(
arduino_tinyusb
PUBLIC ${includes_public}
PRIVATE ${includes_private})
target_compile_options(arduino_tinyusb PRIVATE ${compile_options})
target_link_libraries(${COMPONENT_TARGET} INTERFACE arduino_tinyusb)
endif()

218
components/arduino_tinyusb/Kconfig.projbuild Executable file
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menu "Arduino TinyUSB"
config TINYUSB_ENABLED
bool "Enable TinyUSB driver"
default y
depends on IDF_TARGET_ESP32S2 || IDF_TARGET_ESP32S3
select FREERTOS_SUPPORT_STATIC_ALLOCATION
select FREERTOS_USE_AUTHENTIC_INCLUDE_PATHS
help
Adds support for TinyUSB
menu "Serial (CDC) driver"
depends on TINYUSB_ENABLED
config TINYUSB_CDC_ENABLED
bool "Enable USB Serial (CDC) TinyUSB driver"
default y
help
Enable USB Serial (CDC) TinyUSB driver.
config TINYUSB_DESC_CDC_STRING
string "CDC Device String"
default "Espressif CDC Device"
depends on TINYUSB_CDC_ENABLED
help
Specify name of the CDC device
config TINYUSB_CDC_RX_BUFSIZE
int "CDC FIFO size of RX"
default 64
depends on TINYUSB_CDC_ENABLED
help
CDC FIFO size of RX
config TINYUSB_CDC_TX_BUFSIZE
int "CDC FIFO size of TX"
default 64
depends on TINYUSB_CDC_ENABLED
help
CDC FIFO size of TX
endmenu
menu "Mass Storage (MSC) driver"
depends on TINYUSB_ENABLED
config TINYUSB_MSC_ENABLED
bool "Enable USB Mass Storage (MSC) TinyUSB driver"
default y
help
Enable USB Mass Storage (MSC) TinyUSB driver.
config TINYUSB_DESC_MSC_STRING
string "MSC Device String"
default "Espressif MSC Device"
depends on TINYUSB_MSC_ENABLED
help
Specify name of the MSC device
config TINYUSB_MSC_BUFSIZE
int "MSC Buffer size"
range 512 4096
default 4096
depends on TINYUSB_MSC_ENABLED
help
MSC Buffer size
endmenu
menu "Human Interface (HID) driver"
depends on TINYUSB_ENABLED
config TINYUSB_HID_ENABLED
bool "Enable USB Human Interface (HID) TinyUSB driver"
default y
help
Enable USB Human Interface (HID) TinyUSB driver.
config TINYUSB_DESC_HID_STRING
string "HID Device String"
default "Espressif HID Device"
depends on TINYUSB_HID_ENABLED
help
Specify name of the HID device
config TINYUSB_HID_BUFSIZE
int "HID Buffer size"
default 64
depends on TINYUSB_HID_ENABLED
help
HID Buffer size. Should be sufficient to hold ID (if any) + Data
endmenu
menu "MIDI driver"
depends on TINYUSB_ENABLED
config TINYUSB_MIDI_ENABLED
bool "Enable USB MIDI TinyUSB driver"
default y
help
Enable USB MIDI TinyUSB driver.
config TINYUSB_DESC_MIDI_STRING
string "MIDI Device String"
default "Espressif MIDI Device"
depends on TINYUSB_MIDI_ENABLED
help
Specify name of the MIDI device
config TINYUSB_MIDI_RX_BUFSIZE
int "MIDI FIFO size of RX"
default 64
depends on TINYUSB_MIDI_ENABLED
help
MIDI FIFO size of RX
config TINYUSB_MIDI_TX_BUFSIZE
int "MIDI FIFO size of TX"
default 64
depends on TINYUSB_MIDI_ENABLED
help
MIDI FIFO size of TX
endmenu
menu "VIDEO driver"
depends on TINYUSB_ENABLED
config TINYUSB_VIDEO_ENABLED
bool "Enable USB VIDEO TinyUSB driver"
default y
help
Enable USB VIDEO TinyUSB driver.
config TINYUSB_DESC_VIDEO_STRING
string "VIDEO Device String"
default "Espressif VIDEO Device"
depends on TINYUSB_VIDEO_ENABLED
help
Specify name of the VIDEO device
config TINYUSB_VIDEO_STREAMING_BUFSIZE
int "VIDEO streaming endpoint size"
range 0 64
default 64
depends on TINYUSB_VIDEO_ENABLED
help
VIDEO streaming endpoint size
config TINYUSB_VIDEO_STREAMING_IFS
int "Number of VIDEO streaming interfaces"
range 1 3
default 1
depends on TINYUSB_VIDEO_ENABLED
help
The number of VIDEO streaming interfaces
endmenu
menu "DFU Runtime driver"
depends on TINYUSB_ENABLED
config TINYUSB_DFU_RT_ENABLED
bool "Enable USB DFU Runtime TinyUSB driver"
default y
help
Enable USB DFU Runtime TinyUSB driver.
config TINYUSB_DESC_DFU_RT_STRING
string "DFU_RT Device String"
default "Espressif DFU_RT Device"
depends on TINYUSB_DFU_RT_ENABLED
help
Specify name of the DFU_RT device
endmenu
menu "VENDOR driver"
depends on TINYUSB_ENABLED
config TINYUSB_VENDOR_ENABLED
bool "Enable USB VENDOR TinyUSB driver"
default y
help
Enable USB VENDOR TinyUSB driver.
config TINYUSB_DESC_VENDOR_STRING
string "VENDOR Device String"
default "Espressif VENDOR Device"
depends on TINYUSB_VENDOR_ENABLED
help
Specify name of the VENDOR device
config TINYUSB_VENDOR_RX_BUFSIZE
int "VENDOR FIFO size of RX"
default 64
depends on TINYUSB_VENDOR_ENABLED
help
VENDOR FIFO size of RX
config TINYUSB_VENDOR_TX_BUFSIZE
int "VENDOR FIFO size of TX"
default 64
depends on TINYUSB_VENDOR_ENABLED
help
VENDOR FIFO size of TX
endmenu
config TINYUSB_DEBUG_LEVEL
int "TinyUSB log level (0-3)"
default 0
range 0 3
depends on TINYUSB_ENABLED
help
Define amount of log output from TinyUSB
endmenu

135
components/arduino_tinyusb/include/tusb_config.h Executable file
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/*
* The MIT License (MIT)
*
* Copyright (c) 2019 Ha Thach (tinyusb.org),
* Additions Copyright (c) 2020, Espressif Systems (Shanghai) PTE LTD
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*
*/
#pragma once
#include "tusb_option.h"
#include "sdkconfig.h"
#ifdef __cplusplus
extern "C" {
#endif
/* */
/* KCONFIG */
/* */
#ifndef CONFIG_TINYUSB_CDC_ENABLED
# define CONFIG_TINYUSB_CDC_ENABLED 0
#endif
#ifndef CONFIG_TINYUSB_MSC_ENABLED
# define CONFIG_TINYUSB_MSC_ENABLED 0
#endif
#ifndef CONFIG_TINYUSB_HID_ENABLED
# define CONFIG_TINYUSB_HID_ENABLED 0
#endif
#ifndef CONFIG_TINYUSB_MIDI_ENABLED
# define CONFIG_TINYUSB_MIDI_ENABLED 0
#endif
#ifndef CONFIG_TINYUSB_VIDEO_ENABLED
# define CONFIG_TINYUSB_VIDEO_ENABLED 0
#endif
#ifndef CONFIG_TINYUSB_CUSTOM_CLASS_ENABLED
# define CONFIG_TINYUSB_CUSTOM_CLASS_ENABLED 0
#endif
#ifndef CONFIG_TINYUSB_DFU_RT_ENABLED
# define CONFIG_TINYUSB_DFU_RT_ENABLED 0
#endif
#ifndef CONFIG_TINYUSB_VENDOR_ENABLED
# define CONFIG_TINYUSB_VENDOR_ENABLED 0
#endif
/* */
/* COMMON CONFIGURATION */
/* */
#define CFG_TUSB_MCU OPT_MCU_ESP32S2
#define CFG_TUSB_RHPORT0_MODE OPT_MODE_DEVICE
#define CFG_TUSB_OS OPT_OS_FREERTOS
/* USB DMA on some MCUs can only access a specific SRAM region with restriction on alignment.
* Tinyusb use follows macros to declare transferring memory so that they can be put
* into those specific section.
* e.g
* - CFG_TUSB_MEM SECTION : __attribute__ (( section(".usb_ram") ))
* - CFG_TUSB_MEM_ALIGN : __attribute__ ((aligned(4)))
*/
#ifndef CFG_TUSB_MEM_SECTION
# define CFG_TUSB_MEM_SECTION
#endif
#ifndef CFG_TUSB_MEM_ALIGN
# define CFG_TUSB_MEM_ALIGN TU_ATTR_ALIGNED(4)
#endif
/* */
/* DRIVER CONFIGURATION */
/* */
#define CFG_TUD_MAINTASK_SIZE 4096
#define CFG_TUD_ENDOINT0_SIZE 64
// Enabled Drivers
#define CFG_TUD_CDC CONFIG_TINYUSB_CDC_ENABLED
#define CFG_TUD_MSC CONFIG_TINYUSB_MSC_ENABLED
#define CFG_TUD_HID CONFIG_TINYUSB_HID_ENABLED
#define CFG_TUD_MIDI CONFIG_TINYUSB_MIDI_ENABLED
#define CFG_TUD_VIDEO CONFIG_TINYUSB_VIDEO_ENABLED
#define CFG_TUD_CUSTOM_CLASS CONFIG_TINYUSB_CUSTOM_CLASS_ENABLED
#define CFG_TUD_DFU_RUNTIME CONFIG_TINYUSB_DFU_RT_ENABLED
#define CFG_TUD_VENDOR CONFIG_TINYUSB_VENDOR_ENABLED
// CDC FIFO size of TX and RX
#define CFG_TUD_CDC_RX_BUFSIZE CONFIG_TINYUSB_CDC_RX_BUFSIZE
#define CFG_TUD_CDC_TX_BUFSIZE CONFIG_TINYUSB_CDC_TX_BUFSIZE
// MSC Buffer size of Device Mass storage:
#define CFG_TUD_MSC_BUFSIZE CONFIG_TINYUSB_MSC_BUFSIZE
// HID buffer size Should be sufficient to hold ID (if any) + Data
#define CFG_TUD_HID_BUFSIZE CONFIG_TINYUSB_HID_BUFSIZE
// MIDI FIFO size of TX and RX
#define CFG_TUD_MIDI_RX_BUFSIZE CONFIG_TINYUSB_MIDI_RX_BUFSIZE
#define CFG_TUD_MIDI_TX_BUFSIZE CONFIG_TINYUSB_MIDI_TX_BUFSIZE
// The number of video streaming interfaces and endpoint size
#define CFG_TUD_VIDEO_STREAMING CONFIG_TINYUSB_VIDEO_STREAMING_IFS
#define CFG_TUD_VIDEO_STREAMING_EP_BUFSIZE CONFIG_TINYUSB_VIDEO_STREAMING_BUFSIZE
// VENDOR FIFO size of TX and RX
#define CFG_TUD_VENDOR_RX_BUFSIZE CONFIG_TINYUSB_VENDOR_RX_BUFSIZE
#define CFG_TUD_VENDOR_TX_BUFSIZE CONFIG_TINYUSB_VENDOR_TX_BUFSIZE
#ifdef __cplusplus
}
#endif

923
components/arduino_tinyusb/src/dcd_esp32sx.c Executable file
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/*
* The MIT License (MIT)
*
* Copyright (c) 2018 Scott Shawcroft, 2019 William D. Jones for Adafruit Industries
* Copyright (c) 2019 Ha Thach (tinyusb.org)
* Additions Copyright (c) 2020, Espressif Systems (Shanghai) Co. Ltd.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*
* This file is part of the TinyUSB stack.
*/
#include "tusb_option.h"
#if (((CFG_TUSB_MCU == OPT_MCU_ESP32S2) || (CFG_TUSB_MCU == OPT_MCU_ESP32S3)) && TUSB_OPT_DEVICE_ENABLED)
// Espressif
#include "driver/periph_ctrl.h"
#include "freertos/xtensa_api.h"
#include "esp_intr_alloc.h"
#include "esp_log.h"
#include "driver/gpio.h"
#include "soc/dport_reg.h"
#include "soc/gpio_sig_map.h"
#include "soc/usb_periph.h"
#include "device/dcd.h"
// Max number of bi-directional endpoints including EP0
// Note: ESP32S2 specs say there are only up to 5 IN active endpoints include EP0
// We should probably prohibit enabling Endpoint IN > 4 (not done yet)
#define EP_MAX USB_OUT_EP_NUM
// FIFO size in bytes
#define EP_FIFO_SIZE 1024
// Max number of IN EP FIFOs
#define EP_FIFO_NUM 5
typedef struct {
uint8_t *buffer;
// tu_fifo_t * ff; // TODO support dcd_edpt_xfer_fifo API
uint16_t total_len;
uint16_t queued_len;
uint16_t max_size;
bool short_packet;
} xfer_ctl_t;
static const char *TAG = "TUSB:DCD";
static intr_handle_t usb_ih;
static uint32_t _setup_packet[2];
#define XFER_CTL_BASE(_ep, _dir) &xfer_status[_ep][_dir]
static xfer_ctl_t xfer_status[EP_MAX][2];
// Keep count of how many FIFOs are in use
static uint8_t _allocated_fifos = 1; //FIFO0 is always in use
// Will either return an unused FIFO number, or 0 if all are used.
static uint8_t get_free_fifo(void)
{
if (_allocated_fifos < EP_FIFO_NUM) return _allocated_fifos++;
return 0;
}
// Setup the control endpoint 0.
static void bus_reset(void)
{
for (int ep_num = 0; ep_num < USB_OUT_EP_NUM; ep_num++) {
USB0.out_ep_reg[ep_num].doepctl |= USB_DO_SNAK0_M; // DOEPCTL0_SNAK
}
// clear device address
USB0.dcfg &= ~USB_DEVADDR_M;
USB0.daintmsk = USB_OUTEPMSK0_M | USB_INEPMSK0_M;
USB0.doepmsk = USB_SETUPMSK_M | USB_XFERCOMPLMSK;
USB0.diepmsk = USB_TIMEOUTMSK_M | USB_DI_XFERCOMPLMSK_M /*| USB_INTKNTXFEMPMSK_M*/;
// "USB Data FIFOs" section in reference manual
// Peripheral FIFO architecture
//
// --------------- 320 or 1024 ( 1280 or 4096 bytes )
// | IN FIFO MAX |
// ---------------
// | ... |
// --------------- y + x + 16 + GRXFSIZ
// | IN FIFO 2 |
// --------------- x + 16 + GRXFSIZ
// | IN FIFO 1 |
// --------------- 16 + GRXFSIZ
// | IN FIFO 0 |
// --------------- GRXFSIZ
// | OUT FIFO |
// | ( Shared ) |
// --------------- 0
//
// According to "FIFO RAM allocation" section in RM, FIFO RAM are allocated as follows (each word 32-bits):
// - Each EP IN needs at least max packet size, 16 words is sufficient for EP0 IN
//
// - All EP OUT shared a unique OUT FIFO which uses
// * 10 locations in hardware for setup packets + setup control words (up to 3 setup packets).
// * 2 locations for OUT endpoint control words.
// * 16 for largest packet size of 64 bytes. ( TODO Highspeed is 512 bytes)
// * 1 location for global NAK (not required/used here).
// * It is recommended to allocate 2 times the largest packet size, therefore
// Recommended value = 10 + 1 + 2 x (16+2) = 47 --> Let's make it 52
USB0.grstctl |= 0x10 << USB_TXFNUM_S; // fifo 0x10,
USB0.grstctl |= USB_TXFFLSH_M; // Flush fifo
USB0.grxfsiz = 52;
// Control IN uses FIFO 0 with 64 bytes ( 16 32-bit word )
USB0.gnptxfsiz = (16 << USB_NPTXFDEP_S) | (USB0.grxfsiz & 0x0000ffffUL);
// Ready to receive SETUP packet
USB0.out_ep_reg[0].doeptsiz |= USB_SUPCNT0_M;
USB0.gintmsk |= USB_IEPINTMSK_M | USB_OEPINTMSK_M;
}
static void enum_done_processing(void)
{
ESP_EARLY_LOGV(TAG, "dcd_int_handler - Speed enumeration done! Sending DCD_EVENT_BUS_RESET then");
// On current silicon on the Full Speed core, speed is fixed to Full Speed.
// However, keep for debugging and in case Low Speed is ever supported.
uint32_t enum_spd = (USB0.dsts >> USB_ENUMSPD_S) & (USB_ENUMSPD_V);
// Maximum packet size for EP 0 is set for both directions by writing DIEPCTL
if (enum_spd == 0x03) { // Full-Speed (PHY on 48 MHz)
USB0.in_ep_reg[0].diepctl &= ~USB_D_MPS0_V; // 64 bytes
USB0.in_ep_reg[0].diepctl &= ~USB_D_STALL0_M; // clear Stall
xfer_status[0][TUSB_DIR_OUT].max_size = 64;
xfer_status[0][TUSB_DIR_IN].max_size = 64;
} else {
USB0.in_ep_reg[0].diepctl |= USB_D_MPS0_V; // 8 bytes
USB0.in_ep_reg[0].diepctl &= ~USB_D_STALL0_M; // clear Stall
xfer_status[0][TUSB_DIR_OUT].max_size = 8;
xfer_status[0][TUSB_DIR_IN].max_size = 8;
}
}
/*------------------------------------------------------------------*/
/* Controller API
*------------------------------------------------------------------*/
void dcd_init(uint8_t rhport)
{
ESP_LOGV(TAG, "DCD init - Start");
bool did_persist = (USB_WRAP.date.val & (1 << 31)) != 0;
if (did_persist) {
//Clear persistence of USB peripheral through reset
USB_WRAP.date.val = 0;
} else {
// A. Disconnect
ESP_LOGV(TAG, "DCD init - Soft DISCONNECT and Setting up");
USB0.dctl |= USB_SFTDISCON_M; // Soft disconnect
// B. Programming DCFG
/* If USB host misbehaves during status portion of control xfer
(non zero-length packet), send STALL back and discard. Full speed. */
USB0.dcfg |= USB_NZSTSOUTHSHK_M | // NonZero .... STALL
(3 << 0); // dev speed: fullspeed 1.1 on 48 mhz // TODO no value in usb_reg.h (IDF-1476)
}
USB0.gahbcfg |= USB_NPTXFEMPLVL_M | USB_GLBLLNTRMSK_M; // Global interruptions ON
USB0.gusbcfg |= USB_FORCEDEVMODE_M; // force devmode
USB0.gotgctl &= ~(USB_BVALIDOVVAL_M | USB_BVALIDOVEN_M | USB_VBVALIDOVVAL_M); //no overrides
// C. Setting SNAKs, then connect
for (int n = 0; n < USB_OUT_EP_NUM; n++) {
USB0.out_ep_reg[n].doepctl |= USB_DO_SNAK0_M; // DOEPCTL0_SNAK
}
if (!did_persist) {
// D. Interruption masking
USB0.gintmsk = 0; //mask all
USB0.gotgint = ~0U; //clear OTG ints
USB0.gintsts = ~0U; //clear pending ints
}
USB0.gintmsk = USB_OTGINTMSK_M |
USB_MODEMISMSK_M |
USB_RXFLVIMSK_M |
USB_ERLYSUSPMSK_M |
USB_USBSUSPMSK_M |
USB_USBRSTMSK_M |
USB_ENUMDONEMSK_M |
USB_RESETDETMSK_M |
USB_DISCONNINTMSK_M; // host most only
if (did_persist) {
USB0.grstctl &= ~USB_TXFNUM_M;
USB0.grstctl |= 0x10 << USB_TXFNUM_S;
USB0.grstctl |= USB_TXFFLSH;
USB0.grxfsiz = 52;
for (int n = 0; n < USB_IN_EP_NUM; n++) {
USB0.in_ep_reg[n].diepint = USB_D_XFERCOMPL0_M | USB_D_TXFEMP0_M;
USB0.in_ep_reg[n].diepctl &= ~USB_D_STALL0_M; // clear Stall
USB0.in_ep_reg[n].diepctl |= USB_D_CNAK0 | USB_D_EPENA0; // clear NAK
}
USB0.dtknqr4_fifoemptymsk &= ~(0x7F);
USB0.gnptxfsiz = (16 << USB_NPTXFDEP_S) | (USB0.grxfsiz & 0x0000ffffUL);
USB0.daintmsk |= USB_OUTEPMSK0_M | USB_INEPMSK0_M;
USB0.doepmsk |= USB_SETUP0 | USB_XFERCOMPLMSK;
USB0.diepmsk |= USB_TIMEOUTMSK_M | USB_DI_XFERCOMPLMSK_M;//USB_INEPNAKEFFMSK
USB0.gintmsk |= USB_IEPINTMSK_M | USB_OEPINTMSK_M;
USB0.gotgint = ~0; //clear OTG ints
USB0.gintsts = ~0; //clear pending ints
enum_done_processing();
dcd_event_bus_signal(0, DCD_EVENT_BUS_RESET, true);
tusb_control_request_t request = {
.bmRequestType_bit = { .recipient = TUSB_REQ_RCPT_DEVICE, .type = TUSB_REQ_TYPE_STANDARD, .direction = TUSB_DIR_OUT },
.bRequest = TUSB_REQ_SET_CONFIGURATION,
.wValue = 1,
.wIndex = 0,
.wLength = 0
};
dcd_event_setup_received(0, (uint8_t *)&request, true);
} else {
dcd_connect(rhport);
}
}
void dcd_set_address(uint8_t rhport, uint8_t dev_addr)
{
(void)rhport;
ESP_LOGV(TAG, "DCD init - Set address : %u", dev_addr);
USB0.dcfg |= ((dev_addr & USB_DEVADDR_V) << USB_DEVADDR_S);
// Response with status after changing device address
dcd_edpt_xfer(rhport, tu_edpt_addr(0, TUSB_DIR_IN), NULL, 0);
}
void dcd_remote_wakeup(uint8_t rhport)
{
(void)rhport;
// set remote wakeup
USB0.dctl |= USB_RMTWKUPSIG_M;
// enable SOF to detect bus resume
USB0.gintsts = USB_SOF_M;
USB0.gintmsk |= USB_SOFMSK_M;
// Per specs: remote wakeup signal bit must be clear within 1-15ms
vTaskDelay(pdMS_TO_TICKS(1));
USB0.dctl &= ~USB_RMTWKUPSIG_M;
}
// connect by enabling internal pull-up resistor on D+/D-
void dcd_connect(uint8_t rhport)
{
(void) rhport;
USB0.dctl &= ~USB_SFTDISCON_M;
}
// disconnect by disabling internal pull-up resistor on D+/D-
void dcd_disconnect(uint8_t rhport)
{
(void) rhport;
USB0.dctl |= USB_SFTDISCON_M;
}
/*------------------------------------------------------------------*/
/* DCD Endpoint port
*------------------------------------------------------------------*/
bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const *desc_edpt)
{
ESP_LOGV(TAG, "DCD endpoint opened");
(void)rhport;
usb_out_endpoint_t *out_ep = &(USB0.out_ep_reg[0]);
usb_in_endpoint_t *in_ep = &(USB0.in_ep_reg[0]);
uint8_t const epnum = tu_edpt_number(desc_edpt->bEndpointAddress);
uint8_t const dir = tu_edpt_dir(desc_edpt->bEndpointAddress);
TU_ASSERT(epnum < EP_MAX);
xfer_ctl_t *xfer = XFER_CTL_BASE(epnum, dir);
xfer->max_size = tu_edpt_packet_size(desc_edpt);
if (dir == TUSB_DIR_OUT) {
out_ep[epnum].doepctl &= ~(USB_D_EPTYPE0_M | USB_D_MPS0_M);
out_ep[epnum].doepctl |= USB_USBACTEP1_M |
desc_edpt->bmAttributes.xfer << USB_EPTYPE1_S |
(desc_edpt->bmAttributes.xfer != TUSB_XFER_ISOCHRONOUS ? USB_DO_SETD0PID1_M : 0) |
xfer->max_size << USB_MPS1_S;
USB0.daintmsk |= (1 << (16 + epnum));
} else {
// "USB Data FIFOs" section in reference manual
// Peripheral FIFO architecture
//
// --------------- 320 or 1024 ( 1280 or 4096 bytes )
// | IN FIFO MAX |
// ---------------
// | ... |
// --------------- y + x + 16 + GRXFSIZ
// | IN FIFO 2 |
// --------------- x + 16 + GRXFSIZ
// | IN FIFO 1 |
// --------------- 16 + GRXFSIZ
// | IN FIFO 0 |
// --------------- GRXFSIZ
// | OUT FIFO |
// | ( Shared ) |
// --------------- 0
//
// Since OUT FIFO = GRXFSIZ, FIFO 0 = 16, for simplicity, we equally allocated for the rest of endpoints
// - Size : (FIFO_SIZE/4 - GRXFSIZ - 16) / (EP_MAX-1)
// - Offset: GRXFSIZ + 16 + Size*(epnum-1)
// - IN EP 1 gets FIFO 1, IN EP "n" gets FIFO "n".
uint8_t fifo_num = 0;
// Special Case for EP5, which is used by CDC but not actually called by the driver
// we can give it a fake FIFO
if (epnum == 5) {
fifo_num = EP_FIFO_NUM;
} else {
fifo_num = get_free_fifo();
}
TU_ASSERT(fifo_num != 0);
in_ep[epnum].diepctl &= ~(USB_D_TXFNUM1_M | USB_D_EPTYPE1_M | USB_DI_SETD0PID1 | USB_D_MPS1_M);
in_ep[epnum].diepctl |= USB_D_USBACTEP1_M |
fifo_num << USB_D_TXFNUM1_S |
desc_edpt->bmAttributes.xfer << USB_D_EPTYPE1_S |
(desc_edpt->bmAttributes.xfer != TUSB_XFER_ISOCHRONOUS ? (1 << USB_DI_SETD0PID1_S) : 0) |
xfer->max_size << 0;
USB0.daintmsk |= (1 << (0 + epnum));
// Both TXFD and TXSA are in unit of 32-bit words.
// IN FIFO 0 was configured during enumeration, hence the "+ 16".
uint16_t const allocated_size = (USB0.grxfsiz & 0x0000ffff) + 16;
uint16_t const fifo_size = (EP_FIFO_SIZE/4 - allocated_size) / (EP_FIFO_NUM-1);
uint32_t const fifo_offset = allocated_size + fifo_size*(fifo_num-1);
// DIEPTXF starts at FIFO #1.
USB0.dieptxf[epnum - 1] = (fifo_size << USB_NPTXFDEP_S) | fifo_offset;
}
return true;
}
void dcd_edpt_close_all(uint8_t rhport)
{
(void) rhport;
usb_out_endpoint_t *out_ep = &(USB0.out_ep_reg[0]);
usb_in_endpoint_t *in_ep = &(USB0.in_ep_reg[0]);
// Disable non-control interrupt
USB0.daintmsk = USB_OUTEPMSK0_M | USB_INEPMSK0_M;
for(uint8_t n = 1; n < EP_MAX; n++)
{
// disable OUT endpoint
out_ep[n].doepctl = 0;
xfer_status[n][TUSB_DIR_OUT].max_size = 0;
// disable IN endpoint
in_ep[n].diepctl = 0;
xfer_status[n][TUSB_DIR_IN].max_size = 0;
}
_allocated_fifos = 1;
}
bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t *buffer, uint16_t total_bytes)
{
(void)rhport;
uint8_t const epnum = tu_edpt_number(ep_addr);
uint8_t const dir = tu_edpt_dir(ep_addr);
xfer_ctl_t * xfer = XFER_CTL_BASE(epnum, dir);
xfer->buffer = buffer;
// xfer->ff = NULL; // TODO support dcd_edpt_xfer_fifo API
xfer->total_len = total_bytes;
xfer->queued_len = 0;
xfer->short_packet = false;
uint16_t num_packets = (total_bytes / xfer->max_size);
uint8_t short_packet_size = total_bytes % xfer->max_size;
// Zero-size packet is special case.
if (short_packet_size > 0 || (total_bytes == 0)) {
num_packets++;
}
ESP_LOGV(TAG, "Transfer <-> EP%i, %s, pkgs: %i, bytes: %i",
epnum, ((dir == TUSB_DIR_IN) ? "USB0.HOST (in)" : "HOST->DEV (out)"),
num_packets, total_bytes);
// IN and OUT endpoint xfers are interrupt-driven, we just schedule them
// here.
if (dir == TUSB_DIR_IN) {
// A full IN transfer (multiple packets, possibly) triggers XFRC.
USB0.in_ep_reg[epnum].dieptsiz = (num_packets << USB_D_PKTCNT0_S) | total_bytes;
USB0.in_ep_reg[epnum].diepctl |= USB_D_EPENA1_M | USB_D_CNAK1_M; // Enable | CNAK
// Enable fifo empty interrupt only if there are something to put in the fifo.
if(total_bytes != 0) {
USB0.dtknqr4_fifoemptymsk |= (1 << epnum);
}
} else {
// Each complete packet for OUT xfers triggers XFRC.
USB0.out_ep_reg[epnum].doeptsiz |= USB_PKTCNT0_M | ((xfer->max_size & USB_XFERSIZE0_V) << USB_XFERSIZE0_S);
USB0.out_ep_reg[epnum].doepctl |= USB_EPENA0_M | USB_CNAK0_M;
}
return true;
}
#if 0 // TODO support dcd_edpt_xfer_fifo API
bool dcd_edpt_xfer_fifo (uint8_t rhport, uint8_t ep_addr, tu_fifo_t * ff, uint16_t total_bytes)
{
(void)rhport;
}
#endif
void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr)
{
(void)rhport;
usb_out_endpoint_t *out_ep = &(USB0.out_ep_reg[0]);
usb_in_endpoint_t *in_ep = &(USB0.in_ep_reg[0]);
uint8_t const epnum = tu_edpt_number(ep_addr);
uint8_t const dir = tu_edpt_dir(ep_addr);
if (dir == TUSB_DIR_IN) {
// Only disable currently enabled non-control endpoint
if ((epnum == 0) || !(in_ep[epnum].diepctl & USB_D_EPENA1_M)) {
in_ep[epnum].diepctl |= (USB_DI_SNAK1_M | USB_D_STALL1_M);
} else {
// Stop transmitting packets and NAK IN xfers.
in_ep[epnum].diepctl |= USB_DI_SNAK1_M;
while ((in_ep[epnum].diepint & USB_DI_SNAK1_M) == 0) ;
// Disable the endpoint. Note that both SNAK and STALL are set here.
in_ep[epnum].diepctl |= (USB_DI_SNAK1_M | USB_D_STALL1_M | USB_D_EPDIS1_M);
while ((in_ep[epnum].diepint & USB_D_EPDISBLD0_M) == 0) ;
in_ep[epnum].diepint = USB_D_EPDISBLD0_M;
}
// Flush the FIFO, and wait until we have confirmed it cleared.
uint8_t const fifo_num = ((in_ep[epnum].diepctl >> USB_D_TXFNUM1_S) & USB_D_TXFNUM1_V);
USB0.grstctl |= (fifo_num << USB_TXFNUM_S);
USB0.grstctl |= USB_TXFFLSH_M;
while ((USB0.grstctl & USB_TXFFLSH_M) != 0) ;
} else {
// Only disable currently enabled non-control endpoint
if ((epnum == 0) || !(out_ep[epnum].doepctl & USB_EPENA0_M)) {
out_ep[epnum].doepctl |= USB_STALL0_M;
} else {
// Asserting GONAK is required to STALL an OUT endpoint.
// Simpler to use polling here, we don't use the "B"OUTNAKEFF interrupt
// anyway, and it can't be cleared by user code. If this while loop never
// finishes, we have bigger problems than just the stack.
USB0.dctl |= USB_SGOUTNAK_M;
while ((USB0.gintsts & USB_GOUTNAKEFF_M) == 0) ;
// Ditto here- disable the endpoint. Note that only STALL and not SNAK
// is set here.
out_ep[epnum].doepctl |= (USB_STALL0_M | USB_EPDIS0_M);
while ((out_ep[epnum].doepint & USB_EPDISBLD0_M) == 0) ;
out_ep[epnum].doepint = USB_EPDISBLD0_M;
// Allow other OUT endpoints to keep receiving.
USB0.dctl |= USB_CGOUTNAK_M;
}
}
}
void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr)
{
(void)rhport;
usb_out_endpoint_t *out_ep = &(USB0.out_ep_reg[0]);
usb_in_endpoint_t *in_ep = &(USB0.in_ep_reg[0]);
uint8_t const epnum = tu_edpt_number(ep_addr);
uint8_t const dir = tu_edpt_dir(ep_addr);
if (dir == TUSB_DIR_IN) {
in_ep[epnum].diepctl &= ~USB_D_STALL1_M;
uint8_t eptype = (in_ep[epnum].diepctl & USB_D_EPTYPE1_M) >> USB_D_EPTYPE1_S;
// Required by USB spec to reset DATA toggle bit to DATA0 on interrupt
// and bulk endpoints.
if (eptype == 2 || eptype == 3) {
in_ep[epnum].diepctl |= USB_DI_SETD0PID1_M;
}
} else {
out_ep[epnum].doepctl &= ~USB_STALL1_M;
uint8_t eptype = (out_ep[epnum].doepctl & USB_EPTYPE1_M) >> USB_EPTYPE1_S;
// Required by USB spec to reset DATA toggle bit to DATA0 on interrupt
// and bulk endpoints.
if (eptype == 2 || eptype == 3) {
out_ep[epnum].doepctl |= USB_DO_SETD0PID1_M;
}
}
}
/*------------------------------------------------------------------*/
static void receive_packet(xfer_ctl_t *xfer, /* usb_out_endpoint_t * out_ep, */ uint16_t xfer_size)
{
ESP_EARLY_LOGV(TAG, "USB - receive_packet");
volatile uint32_t *rx_fifo = USB0.fifo[0];
// See above TODO
// uint16_t remaining = (out_ep->DOEPTSIZ & UsbDOEPTSIZ_XFRSIZ_Msk) >> UsbDOEPTSIZ_XFRSIZ_Pos;
// xfer->queued_len = xfer->total_len - remaining;
uint16_t remaining = xfer->total_len - xfer->queued_len;
uint16_t to_recv_size;
if (remaining <= xfer->max_size) {
// Avoid buffer overflow.
to_recv_size = (xfer_size > remaining) ? remaining : xfer_size;
} else {
// Room for full packet, choose recv_size based on what the microcontroller
// claims.
to_recv_size = (xfer_size > xfer->max_size) ? xfer->max_size : xfer_size;
}
// Common buffer read
#if 0 // TODO support dcd_edpt_xfer_fifo API
if (xfer->ff)
{
// Ring buffer
tu_fifo_write_n_const_addr_full_words(xfer->ff, (const void *) rx_fifo, to_recv_size);
}
else
#endif
{
uint8_t to_recv_rem = to_recv_size % 4;
uint16_t to_recv_size_aligned = to_recv_size - to_recv_rem;
// Do not assume xfer buffer is aligned.
uint8_t *base = (xfer->buffer + xfer->queued_len);
// This for loop always runs at least once- skip if less than 4 bytes
// to collect.
if (to_recv_size >= 4) {
for (uint16_t i = 0; i < to_recv_size_aligned; i += 4) {
uint32_t tmp = (*rx_fifo);
base[i] = tmp & 0x000000FF;
base[i + 1] = (tmp & 0x0000FF00) >> 8;
base[i + 2] = (tmp & 0x00FF0000) >> 16;
base[i + 3] = (tmp & 0xFF000000) >> 24;
}
}
// Do not read invalid bytes from RX FIFO.
if (to_recv_rem != 0) {
uint32_t tmp = (*rx_fifo);
uint8_t *last_32b_bound = base + to_recv_size_aligned;
last_32b_bound[0] = tmp & 0x000000FF;
if (to_recv_rem > 1) {
last_32b_bound[1] = (tmp & 0x0000FF00) >> 8;
}
if (to_recv_rem > 2) {
last_32b_bound[2] = (tmp & 0x00FF0000) >> 16;
}
}
}
xfer->queued_len += xfer_size;
// Per USB spec, a short OUT packet (including length 0) is always
// indicative of the end of a transfer (at least for ctl, bulk, int).
xfer->short_packet = (xfer_size < xfer->max_size);
}
static void transmit_packet(xfer_ctl_t *xfer, volatile usb_in_endpoint_t *in_ep, uint8_t fifo_num)
{
ESP_EARLY_LOGV(TAG, "USB - transmit_packet");
volatile uint32_t *tx_fifo = USB0.fifo[fifo_num];
uint16_t remaining = (in_ep->dieptsiz & 0x7FFFFU) >> USB_D_XFERSIZE0_S;
xfer->queued_len = xfer->total_len - remaining;
uint16_t to_xfer_size = (remaining > xfer->max_size) ? xfer->max_size : remaining;
#if 0 // TODO support dcd_edpt_xfer_fifo API
if (xfer->ff)
{
tu_fifo_read_n_const_addr_full_words(xfer->ff, (void *) tx_fifo, to_xfer_size);
}
else
#endif
{
uint8_t to_xfer_rem = to_xfer_size % 4;
uint16_t to_xfer_size_aligned = to_xfer_size - to_xfer_rem;
// Buffer might not be aligned to 32b, so we need to force alignment
// by copying to a temp var.
uint8_t *base = (xfer->buffer + xfer->queued_len);
// This for loop always runs at least once- skip if less than 4 bytes
// to send off.
if (to_xfer_size >= 4) {
for (uint16_t i = 0; i < to_xfer_size_aligned; i += 4) {
uint32_t tmp = base[i] | (base[i + 1] << 8) |
(base[i + 2] << 16) | (base[i + 3] << 24);
(*tx_fifo) = tmp;
}
}
// Do not read beyond end of buffer if not divisible by 4.
if (to_xfer_rem != 0) {
uint32_t tmp = 0;
uint8_t *last_32b_bound = base + to_xfer_size_aligned;
tmp |= last_32b_bound[0];
if (to_xfer_rem > 1) {
tmp |= (last_32b_bound[1] << 8);
}
if (to_xfer_rem > 2) {
tmp |= (last_32b_bound[2] << 16);
}
(*tx_fifo) = tmp;
}
}
}
static void read_rx_fifo(void)
{
// Pop control word off FIFO (completed xfers will have 2 control words,
// we only pop one ctl word each interrupt).
uint32_t const ctl_word = USB0.grxstsp;
uint8_t const pktsts = (ctl_word & USB_PKTSTS_M) >> USB_PKTSTS_S;
uint8_t const epnum = (ctl_word & USB_CHNUM_M ) >> USB_CHNUM_S;
uint16_t const bcnt = (ctl_word & USB_BCNT_M ) >> USB_BCNT_S;
switch (pktsts) {
case 0x01: // Global OUT NAK (Interrupt)
ESP_EARLY_LOGV(TAG, "TUSB IRQ - RX type : Global OUT NAK");
break;
case 0x02: { // Out packet recvd
ESP_EARLY_LOGV(TAG, "TUSB IRQ - RX type : Out packet");
xfer_ctl_t *xfer = XFER_CTL_BASE(epnum, TUSB_DIR_OUT);
receive_packet(xfer, bcnt);
}
break;
case 0x03: // Out packet done (Interrupt)
ESP_EARLY_LOGV(TAG, "TUSB IRQ - RX type : Out packet done");
break;
case 0x04: // Step 2: Setup transaction completed (Interrupt)
// After this event, OEPINT interrupt will occur with SETUP bit set
ESP_EARLY_LOGV(TAG, "TUSB IRQ - RX : Setup packet done");
USB0.out_ep_reg[epnum].doeptsiz |= USB_SUPCNT0_M;
break;
case 0x06: { // Step1: Setup data packet received
volatile uint32_t *rx_fifo = USB0.fifo[0];
// We can receive up to three setup packets in succession, but
// only the last one is valid. Therefore we just overwrite it
_setup_packet[0] = (*rx_fifo);
_setup_packet[1] = (*rx_fifo);
ESP_EARLY_LOGV(TAG, "TUSB IRQ - RX : Setup packet : 0x%08x 0x%08x", _setup_packet[0], _setup_packet[1]);
}
break;
default: // Invalid, do something here, like breakpoint?
TU_BREAKPOINT();
break;
}
}
static void handle_epout_ints(void)
{
// GINTSTS will be cleared with DAINT == 0
// DAINT for a given EP clears when DOEPINTx is cleared.
// DOEPINT will be cleared when DAINT's out bits are cleared.
for (int n = 0; n < USB_OUT_EP_NUM; n++) {
xfer_ctl_t *xfer = XFER_CTL_BASE(n, TUSB_DIR_OUT);
if (USB0.daint & (1 << (16 + n))) {
// SETUP packet Setup Phase done.
if ((USB0.out_ep_reg[n].doepint & USB_SETUP0_M)) {
USB0.out_ep_reg[n].doepint = USB_STUPPKTRCVD0_M | USB_SETUP0_M; // clear
dcd_event_setup_received(0, (uint8_t *)&_setup_packet[0], true);
}
// OUT XFER complete (single packet).q
if (USB0.out_ep_reg[n].doepint & USB_XFERCOMPL0_M) {
ESP_EARLY_LOGV(TAG, "TUSB IRQ - EP OUT - XFER complete (single packet)");
USB0.out_ep_reg[n].doepint = USB_XFERCOMPL0_M;
// Transfer complete if short packet or total len is transferred
if (xfer->short_packet || (xfer->queued_len == xfer->total_len)) {
xfer->short_packet = false;
dcd_event_xfer_complete(0, n, xfer->queued_len, XFER_RESULT_SUCCESS, true);
} else {
// Schedule another packet to be received.
USB0.out_ep_reg[n].doeptsiz |= USB_PKTCNT0_M | ((xfer->max_size & USB_XFERSIZE0_V) << USB_XFERSIZE0_S);
USB0.out_ep_reg[n].doepctl |= USB_EPENA0_M | USB_CNAK0_M;
}
}
}
}
}
static void handle_epin_ints(void)
{
// GINTSTS will be cleared with DAINT == 0
// DAINT for a given EP clears when DIEPINTx is cleared.
// IEPINT will be cleared when DAINT's out bits are cleared.
for (uint32_t n = 0; n < USB_IN_EP_NUM; n++) {
xfer_ctl_t *xfer = &xfer_status[n][TUSB_DIR_IN];
if (USB0.daint & (1 << (0 + n))) {
ESP_EARLY_LOGV(TAG, "TUSB IRQ - EP IN %u", n);
if (USB0.in_ep_reg[n].diepint & BIT(15)) {
USB0.in_ep_reg[n].diepint = BIT(15);
ESP_EARLY_LOGE(TAG, "Unknown Condition");//todo:
bus_reset();
}
// IN XFER complete (entire xfer).
if (USB0.in_ep_reg[n].diepint & USB_D_XFERCOMPL0_M) {
ESP_EARLY_LOGV(TAG, "TUSB IRQ - IN XFER complete!");
USB0.in_ep_reg[n].diepint = USB_D_XFERCOMPL0_M;
dcd_event_xfer_complete(0, n | TUSB_DIR_IN_MASK, xfer->total_len, XFER_RESULT_SUCCESS, true);
if (!(USB0.in_ep_reg[n].diepint & USB_D_TXFEMP0_M)) {
ESP_EARLY_LOGE(TAG, "Complete but not empty: %u/%u", xfer->queued_len, xfer->total_len);//todo:
}
}
// XFER FIFO empty
if (USB0.in_ep_reg[n].diepint & USB_D_TXFEMP0_M) {
ESP_EARLY_LOGV(TAG, "TUSB IRQ - IN XFER FIFO empty!");
USB0.in_ep_reg[n].diepint = USB_D_TXFEMP0_M;
transmit_packet(xfer, &USB0.in_ep_reg[n], n);
// Turn off TXFE if all bytes are written.
if (xfer->queued_len == xfer->total_len)
{
USB0.dtknqr4_fifoemptymsk &= ~(1 << n);
}
}
// XFER Timeout
if (USB0.in_ep_reg[n].diepint & USB_D_TIMEOUT0_M) {
// Clear interrupt or enpoint will hang.
USB0.in_ep_reg[n].diepint = USB_D_TIMEOUT0_M;
ESP_EARLY_LOGE(TAG, "XFER Timeout");//todo:
// Maybe retry?
}
}
}
}
static void _dcd_int_handler(void* arg)
{
(void) arg;
uint8_t const rhport = 0;
const uint32_t int_msk = USB0.gintmsk;
const uint32_t int_status = USB0.gintsts & int_msk;
if (int_status & USB_USBRST_M) {
// start of reset
ESP_EARLY_LOGV(TAG, "dcd_int_handler - reset");
USB0.gintsts = USB_USBRST_M;
// FIFOs will be reassigned when the endpoints are reopen
_allocated_fifos = 1;
bus_reset();
}
if (int_status & USB_RESETDET_M) {
ESP_EARLY_LOGV(TAG, "dcd_int_handler - reset while suspend");
USB0.gintsts = USB_RESETDET_M;
// no need to double reset
if ((int_status & USB_USBRST_M) == 0) {
_allocated_fifos = 1;
bus_reset();
}
}
if (int_status & USB_ENUMDONE_M) {
// ENUMDNE detects speed of the link. For full-speed, we
// always expect the same value. This interrupt is considered
// the end of reset.
USB0.gintsts = USB_ENUMDONE_M;
enum_done_processing();
dcd_event_bus_reset(rhport, TUSB_SPEED_FULL, true);
}
if(int_status & USB_USBSUSP_M)
{
USB0.gintsts = USB_USBSUSP_M;
//dcd_event_bus_signal(rhport, DCD_EVENT_SUSPEND, true);
dcd_event_bus_signal(rhport, DCD_EVENT_UNPLUGGED, true);
_allocated_fifos = 1;
}
if(int_status & USB_WKUPINT_M)
{
USB0.gintsts = USB_WKUPINT_M;
dcd_event_bus_signal(rhport, DCD_EVENT_RESUME, true);
}
if (int_status & USB_OTGINT_M)
{
// OTG INT bit is read-only
ESP_EARLY_LOGV(TAG, "dcd_int_handler - disconnected");
uint32_t const otg_int = USB0.gotgint;
if (otg_int & USB_SESENDDET_M)
{
dcd_event_bus_signal(rhport, DCD_EVENT_UNPLUGGED, true);
_allocated_fifos = 1;
}
USB0.gotgint = otg_int;
}
if (int_status & USB_SOF_M) {
USB0.gintsts = USB_SOF_M;
// Disable SOF interrupt since currently only used for remote wakeup detection
USB0.gintmsk &= ~USB_SOFMSK_M;
dcd_event_bus_signal(rhport, DCD_EVENT_SOF, true);
}
if (int_status & USB_RXFLVI_M) {
// RXFLVL bit is read-only
ESP_EARLY_LOGV(TAG, "dcd_int_handler - rx!");
// Mask out RXFLVL while reading data from FIFO
USB0.gintmsk &= ~USB_RXFLVIMSK_M;
read_rx_fifo();
USB0.gintmsk |= USB_RXFLVIMSK_M;
}
// OUT endpoint interrupt handling.
if (int_status & USB_OEPINT_M) {
// OEPINT is read-only
ESP_EARLY_LOGV(TAG, "dcd_int_handler - OUT endpoint!");
handle_epout_ints();
}
// IN endpoint interrupt handling.
if (int_status & USB_IEPINT_M) {
// IEPINT bit read-only
ESP_EARLY_LOGV(TAG, "dcd_int_handler - IN endpoint!");
handle_epin_ints();
}
// Without handling
USB0.gintsts |= USB_CURMOD_INT_M |
USB_MODEMIS_M |
USB_OTGINT_M |
USB_NPTXFEMP_M |
USB_GINNAKEFF_M |
USB_GOUTNAKEFF |
USB_ERLYSUSP_M |
USB_USBSUSP_M |
USB_ISOOUTDROP_M |
USB_EOPF_M |
USB_EPMIS_M |
USB_INCOMPISOIN_M |
USB_INCOMPIP_M |
USB_FETSUSP_M |
USB_PTXFEMP_M;
}
void dcd_int_enable (uint8_t rhport)
{
(void) rhport;
esp_intr_alloc(ETS_USB_INTR_SOURCE, ESP_INTR_FLAG_LOWMED, (intr_handler_t) _dcd_int_handler, NULL, &usb_ih);
}
void dcd_int_disable (uint8_t rhport)
{
(void) rhport;
esp_intr_free(usb_ih);
}
#endif // #if OPT_MCU_ESP32S2 || OPT_MCU_ESP32S3

5
components/fb_gfx/CMakeLists.txt Normal file
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@ -0,0 +1,5 @@
set(COMPONENT_SRCS "fb_gfx.c")
set(COMPONENT_ADD_INCLUDEDIRS "include")
set(COMPONENT_PRIV_INCLUDEDIRS "")
set(COMPONENT_PRIV_REQUIRES newlib)
register_component()

250
components/fb_gfx/FreeMonoBold12pt7b.h Executable file
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@ -0,0 +1,250 @@
const uint8_t FreeMonoBold12pt7bBitmaps[] = {
0xFF, 0xFF, 0xFF, 0xF6, 0x66, 0x60, 0x6F, 0x60, 0xE7, 0xE7, 0x62, 0x42,
0x42, 0x42, 0x42, 0x11, 0x87, 0x30, 0xC6, 0x18, 0xC3, 0x31, 0xFF, 0xFF,
0xF9, 0x98, 0x33, 0x06, 0x60, 0xCC, 0x7F, 0xEF, 0xFC, 0x66, 0x0C, 0xC3,
0x98, 0x63, 0x04, 0x40, 0x0C, 0x03, 0x00, 0xC0, 0xFE, 0x7F, 0x9C, 0x66,
0x09, 0x80, 0x78, 0x0F, 0xE0, 0x7F, 0x03, 0xE0, 0xF8, 0x7F, 0xFB, 0xFC,
0x0C, 0x03, 0x00, 0xC0, 0x30, 0x38, 0x1F, 0x0C, 0x42, 0x10, 0xC4, 0x1F,
0x03, 0x9C, 0x3C, 0x7F, 0x33, 0xE0, 0x8C, 0x21, 0x08, 0xC3, 0xE0, 0x70,
0x3E, 0x1F, 0xC6, 0x61, 0x80, 0x70, 0x0C, 0x07, 0x83, 0xEE, 0xDF, 0xB3,
0xCC, 0x73, 0xFE, 0x7F, 0x80, 0xFD, 0x24, 0x90, 0x39, 0xDC, 0xE6, 0x73,
0x18, 0xC6, 0x31, 0x8C, 0x31, 0x8E, 0x31, 0xC4, 0xE7, 0x1C, 0xE3, 0x1C,
0x63, 0x18, 0xC6, 0x31, 0x98, 0xCE, 0x67, 0x10, 0x0C, 0x03, 0x00, 0xC3,
0xB7, 0xFF, 0xDF, 0xE1, 0xE0, 0xFC, 0x33, 0x0C, 0xC0, 0x06, 0x00, 0x60,
0x06, 0x00, 0x60, 0x06, 0x0F, 0xFF, 0xFF, 0xF0, 0x60, 0x06, 0x00, 0x60,
0x06, 0x00, 0x60, 0x06, 0x00, 0x3B, 0x9C, 0xCE, 0x62, 0x00, 0xFF, 0xFF,
0xFF, 0xFF, 0x80, 0x00, 0x40, 0x30, 0x1C, 0x07, 0x03, 0x80, 0xE0, 0x30,
0x1C, 0x06, 0x03, 0x80, 0xC0, 0x70, 0x18, 0x0E, 0x03, 0x01, 0xC0, 0x60,
0x38, 0x0E, 0x01, 0x00, 0x1E, 0x0F, 0xC6, 0x1B, 0x87, 0xC0, 0xF0, 0x3C,
0x0F, 0x03, 0xC0, 0xF0, 0x3C, 0x0F, 0x87, 0x61, 0x8F, 0xC1, 0xE0, 0x1C,
0x0F, 0x0F, 0xC3, 0xB0, 0x0C, 0x03, 0x00, 0xC0, 0x30, 0x0C, 0x03, 0x00,
0xC0, 0x30, 0x0C, 0x3F, 0xFF, 0xFC, 0x1F, 0x1F, 0xEE, 0x1F, 0x83, 0xC0,
0xC0, 0x70, 0x38, 0x1E, 0x0F, 0x07, 0x83, 0xC1, 0xE3, 0xF0, 0xFF, 0xFF,
0xFC, 0x3F, 0x0F, 0xF1, 0x87, 0x00, 0x60, 0x0C, 0x03, 0x83, 0xE0, 0x7C,
0x01, 0xC0, 0x0C, 0x01, 0x80, 0x3C, 0x0F, 0xFF, 0x9F, 0xC0, 0x07, 0x07,
0x83, 0xC3, 0xE1, 0xB1, 0xD8, 0xCC, 0xC6, 0xE3, 0x7F, 0xFF, 0xE0, 0x61,
0xF8, 0xFC, 0x7F, 0x9F, 0xE6, 0x01, 0x80, 0x60, 0x1F, 0x87, 0xF9, 0x86,
0x00, 0xC0, 0x30, 0x0C, 0x03, 0xC1, 0xBF, 0xE7, 0xE0, 0x07, 0xC7, 0xF3,
0xC1, 0xC0, 0x60, 0x38, 0x0E, 0xF3, 0xFE, 0xF1, 0xF8, 0x3E, 0x0F, 0x83,
0x71, 0xCF, 0xE1, 0xF0, 0xFF, 0xFF, 0xFC, 0x1F, 0x07, 0x01, 0x80, 0x60,
0x38, 0x0C, 0x03, 0x01, 0xC0, 0x60, 0x18, 0x0E, 0x03, 0x00, 0xC0, 0x1E,
0x1F, 0xEE, 0x1F, 0x03, 0xC0, 0xF0, 0x36, 0x19, 0xFE, 0x7F, 0xB8, 0x7C,
0x0F, 0x03, 0xE1, 0xDF, 0xE3, 0xF0, 0x3E, 0x1F, 0xCE, 0x3B, 0x07, 0xC1,
0xF0, 0x7E, 0x3D, 0xFF, 0x3D, 0xC0, 0x70, 0x18, 0x0E, 0x0F, 0x3F, 0x8F,
0x80, 0xFF, 0x80, 0x00, 0xFF, 0x80, 0x77, 0x70, 0x00, 0x00, 0x76, 0x6C,
0xC8, 0x80, 0x00, 0x30, 0x0F, 0x03, 0xE0, 0xF8, 0x3E, 0x0F, 0x80, 0x3E,
0x00, 0xF8, 0x03, 0xE0, 0x0F, 0x00, 0x20, 0xFF, 0xFF, 0xFF, 0x00, 0x00,
0x00, 0x00, 0x0F, 0xFF, 0xFF, 0xF0, 0x60, 0x0F, 0x80, 0x3E, 0x00, 0xF8,
0x03, 0xE0, 0x1F, 0x07, 0xC1, 0xF0, 0x7C, 0x0F, 0x00, 0x40, 0x00, 0x7C,
0x7F, 0xB0, 0xF8, 0x30, 0x18, 0x1C, 0x3C, 0x3C, 0x18, 0x08, 0x00, 0x07,
0x03, 0x81, 0xC0, 0x1E, 0x07, 0xF1, 0xC7, 0x30, 0x6C, 0x0D, 0x87, 0xB3,
0xF6, 0xE6, 0xD8, 0xDB, 0x1B, 0x73, 0x67, 0xFC, 0x7F, 0x80, 0x30, 0x03,
0x00, 0x71, 0xC7, 0xF8, 0x7C, 0x00, 0x3F, 0x80, 0x7F, 0x80, 0x1F, 0x00,
0x76, 0x00, 0xEE, 0x01, 0x8C, 0x07, 0x18, 0x0E, 0x38, 0x1F, 0xF0, 0x7F,
0xF0, 0xC0, 0x61, 0x80, 0xCF, 0xC7, 0xFF, 0x8F, 0xC0, 0xFF, 0xC7, 0xFF,
0x0C, 0x1C, 0x60, 0x63, 0x03, 0x18, 0x38, 0xFF, 0x87, 0xFE, 0x30, 0x39,
0x80, 0xCC, 0x06, 0x60, 0x7F, 0xFF, 0x7F, 0xF0, 0x0F, 0xF3, 0xFF, 0x70,
0x76, 0x03, 0xC0, 0x3C, 0x00, 0xC0, 0x0C, 0x00, 0xC0, 0x0C, 0x00, 0x60,
0x37, 0x07, 0x3F, 0xF0, 0xFC, 0xFF, 0x0F, 0xFC, 0x60, 0xE6, 0x06, 0x60,
0x36, 0x03, 0x60, 0x36, 0x03, 0x60, 0x36, 0x03, 0x60, 0x76, 0x0E, 0xFF,
0xCF, 0xF8, 0xFF, 0xF7, 0xFF, 0x8C, 0x0C, 0x60, 0x63, 0x1B, 0x18, 0xC0,
0xFE, 0x07, 0xF0, 0x31, 0x81, 0x8C, 0xCC, 0x06, 0x60, 0x3F, 0xFF, 0xFF,
0xFC, 0xFF, 0xFF, 0xFF, 0xCC, 0x06, 0x60, 0x33, 0x19, 0x98, 0xC0, 0xFE,
0x07, 0xF0, 0x31, 0x81, 0x8C, 0x0C, 0x00, 0x60, 0x0F, 0xF0, 0x7F, 0x80,
0x0F, 0xF1, 0xFF, 0x9C, 0x1C, 0xC0, 0x6C, 0x03, 0x60, 0x03, 0x00, 0x18,
0x7F, 0xC3, 0xFE, 0x01, 0xB8, 0x0C, 0xE0, 0xE3, 0xFF, 0x07, 0xE0, 0x7C,
0xF9, 0xF3, 0xE3, 0x03, 0x0C, 0x0C, 0x30, 0x30, 0xC0, 0xC3, 0xFF, 0x0F,
0xFC, 0x30, 0x30, 0xC0, 0xC3, 0x03, 0x0C, 0x0C, 0xFC, 0xFF, 0xF3, 0xF0,
0xFF, 0xFF, 0xF0, 0xC0, 0x30, 0x0C, 0x03, 0x00, 0xC0, 0x30, 0x0C, 0x03,
0x00, 0xC0, 0x30, 0xFF, 0xFF, 0xF0, 0x0F, 0xF8, 0x7F, 0xC0, 0x30, 0x01,
0x80, 0x0C, 0x00, 0x60, 0x03, 0x18, 0x18, 0xC0, 0xC6, 0x06, 0x30, 0x31,
0xC3, 0x0F, 0xF8, 0x1F, 0x00, 0xFC, 0xFB, 0xF3, 0xE3, 0x0E, 0x0C, 0x70,
0x33, 0x80, 0xFC, 0x03, 0xF0, 0x0F, 0xE0, 0x39, 0xC0, 0xC3, 0x03, 0x0E,
0x0C, 0x18, 0xFC, 0x7F, 0xF0, 0xF0, 0xFF, 0x0F, 0xF0, 0x18, 0x01, 0x80,
0x18, 0x01, 0x80, 0x18, 0x01, 0x80, 0x18, 0x31, 0x83, 0x18, 0x31, 0x83,
0xFF, 0xFF, 0xFF, 0xF0, 0x3F, 0xC0, 0xF7, 0x87, 0x9E, 0x1E, 0x7C, 0xF9,
0xB3, 0xE6, 0xFD, 0x99, 0xF6, 0x67, 0x99, 0x8E, 0x66, 0x31, 0x98, 0x06,
0xFC, 0xFF, 0xF3, 0xF0, 0xF1, 0xFF, 0xCF, 0xCF, 0x0C, 0x78, 0x63, 0xE3,
0x1B, 0x18, 0xDC, 0xC6, 0x76, 0x31, 0xB1, 0x8F, 0x8C, 0x3C, 0x61, 0xE7,
0xE7, 0x3F, 0x18, 0x0F, 0x03, 0xFC, 0x70, 0xE6, 0x06, 0xE0, 0x7C, 0x03,
0xC0, 0x3C, 0x03, 0xC0, 0x3E, 0x07, 0x60, 0x67, 0x0E, 0x3F, 0xC0, 0xF0,
0xFF, 0x8F, 0xFE, 0x30, 0x73, 0x03, 0x30, 0x33, 0x03, 0x30, 0x73, 0xFE,
0x3F, 0x83, 0x00, 0x30, 0x03, 0x00, 0xFF, 0x0F, 0xF0, 0x0F, 0x03, 0xFC,
0x70, 0xE6, 0x06, 0xE0, 0x7C, 0x03, 0xC0, 0x3C, 0x03, 0xC0, 0x3E, 0x07,
0x60, 0x67, 0x0E, 0x3F, 0xC1, 0xF0, 0x18, 0x33, 0xFF, 0x3F, 0xE0, 0xFF,
0x83, 0xFF, 0x83, 0x07, 0x0C, 0x0C, 0x30, 0x30, 0xC1, 0xC3, 0xFE, 0x0F,
0xF0, 0x31, 0xE0, 0xC3, 0x83, 0x07, 0x0C, 0x0C, 0xFE, 0x3F, 0xF8, 0x70,
0x3F, 0xDF, 0xFE, 0x1F, 0x03, 0xC0, 0xF8, 0x07, 0xE0, 0x7E, 0x01, 0xF0,
0x3C, 0x0F, 0x87, 0xFF, 0xBF, 0xC0, 0xFF, 0xFF, 0xFF, 0xC6, 0x3C, 0x63,
0xC6, 0x3C, 0x63, 0x06, 0x00, 0x60, 0x06, 0x00, 0x60, 0x06, 0x00, 0x60,
0x3F, 0xC3, 0xFC, 0xFF, 0xFF, 0xFF, 0x60, 0x66, 0x06, 0x60, 0x66, 0x06,
0x60, 0x66, 0x06, 0x60, 0x66, 0x06, 0x60, 0x63, 0x9C, 0x1F, 0xC0, 0xF0,
0xFC, 0x3F, 0xFC, 0x3F, 0x30, 0x0C, 0x38, 0x1C, 0x18, 0x18, 0x1C, 0x38,
0x1C, 0x38, 0x0E, 0x70, 0x0E, 0x70, 0x0F, 0x60, 0x07, 0xE0, 0x07, 0xE0,
0x03, 0xC0, 0x03, 0xC0, 0xFC, 0xFF, 0xF3, 0xF6, 0x01, 0xDC, 0xC6, 0x77,
0x99, 0xDE, 0x67, 0x79, 0x8D, 0xFE, 0x3F, 0xF8, 0xF3, 0xE3, 0xCF, 0x8F,
0x3C, 0x38, 0x70, 0xE1, 0xC0, 0xF8, 0xFB, 0xE3, 0xE3, 0x86, 0x0F, 0x38,
0x1F, 0xC0, 0x3E, 0x00, 0x70, 0x03, 0xE0, 0x0F, 0x80, 0x77, 0x03, 0x8E,
0x1E, 0x1C, 0xFC, 0xFF, 0xF3, 0xF0, 0xF9, 0xFF, 0x9F, 0x30, 0xC3, 0x9C,
0x19, 0x81, 0xF8, 0x0F, 0x00, 0x60, 0x06, 0x00, 0x60, 0x06, 0x00, 0x60,
0x3F, 0xC3, 0xFC, 0xFF, 0xBF, 0xEC, 0x3B, 0x0C, 0xC6, 0x33, 0x80, 0xC0,
0x60, 0x38, 0xCC, 0x36, 0x0F, 0x03, 0xFF, 0xFF, 0xF0, 0xFF, 0xF1, 0x8C,
0x63, 0x18, 0xC6, 0x31, 0x8C, 0x63, 0x18, 0xC7, 0xFE, 0x40, 0x30, 0x0E,
0x01, 0x80, 0x70, 0x0C, 0x03, 0x80, 0x60, 0x1C, 0x03, 0x00, 0xE0, 0x18,
0x07, 0x00, 0xC0, 0x38, 0x0E, 0x01, 0xC0, 0x70, 0x0C, 0x01, 0xFF, 0xC6,
0x31, 0x8C, 0x63, 0x18, 0xC6, 0x31, 0x8C, 0x63, 0x1F, 0xFE, 0x04, 0x03,
0x01, 0xE0, 0xFC, 0x7B, 0x9C, 0x7E, 0x1F, 0x03, 0xFF, 0xFF, 0xFF, 0xF0,
0xCE, 0x73, 0x3F, 0x07, 0xF8, 0x00, 0xC0, 0x0C, 0x1F, 0xC7, 0xFC, 0x60,
0xCC, 0x0C, 0xC1, 0xCF, 0xFF, 0x3F, 0xF0, 0xF0, 0x07, 0x80, 0x0C, 0x00,
0x60, 0x03, 0x7C, 0x1F, 0xF8, 0xF1, 0xC7, 0x07, 0x30, 0x19, 0x80, 0xCC,
0x06, 0x60, 0x73, 0xC7, 0x7F, 0xFB, 0xDF, 0x00, 0x1F, 0xB3, 0xFF, 0x70,
0xFE, 0x07, 0xC0, 0x3C, 0x00, 0xC0, 0x0C, 0x00, 0x70, 0x77, 0xFF, 0x1F,
0xC0, 0x01, 0xE0, 0x0F, 0x00, 0x18, 0x00, 0xC1, 0xF6, 0x3F, 0xF1, 0xC7,
0x9C, 0x1C, 0xC0, 0x66, 0x03, 0x30, 0x19, 0x81, 0xC7, 0x1E, 0x3F, 0xFC,
0x7D, 0xE0, 0x1F, 0x83, 0xFC, 0x70, 0xEE, 0x07, 0xFF, 0xFF, 0xFF, 0xE0,
0x0E, 0x00, 0x70, 0x73, 0xFF, 0x1F, 0xC0, 0x07, 0xC3, 0xFC, 0x60, 0x0C,
0x0F, 0xFD, 0xFF, 0x86, 0x00, 0xC0, 0x18, 0x03, 0x00, 0x60, 0x0C, 0x01,
0x81, 0xFF, 0xBF, 0xF0, 0x1F, 0x79, 0xFF, 0xDC, 0x79, 0x81, 0xCC, 0x06,
0x60, 0x33, 0x01, 0x9C, 0x1C, 0x71, 0xE1, 0xFF, 0x07, 0xD8, 0x00, 0xC0,
0x06, 0x00, 0x70, 0x7F, 0x03, 0xF0, 0xF0, 0x03, 0xC0, 0x03, 0x00, 0x0C,
0x00, 0x37, 0xC0, 0xFF, 0x83, 0xC7, 0x0C, 0x0C, 0x30, 0x30, 0xC0, 0xC3,
0x03, 0x0C, 0x0C, 0x30, 0x33, 0xF3, 0xFF, 0xCF, 0xC0, 0x06, 0x00, 0xC0,
0x00, 0x3F, 0x07, 0xE0, 0x0C, 0x01, 0x80, 0x30, 0x06, 0x00, 0xC0, 0x18,
0x03, 0x0F, 0xFF, 0xFF, 0xC0, 0x06, 0x06, 0x00, 0xFF, 0xFF, 0x03, 0x03,
0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x07, 0xFE, 0xFC,
0xF0, 0x07, 0x80, 0x0C, 0x00, 0x60, 0x03, 0x3F, 0x19, 0xF8, 0xDE, 0x07,
0xE0, 0x3E, 0x01, 0xF0, 0x0F, 0xC0, 0x6F, 0x03, 0x1C, 0x78, 0xFF, 0xC7,
0xE0, 0x7E, 0x0F, 0xC0, 0x18, 0x03, 0x00, 0x60, 0x0C, 0x01, 0x80, 0x30,
0x06, 0x00, 0xC0, 0x18, 0x03, 0x00, 0x61, 0xFF, 0xFF, 0xF8, 0xFE, 0xF1,
0xFF, 0xF1, 0xCE, 0x63, 0x18, 0xC6, 0x31, 0x8C, 0x63, 0x18, 0xC6, 0x31,
0x8C, 0x63, 0x19, 0xF7, 0xBF, 0xEF, 0x78, 0x77, 0xC1, 0xFF, 0x83, 0xC7,
0x0C, 0x0C, 0x30, 0x30, 0xC0, 0xC3, 0x03, 0x0C, 0x0C, 0x30, 0x33, 0xF1,
0xFF, 0xC7, 0xC0, 0x1F, 0x83, 0xFC, 0x70, 0xEE, 0x07, 0xC0, 0x3C, 0x03,
0xC0, 0x3E, 0x07, 0x70, 0xE3, 0xFC, 0x1F, 0x80, 0xF7, 0xE3, 0xFF, 0xC3,
0xC3, 0x8E, 0x07, 0x30, 0x0C, 0xC0, 0x33, 0x00, 0xCE, 0x07, 0x3C, 0x38,
0xFF, 0xC3, 0x7E, 0x0C, 0x00, 0x30, 0x00, 0xC0, 0x0F, 0xE0, 0x3F, 0x80,
0x1F, 0xBC, 0xFF, 0xF7, 0x0F, 0x38, 0x1C, 0xC0, 0x33, 0x00, 0xCC, 0x03,
0x38, 0x1C, 0x70, 0xF0, 0xFF, 0xC1, 0xFB, 0x00, 0x0C, 0x00, 0x30, 0x00,
0xC0, 0x1F, 0xC0, 0x7F, 0x79, 0xE7, 0xFF, 0x1F, 0x31, 0xC0, 0x18, 0x01,
0x80, 0x18, 0x01, 0x80, 0x18, 0x0F, 0xFC, 0xFF, 0xC0, 0x3F, 0x9F, 0xFE,
0x1F, 0x82, 0xFE, 0x1F, 0xE0, 0xFF, 0x03, 0xE0, 0xFF, 0xFF, 0xF0, 0x30,
0x06, 0x00, 0xC0, 0x7F, 0xEF, 0xFC, 0x60, 0x0C, 0x01, 0x80, 0x30, 0x06,
0x00, 0xC0, 0x18, 0x71, 0xFE, 0x1F, 0x00, 0xF1, 0xF7, 0x8F, 0x8C, 0x0C,
0x60, 0x63, 0x03, 0x18, 0x18, 0xC0, 0xC6, 0x06, 0x38, 0xF0, 0xFF, 0xC3,
0xEE, 0xFC, 0xFF, 0xF3, 0xF3, 0x87, 0x0E, 0x1C, 0x1C, 0x60, 0x73, 0x80,
0xEC, 0x03, 0xF0, 0x07, 0x80, 0x1E, 0x00, 0x78, 0x00, 0xF8, 0x7F, 0xE1,
0xF7, 0x39, 0x8C, 0xE6, 0x37, 0xB0, 0xFF, 0xC3, 0xFF, 0x07, 0xBC, 0x1C,
0xF0, 0x73, 0x81, 0x86, 0x00, 0x7C, 0xF9, 0xF3, 0xE3, 0xCF, 0x07, 0xF8,
0x0F, 0xC0, 0x1E, 0x00, 0xFC, 0x07, 0x38, 0x38, 0x73, 0xF3, 0xFF, 0xCF,
0xC0, 0xF9, 0xFF, 0x9F, 0x70, 0xE3, 0x0C, 0x39, 0xC1, 0x98, 0x19, 0x81,
0xF8, 0x0F, 0x00, 0xF0, 0x06, 0x00, 0x60, 0x0E, 0x00, 0xC0, 0xFF, 0x0F,
0xF0, 0x7F, 0xCF, 0xF9, 0x8E, 0x33, 0x80, 0x70, 0x1C, 0x07, 0x01, 0xC6,
0x70, 0xFF, 0xFF, 0xFF, 0x80, 0x0E, 0x3C, 0x60, 0xC1, 0x83, 0x06, 0x0C,
0x39, 0xE3, 0xC0, 0xC1, 0x83, 0x06, 0x0C, 0x18, 0x3C, 0x38, 0xFF, 0xFF,
0xFF, 0xFF, 0xF0, 0xE1, 0xC0, 0xC1, 0x83, 0x06, 0x0C, 0x18, 0x30, 0x3C,
0x79, 0x83, 0x06, 0x0C, 0x18, 0x31, 0xE3, 0x80, 0x3C, 0x37, 0xE7, 0x67,
0xE6, 0x1C };
const GFXglyph FreeMonoBold12pt7bGlyphs[] = {
{ 0, 0, 0, 14, 0, 1 }, // 0x20 ' '
{ 0, 4, 15, 14, 5, -14 }, // 0x21 '!'
{ 8, 8, 7, 14, 3, -13 }, // 0x22 '"'
{ 15, 11, 18, 14, 2, -15 }, // 0x23 '#'
{ 40, 10, 20, 14, 2, -16 }, // 0x24 '$'
{ 65, 10, 15, 14, 2, -14 }, // 0x25 '%'
{ 84, 10, 13, 14, 2, -12 }, // 0x26 '&'
{ 101, 3, 7, 14, 5, -13 }, // 0x27 '''
{ 104, 5, 19, 14, 6, -14 }, // 0x28 '('
{ 116, 5, 19, 14, 3, -14 }, // 0x29 ')'
{ 128, 10, 10, 14, 2, -14 }, // 0x2A '*'
{ 141, 12, 13, 14, 1, -12 }, // 0x2B '+'
{ 161, 5, 7, 14, 4, -2 }, // 0x2C ','
{ 166, 12, 2, 14, 1, -7 }, // 0x2D '-'
{ 169, 3, 3, 14, 5, -2 }, // 0x2E '.'
{ 171, 10, 20, 14, 2, -16 }, // 0x2F '/'
{ 196, 10, 15, 14, 2, -14 }, // 0x30 '0'
{ 215, 10, 15, 14, 2, -14 }, // 0x31 '1'
{ 234, 10, 15, 14, 2, -14 }, // 0x32 '2'
{ 253, 11, 15, 14, 1, -14 }, // 0x33 '3'
{ 274, 9, 14, 14, 2, -13 }, // 0x34 '4'
{ 290, 10, 15, 14, 2, -14 }, // 0x35 '5'
{ 309, 10, 15, 14, 2, -14 }, // 0x36 '6'
{ 328, 10, 15, 14, 2, -14 }, // 0x37 '7'
{ 347, 10, 15, 14, 2, -14 }, // 0x38 '8'
{ 366, 10, 15, 14, 3, -14 }, // 0x39 '9'
{ 385, 3, 11, 14, 5, -10 }, // 0x3A ':'
{ 390, 4, 15, 14, 4, -10 }, // 0x3B ';'
{ 398, 12, 11, 14, 1, -11 }, // 0x3C '<'
{ 415, 12, 7, 14, 1, -9 }, // 0x3D '='
{ 426, 12, 11, 14, 1, -11 }, // 0x3E '>'
{ 443, 9, 14, 14, 3, -13 }, // 0x3F '?'
{ 459, 11, 19, 14, 2, -14 }, // 0x40 '@'
{ 486, 15, 14, 14, -1, -13 }, // 0x41 'A'
{ 513, 13, 14, 14, 0, -13 }, // 0x42 'B'
{ 536, 12, 14, 14, 1, -13 }, // 0x43 'C'
{ 557, 12, 14, 14, 1, -13 }, // 0x44 'D'
{ 578, 13, 14, 14, 0, -13 }, // 0x45 'E'
{ 601, 13, 14, 14, 0, -13 }, // 0x46 'F'
{ 624, 13, 14, 14, 1, -13 }, // 0x47 'G'
{ 647, 14, 14, 14, 0, -13 }, // 0x48 'H'
{ 672, 10, 14, 14, 2, -13 }, // 0x49 'I'
{ 690, 13, 14, 14, 1, -13 }, // 0x4A 'J'
{ 713, 14, 14, 14, 0, -13 }, // 0x4B 'K'
{ 738, 12, 14, 14, 1, -13 }, // 0x4C 'L'
{ 759, 14, 14, 14, 0, -13 }, // 0x4D 'M'
{ 784, 13, 14, 14, 0, -13 }, // 0x4E 'N'
{ 807, 12, 14, 14, 1, -13 }, // 0x4F 'O'
{ 828, 12, 14, 14, 0, -13 }, // 0x50 'P'
{ 849, 12, 17, 14, 1, -13 }, // 0x51 'Q'
{ 875, 14, 14, 14, 0, -13 }, // 0x52 'R'
{ 900, 10, 14, 14, 2, -13 }, // 0x53 'S'
{ 918, 12, 14, 14, 1, -13 }, // 0x54 'T'
{ 939, 12, 14, 14, 1, -13 }, // 0x55 'U'
{ 960, 16, 14, 14, -1, -13 }, // 0x56 'V'
{ 988, 14, 14, 14, 0, -13 }, // 0x57 'W'
{ 1013, 14, 14, 14, 0, -13 }, // 0x58 'X'
{ 1038, 12, 14, 14, 1, -13 }, // 0x59 'Y'
{ 1059, 10, 14, 14, 2, -13 }, // 0x5A 'Z'
{ 1077, 5, 19, 14, 6, -14 }, // 0x5B '['
{ 1089, 10, 20, 14, 2, -16 }, // 0x5C '\'
{ 1114, 5, 19, 14, 3, -14 }, // 0x5D ']'
{ 1126, 10, 8, 14, 2, -15 }, // 0x5E '^'
{ 1136, 14, 2, 14, 0, 4 }, // 0x5F '_'
{ 1140, 4, 4, 14, 4, -15 }, // 0x60 '`'
{ 1142, 12, 11, 14, 1, -10 }, // 0x61 'a'
{ 1159, 13, 15, 14, 0, -14 }, // 0x62 'b'
{ 1184, 12, 11, 14, 1, -10 }, // 0x63 'c'
{ 1201, 13, 15, 14, 1, -14 }, // 0x64 'd'
{ 1226, 12, 11, 14, 1, -10 }, // 0x65 'e'
{ 1243, 11, 15, 14, 2, -14 }, // 0x66 'f'
{ 1264, 13, 16, 14, 1, -10 }, // 0x67 'g'
{ 1290, 14, 15, 14, 0, -14 }, // 0x68 'h'
{ 1317, 11, 14, 14, 1, -13 }, // 0x69 'i'
{ 1337, 8, 19, 15, 3, -13 }, // 0x6A 'j'
{ 1356, 13, 15, 14, 1, -14 }, // 0x6B 'k'
{ 1381, 11, 15, 14, 1, -14 }, // 0x6C 'l'
{ 1402, 15, 11, 14, 0, -10 }, // 0x6D 'm'
{ 1423, 14, 11, 14, 0, -10 }, // 0x6E 'n'
{ 1443, 12, 11, 14, 1, -10 }, // 0x6F 'o'
{ 1460, 14, 16, 14, 0, -10 }, // 0x70 'p'
{ 1488, 14, 16, 14, 0, -10 }, // 0x71 'q'
{ 1516, 12, 11, 14, 1, -10 }, // 0x72 'r'
{ 1533, 10, 11, 14, 2, -10 }, // 0x73 's'
{ 1547, 11, 14, 14, 1, -13 }, // 0x74 't'
{ 1567, 13, 11, 14, 0, -10 }, // 0x75 'u'
{ 1585, 14, 11, 14, 0, -10 }, // 0x76 'v'
{ 1605, 14, 11, 14, 0, -10 }, // 0x77 'w'
{ 1625, 14, 11, 14, 0, -10 }, // 0x78 'x'
{ 1645, 12, 16, 14, 1, -10 }, // 0x79 'y'
{ 1669, 11, 11, 14, 1, -10 }, // 0x7A 'z'
{ 1685, 7, 19, 14, 3, -14 }, // 0x7B '{'
{ 1702, 2, 19, 14, 6, -14 }, // 0x7C '|'
{ 1707, 7, 19, 14, 4, -14 }, // 0x7D '}'
{ 1724, 12, 4, 14, 1, -7 } }; // 0x7E '~'
const GFXfont FreeMonoBold12pt7b = {
(uint8_t *)FreeMonoBold12pt7bBitmaps,
(GFXglyph *)FreeMonoBold12pt7bGlyphs,
0x20, 0x7E, 24, 17 };
// Approx. 2402 bytes

2
components/fb_gfx/component.mk Executable file
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COMPONENT_ADD_INCLUDEDIRS := include
COMPONENT_SRCDIRS := .

167
components/fb_gfx/fb_gfx.c Normal file
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// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#include "stdint.h"
#include "stdarg.h"
#include "string.h"
#include "stdio.h"
#include "stdlib.h"
#include "fb_gfx.h"
typedef struct { // Data stored PER GLYPH
uint16_t bitmapOffset; // Pointer into GFXfont->bitmap
uint8_t width, height; // Bitmap dimensions in pixels
uint8_t xAdvance; // Distance to advance cursor (x axis)
int8_t xOffset, yOffset; // Dist from cursor pos to UL corner
} GFXglyph;
typedef struct { // Data stored for FONT AS A WHOLE:
uint8_t *bitmap; // Glyph bitmaps, concatenated
GFXglyph *glyph; // Glyph array
uint8_t first, last; // ASCII extents
uint8_t yAdvance; // Newline distance (y axis)
uint8_t yOffset; // Y offset of the font zero line (y axis)
} GFXfont;
#include "FreeMonoBold12pt7b.h"//14x24
#define gfxFont ((GFXfont*)(&FreeMonoBold12pt7b))
void fb_gfx_fillRect(fb_data_t *fb, int32_t x, int32_t y, int32_t w, int32_t h, uint32_t color)
{
int32_t line_step = (fb->width - w) * fb->bytes_per_pixel;
uint8_t *data = fb->data + ((x + (y * fb->width)) * fb->bytes_per_pixel);
uint8_t c0 = color >> 16;
uint8_t c1 = color >> 8;
uint8_t c2 = color;
for (int i=0; i<h; i++){
for (int j=0; j<w; j++){
if(fb->bytes_per_pixel == 2){
data[0] = c1;
data[1] = c2;
} else if(fb->bytes_per_pixel == 1){
data[0] = c2;
} else {
data[0] = c0;
data[1] = c1;
data[2] = c2;
}
data+=fb->bytes_per_pixel;
}
data += line_step;
}
}
void fb_gfx_drawFastHLine(fb_data_t *fb, int32_t x, int32_t y, int32_t w, uint32_t color)
{
fb_gfx_fillRect(fb, x, y, w, 1, color);
}
void fb_gfx_drawFastVLine(fb_data_t *fb, int32_t x, int32_t y, int32_t h, uint32_t color)
{
fb_gfx_fillRect(fb, x, y, 1, h, color);
}
uint8_t fb_gfx_putc(fb_data_t *fb, int32_t x, int32_t y, uint32_t color, unsigned char c)
{
uint16_t line_width;
uint8_t xa = 0, bit = 0, bits = 0, xx, yy;
uint8_t *bitmap;
GFXglyph *glyph;
if ((c < 32) || (c < gfxFont->first) || (c > gfxFont->last)) {
return xa;
}
c -= gfxFont->first;
glyph = &(gfxFont->glyph[c]);
bitmap = gfxFont->bitmap + glyph->bitmapOffset;
xa = glyph->xAdvance;
x += glyph->xOffset;
y += glyph->yOffset;
y += gfxFont->yOffset;
line_width = 0;
for(yy=0; yy<glyph->height; yy++) {
for(xx=0; xx<glyph->width; xx++) {
if(bit == 0) {
bits = *bitmap++;
bit = 0x80;
}
if(bits & bit) {
line_width++;
} else if (line_width) {
fb_gfx_drawFastHLine(fb, x+xx-line_width, y+yy, line_width, color);
line_width=0;
}
bit >>= 1;
}
if (line_width) {
fb_gfx_drawFastHLine(fb, x+xx-line_width, y+yy, line_width, color);
line_width=0;
}
}
return xa;
}
uint32_t fb_gfx_print(fb_data_t *fb, int32_t x, int32_t y, uint32_t color, const char * str)
{
uint32_t l = 0;
int xc = x, yc = y, lc = fb->width - gfxFont->glyph[0].xAdvance;
uint8_t fh = gfxFont->yAdvance;
char c = *str++;
while(c){
if(c != '\r'){
if(c == '\n'){
yc += fh;
xc = x;
} else {
if(xc > lc){
yc += fh;
xc = x;
}
xc += fb_gfx_putc(fb, xc, yc, color, c);
}
}
l++;
c = *str++;
}
return l;
}
uint32_t fb_gfx_printf(fb_data_t *fb, int32_t x, int32_t y, uint32_t color, const char *format, ...)
{
char loc_buf[64];
char * temp = loc_buf;
int len;
va_list arg;
va_list copy;
va_start(arg, format);
va_copy(copy, arg);
len = vsnprintf(loc_buf, sizeof(loc_buf), format, arg);
va_end(copy);
if(len >= sizeof(loc_buf)){
temp = (char*)malloc(len+1);
if(temp == NULL) {
return 0;
}
}
vsnprintf(temp, len+1, format, arg);
va_end(arg);
fb_gfx_print(fb, x, y, color, temp);
if(len > 64){
free(temp);
}
return len;
}

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components/fb_gfx/include/fb_gfx.h Normal file
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// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#ifndef _FB_GFX_H_
#define _FB_GFX_H_
#ifdef __cplusplus
extern "C" {
#endif
typedef enum {
FB_RGB888, FB_BGR888, FB_RGB565, FB_BGR565, FB_GRAY
} fb_format_t;
typedef struct {
int width;
int height;
int bytes_per_pixel;
fb_format_t format;
uint8_t * data;
} fb_data_t;
void fb_gfx_fillRect (fb_data_t *fb, int32_t x, int32_t y, int32_t w, int32_t h, uint32_t color);
void fb_gfx_drawFastHLine(fb_data_t *fb, int32_t x, int32_t y, int32_t w, uint32_t color);
void fb_gfx_drawFastVLine(fb_data_t *fb, int32_t x, int32_t y, int32_t h, uint32_t color);
uint8_t fb_gfx_putc (fb_data_t *fb, int32_t x, int32_t y, uint32_t color, unsigned char c);
uint32_t fb_gfx_print (fb_data_t *fb, int32_t x, int32_t y, uint32_t color, const char * str);
uint32_t fb_gfx_printf (fb_data_t *fb, int32_t x, int32_t y, uint32_t color, const char *format, ...);
#ifdef __cplusplus
}
#endif
#endif /* _FB_GFX_H_ */