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	In some cases specific alignment of buffer passed to underlying device is required. For example SDMMC in STM32F7 (when used with DMA) requires the buffers to be aligned to 16 bytes. If you enable data cache in STM32F7, the alignment of buffer passed to any driver which uses DMA should generally be at least 32 bytes. While it is possible to provide sufficiently aligned "read", "prog" and per-file caches to littlefs, the cases where caches are bypassed are hard to control when littlefs is hidden under some additional layers. For example if you couple littlefs with stdio and use it via `FILE*`, then littlefs functions will operate on internal `FIlE*` buffer, usually allocated dynamically, so in these specific cases - with insufficient alignment (8 bytes on ARM Cortex-M). The easy path was taken - remove all cases of cache bypassing. Fixes #158
		
			
				
	
	
	
		
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			129 KiB